Commit Graph

1072180 Commits

Author SHA1 Message Date
Tao Huang
802a76031b media: rockchip: cif: Remove unnecessary test
Fix the following smatch warnings:
drivers/media/platform/rockchip/cif/dev.c:610 rkcif_write_register() warn: we tested 'index' before and it was 'true'
drivers/media/platform/rockchip/cif/dev.c:638 rkcif_write_register_or() warn: we tested 'index' before and it was 'true'
drivers/media/platform/rockchip/cif/dev.c:669 rkcif_write_register_and() warn: we tested 'index' before and it was 'true'
drivers/media/platform/rockchip/cif/dev.c:700 rkcif_read_register() warn: we tested 'index' before and it was 'true'

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I03baf193ffb51e2c23d3e115dbc44cc564e57dca
2022-08-03 15:26:40 +08:00
XiaoTan Luo
2ddf5c9116 arm64: rockchip_defconfig: enable es8326 codecs for 3588s tablet
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I65aed574a1aec7a9c15e2d91d31fd5cdd3c4652e
2022-08-03 15:26:03 +08:00
Liang Chen
fbc9adf8b6 arm64: dts: rockchip: px30&rk3326: use irq mode for fiq-debugger
Change-Id: I0b303931c318d0e25b12b8078884ac1d1a01b2ab
Signed-off-by: Liang Chen <cl@rock-chips.com>
2022-08-03 15:20:26 +08:00
Damon Ding
d636553315 drm/rockchip: vop2: fix the logic of disabling right splice win
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Iead8956b50c79caa0f587ac49276dfd8158c0c30
2022-08-03 14:23:36 +08:00
Damon Ding
ed60e70287 drm/rockchip: vop2: no need to standby splice_vp when disabling vp0 in 8k mode
Fixes: fa631748f8 ("drm/rockchip: vop2: Disable right VP and win in splice mode")
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Ibcb8dd40840f72c0e8665f183458a7deeb488270
2022-08-03 14:23:36 +08:00
Damon Ding
21600b1b0e drm/rockchip: vop2: not allow to enable splice mode when vp1 active
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I4794e5db46c637edd4dcec5aa75698b0d38fd9dc
2022-08-03 14:23:36 +08:00
Damon Ding
558f320197 drm/rockchip: vop: add vop_vp_id definition
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I6f8665c38c3999e679f3c6b7ff5297aef902bc31
2022-08-03 14:23:36 +08:00
Tao Huang
9143614bf3 ARM: rv1106-uvc-spi-nor.config: Update by diffconfig
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I0d8669359f8a87889230e4358039d3d5d80d221f
2022-08-02 18:12:05 +08:00
Tao Huang
8766ae6fe9 ARM: rv1106-smart-door.config: Update by diffconfig
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Iaa0fb0c847758d4b897bafe2fe54bd700c8e4d97
2022-08-02 17:58:31 +08:00
Tao Huang
5cef7ffec7 ARM: rv1106-ipc.config: Update by diffconfig
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I0e58f4a2ce3b850541e90b53fd396bae995fe8cc
2022-08-02 17:56:45 +08:00
Tao Huang
024579bb4d ARM: rv1106-evb.config: Update by diffconfig
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I5ab5e182cbda6cafa931a1a2b34288505b178e44
2022-08-02 17:56:32 +08:00
Wyon Bi
0c71219bf3 drm/bridge: analogix_dp: Fix TX lane count & rate setup
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Idca54fe6c1bd4317da6c4bb65e87df3d4aa07c6c
2022-08-02 17:22:03 +08:00
Wyon Bi
38fbb24eeb drm/bridge: maxim-max96745: Check training state
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I6f68dc0b155cd6e8a5ac314449ffe0f263f64046
2022-08-02 08:34:46 +00:00
Wyon Bi
66fee6290f drm/bridge: analogix_dp: Support max_link_rate limit
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I704987e5a20402b451d0d8a0a0d7e0ae1649be25
2022-08-02 08:34:16 +00:00
Sach Lin
0689f8c244 ARM: dts: rockchip: rv1106-smd-cam: change sc132gs to sc035gs.
Signed-off-by: Sach Lin <sach.lin@rock-chips.com>
Change-Id: I80c14d8525b43e5356b4b2093d44454340f7cf93
2022-08-02 14:30:07 +08:00
Sach Lin
c849e2cf91 ARM: configs: rv1106-smart-door: add CONFIG_VIDEO_SC035GS
Signed-off-by: Sach Lin <sach.lin@rock-chips.com>
Change-Id: Ic830e123a014789342b119dd481d316829515ca8
2022-08-02 14:28:33 +08:00
Lin Jinhan
62b6fe9634 media: i2c: add SC035GS driver
Change-Id: I5a7c668e8044c50ceb1ffa6cd3fb0e4167ba96fc
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2022-08-02 14:28:20 +08:00
Sugar Zhang
ed95aea3f1 ARM: dts: rockchip: Add support for rv1126 evb boards
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Iec56cf4d3a27d0e2b18ef577a7d990d350354194
2022-08-02 14:24:46 +08:00
Sugar Zhang
4ed0b6538e ARM: dts: rockchip: rv1126-evb-v10: Remove unused property for rk809 sound
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Icc98fbb842786a927f8ee9e24ec87156eabbc174
2022-08-02 11:00:36 +08:00
Damon Ding
d3fd7f006d ARM: dts: rockchip: rv1106: add rgb route node on display_subsystem
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Ia047276482c39801ffc74dd5952eea5c87b5a570
2022-08-01 19:11:55 +08:00
Elon Zhang
629253fd04 ARM: dts: rockchip: add rv1106g-evb1-v10-facial-gate
Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Change-Id: I6ebb77931a29f649e96978be9084f37f24f999c9
2022-08-01 18:31:29 +08:00
Weiwen Chen
d3dcc9f47f kbuild: support enable -fno-verbose-asm by c_flags
The %.s object generate by -fverbose-asm default,
now we can enable -fno-verbose-asm by c_flags.

Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I40a832b4704740dd2a5199514528bb2d8f6db45e
2022-08-01 16:58:31 +08:00
Zhang Yubing
2703184e9d drm/rockchp: dw-dp: set a suitable hsync limit value
In actual test, the min hsync value is 9, So it just need filter
the display mode whose hsync value is less than 9.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I06bc52c1f8b45894ee9813c8d014e6a9e3f48df6
2022-08-01 16:45:41 +08:00
Wangqiang Guo
e3006fca4f media: i2c: it66353: fix it66353 no lock.
1.Config ddc/hpd/5v no bypass.
2.Add mutex_lock on dev_loop/hdmisel.
3.Fix tx_is_sink_hpd_high return err.
4.Config switch port hpd toggle time 2s.
5.Set EDID to print a 16-byte line.

Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com>
Change-Id: I26ad6b12e243405684785352c10f7835729c1bf4
2022-08-01 16:31:39 +08:00
William Wu
d360ef05db arm64: dts: rockchip: rk3566: disable usb2 lpm for xhci
The xHCI specification 1.1 does not require xHCI-compliant
controllers to always enable hardware USB2 LPM. However,
the current xHCI driver always enable it when seeing HLC=1.

On rk3566 platforms, the xHCI USB2 LPM is enabled by default.
And we found that a lot of USB Disks have USB2 HW LPM broken
issue when connected to rk3566 USB2 OTG interface.

Here are a part of special USB Disks with USB2 HW LPM broken:

1. idVendor=325d, idProduct=6410, Manufacturer: aigo
2. idVendor=21c4, idProduct=0cd1, Manufacturer: Lexar
3. idVendor=0951, idProduct=1666, Manufacturer: Kingston

When use dd command to write to these USB Disks, it may fail
with the following log:

[ 2844.700148] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
[ 2889.072272] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
[ 2921.498045] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
......
[ 2953.923773] usb 7-1: reset high-speed USB device number 4 using xhci-hcd

Theoretically, we can add USB_QUIRK_NO_LPM individually for
these special USB Disks, however, it's diffcult to cover all
USB Disks. So it's better to disable the USB2 LPM for xHCI
on rk3566 platforms.

Change-Id: I2c180b68f41a4d25a4c860c32550f3a406eb2028
Signed-off-by: William Wu <william.wu@rock-chips.com>
2022-08-01 15:15:23 +08:00
William Wu
28e0999bee ARM: dts: rockchip: rv1106: disable usb2 lpm for xhci
The xHCI specification 1.1 does not require xHCI-compliant
controllers to always enable hardware USB2 LPM. However,
the current xHCI driver always enable it when seeing HLC=1.

On rv1106 platforms, the xHCI USB2 LPM is enabled by default.
And we found that a lot of USB Disks have USB2 HW LPM broken
issue when connected to rv1106 USB2 OTG interface.

Here are a part of special USB Disks with USB2 HW LPM broken:

1. idVendor=325d, idProduct=6410, Manufacturer: aigo
2. idVendor=21c4, idProduct=0cd1, Manufacturer: Lexar
3. idVendor=0951, idProduct=1666, Manufacturer: Kingston

When use dd command to write to these USB Disks, it may fail
with the following log:

[ 2844.700148] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
[ 2889.072272] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
[ 2921.498045] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
......
[ 2953.923773] usb 7-1: reset high-speed USB device number 4 using xhci-hcd

Theoretically, we can add USB_QUIRK_NO_LPM individually for
these special USB Disks, however, it's diffcult to cover all
USB Disks. So it's better to disable the USB2 LPM for xHCI
on rv1106 platforms.

Change-Id: Ie058b65b963ce9a8aa72ae1a55a38f0c78d3a095
Signed-off-by: William Wu <william.wu@rock-chips.com>
2022-08-01 15:15:23 +08:00
Zefa Chen
74aca7167d media: rockchip: rv1106 vicap support dvp
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I8c5b3db27d4fef1f486763cf2018729b9745b4ea
2022-08-01 15:12:54 +08:00
Zefa Chen
0a274564e9 phy: rockchip: csi dphy support TTL mode
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ie2806026da6a126a4fd72b26cf26cdf85399fe90
2022-08-01 15:12:54 +08:00
Zefa Chen
23cad042e9 media: rockchip: vicap fixed bug for capture hdr raw with online mode
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I47df30b6e544977a96246cbfb5be1dd281e98aa4
2022-08-01 15:12:54 +08:00
Zefa Chen
b8e3b3e3ce media: i2c: sensor adapter support get/set dphy param with multi dev
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I4eb2a62e01eb9290d83e71532c3f6cef14c7df9c
2022-08-01 15:12:54 +08:00
Zefa Chen
e2cedb5e0d phy: rockchip: mipi-dcphy: support get phy param with multi dev
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I859d6e3f06bf38e77ba9ca7a2cd22ca78ca527c2
2022-08-01 15:12:54 +08:00
Zefa Chen
cd0558f059 media: rockchip: vicap: mipi csi2 not to notify error for fs/fe not match
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: If29fe6ffff561fcacab58891dd1060f95ae873ed
2022-08-01 15:12:54 +08:00
Zefa Chen
c92d93f2df media: rockchip: vicap fixed fs/fe not paire detect error
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ic39599613df38dd2407d6cf06f8b8dc2a5b33ef5
2022-08-01 15:12:54 +08:00
Zefa Chen
b096ef166e media: rockchip: vicap fixed csi2 notifier chain issue
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I896acc5586efd9b3614fb97674881c44022608a8
2022-08-01 15:12:54 +08:00
Zefa Chen
3bafc15055 include: uapi: rkcif-config.h: add cmd RKCIF_CMD_SET_CSI_IDX
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I91aa19d72e2442433231f158ba722d1393e04fa8
2022-08-01 15:12:54 +08:00
Chen Shunqing
f710bf284e regulator: wl2868c: add suspend/resume functions
If wl2868c power off in suspend, then the registers
will be reset, so we need to restored them after resume.

Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: Id7170a27f18fd9a640df358e0b13244036121d9f
2022-08-01 15:10:21 +08:00
Zhang Yubing
f7645e0726 arm64: dts: rockchip: rk3588s: assign vop aclk rate in vop node
In common case, the 500MHz vop aclk rate can satisfy the vop request.
For some high pixel clock case(8K@60Hz, 4K@120Hz, etc),the vop aclk
should enhance to 800MHz to avoid abnormal display issue.

When display a high pxel clock timing from bootloader to kernel, the
bootloader will set the vop aclk rate to 800MHz. The vop driver in
kernel will also set the vop aclk rate to 800MHz. But the clock driver
will set the vop aclk rate to 800MHz before the vop driver. The vop
aclk rate will change as: 800MHz->500MHz->800MHz, which will cause
a flicker.

To fix this issue, remove the vop aclk rate assign in clock controller
node, and define it in vop node.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I785fe464bba79bb2bcd63a8588d847edecef5a17
2022-08-01 14:58:37 +08:00
Chen Shunqing
37c7780120 media: rockchip: hdmirx: modify timing criteria
The hsync of some timings maybe bigger than 300.
If get hsync error, it could be very large, so we
think that is error if it's bigger than 500.

Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: I57e8b462c3a224ba402d8ab1c20fd2c4c0f77a2c
2022-08-01 14:49:11 +08:00
Caesar Wang
e31f1b672c arm64: dts: rockchip: use SPDX-License-Identifier
Update all 64bit rockchip devicetree files to use SPDX-License-Identifiers.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Ie983cca0d54cae8b5ad6d322d51eb7bbd265aa0a
2022-08-01 14:20:46 +08:00
Chen Shunqing
a1b5570871 media: rockchip: hdmirx: add cec enable config
HDMIRX and HDMITX cec cannot enable at the same time.

Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: I825c552a57dd795d358108f95a1dc24391aa3f93
2022-08-01 14:12:32 +08:00
Weiwen Chen
c3724eaa3a ARM: configs: rockchip: rv1106: add rndis config
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I9d988fd416b50eb729ca42deccac233fd962403a
2022-08-01 09:21:35 +08:00
Dingxian Wen
2588aa2aa4 media: rockchip: hdmirx: fix yuv420 hblank timings err
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I4be46b636a0f2ee81fab509c794bbdf88c06aae2
2022-07-29 17:26:16 +08:00
Jake Wu
5fb8464990 gpio: support gpio expand chip aw9110
Signed-off-by: Jake Wu <jake.wu@rock-chips.com>
Change-Id: I370b77f578e7937712eedec830a1334ce938667b
2022-07-29 16:13:11 +08:00
XiaoTan Luo
60da6cd444 arm64: dts: rockchip: rk3588s-evb1-lp4x: add es8326_sound
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: Id5c7289aa96ec1df2b7732889664220497e3dd10
2022-07-29 14:17:32 +08:00
XiaoTan Luo
c3eff600ee arm64: dts: rockchip: rk3588s-evb1-lp4x: add aw883xx_sound
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: Ib102474f448a0445b3cbbd4502affe70ce1de915
2022-07-29 14:16:43 +08:00
Cai YiWei
e09cebac4b media: rockchip: isp: disable link vir isp when hw working
Change-Id: I1006c9320c30397b8ed106cb75039b10f55fd286
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2022-07-29 10:40:28 +08:00
Cai YiWei
a8b7cd32f2 media: rockchip: isp: 2 readback for support multishot large resolution
Change-Id: Idffbb0836c9981cc8390881ef82e7040ca5c1f05
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2022-07-29 10:40:28 +08:00
Cai YiWei
b3260da5e9 media: rockchip: isp: extend pixel to 32 for isp30 unite mode
Change-Id: I26030c63a9f255dc68a4d2b1bb9ba46718d81110
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2022-07-29 10:40:28 +08:00
Tao Huang
886c4597c8 arm64: rockchip_gki.config: Enable CONFIG_VIDEO_RK_IRCUT
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Icbbec65bfa0cd3e6a91137357eb6c3a752576e8f
2022-07-29 10:11:21 +08:00
Zefa Chen
2b1647e40e arm64: configs: rockchip_defconfig: enable CONFIG_VIDEO_RK_IRCUT
CONFIG_VIDEO_RK_IRCUT need config for imx415 module with rk3588 evb1
otherwise camera can't work in GKI mode
Because GKI does not compile __v4l2_async_notifier_clr_unready_dev,
the link relationship will be established only after all devices
on the dts link are registered

Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ib7e244e0ab7ea1f19e4247ce0731f2a588c1d382
2022-07-29 09:42:04 +08:00