Since devfreq_add_device() and update_devfreq() already takes care of this.
Change-Id: Ie90c1d28f681cfbc946362e303a61bdf3578ccd6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
fix rk3368 xikp machine camera PIC_SIZE_ERR in first start state
Change-Id: I1466ca8d8ba7543e2c1c84d4180a3a165e95e8a9
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
rk1608 can run at max spi speed with rk3326. This patch
set spi to 50MHz with external clock 100MHz and rsd = 1.
Change-Id: Iff92f045668069272d7d56d4439783ee72db1cf2
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
rk1608 spi can not run at high speed (>40M) at boot time. It needs
initialization before switching to spi max speed.
Change-Id: I27e17d32271012fd48c7feeb8e4939082439b978
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Current rockchip-drm does not go to unlock and free
logo memory when fbdev is initialized.
That will cause the display application with linuxfb
platform unable to get the display buffer when boot.
So fix this.
Change-Id: I6b4652d642656c640e5b536b199e623f4f1bc3ef
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Since touch screen and panel both use LCD_PWR_EN to enable
power, create lcd_pwr regulator so touch screen and panel
both can quote it.
Change-Id: I5400637c3ae9e684c58effcd5eae1fdc1672780a
Signed-off-by: Lin Huang <hl@rock-chips.com>
On rk3288, vpu clock should be raised when 4k h.264 decoding,
but on previous judgement branch code, judgement do
not distinguish vpu or hevc would make incorrect clock
raise when hevc running.
Change-Id: Idb8e5a9dde1e8eb063658c9610ac839c8c69b6ce
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
fix rk3288 camera PIC_SIZE_ERR in first start state
Change-Id: I52f9d348dd521b1d34b78adca740205ce52704bf
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Dfs, flash, reboot test will be failed if peri ms
and sram auto CS are enabled. So disable them first
and we will continue to analyze the reasons.
Change-Id: Ife20f25fb28acf0042a23b1edfc73705edc668db
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
The userspace would use the client type ioctl to make
a session work in secure mode, reuse the undefine
bits of the argument.
This patch would remove the secure mode setting from
the client type argument which was a mistake in a
previous commit, but without the secure mode applied,
nobody would know.
Change-Id: Ifaa976a0c9ab0c981b1f94f4978cd13a61adb0a7
Signed-off-by: Randy Li <randy.li@rock-chips.com>
the driver has a bug in calc of page num when virtual
address may not 4k align
Change-Id: I65e8d3017a0365409a69e2edce12f2d302bca298
Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>
The spi5 request number is at DMAC0, others are at DMAC1.
Change-Id: I16ce63617d841f867eb7c831a05145b808f2a1d3
Signed-off-by: David Wu <david.wu@rock-chips.com>
On Freescale i.MX7D platform, all clocks operations, including
enable/disable, rate change and re-parent, requires its parent clock on.
Current clock core can not support it well.
This patch adding flag CLK_OPS_PARENT_ENABLE to handle this special case in
clock core that enable its parent clock firstly for each operation and
disable it later after operation complete.
The patch part 2 fixes set clock rate and set parent while its parent
is off. The most special case is for set_parent() operation which requires
all parents including both old and new one to be enabled at the same time
during the operation.
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
[sboyd@codeaurora.org: Move set_rate tracepoint after prepare_enable]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit fc8726a2c0)
Change-Id: I8b71c9081a70b13f29a2c12a5b9eae5468c26ec4
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
On Freescale i.MX7D platform, all clocks operations, including
enable/disable, rate change and re-parent, requires its parent
clock enable. Current clock core can not support it well.
This patch introduce a new flag CLK_OPS_PARENT_ENABLE to handle this
special case in clock core that enable its parent clock firstly for
each operation and disable it later after operation complete.
The patch part 1 fixes the possible disabling clocks while its parent
is off during kernel booting phase in clk_disable_unused_subtree().
Before the completion of kernel booting, clock tree is still not built
completely, there may be a case that the child clock is on but its
parent is off which could be caused by either HW initial reset state
or bootloader initialization.
Taking bootloader as an example, we may enable all clocks in HW by default.
And during kernel booting time, the parent clock could be disabled in its
driver probe due to calling clk_prepare_enable and clk_disable_unprepare.
Because it's child clock is only enabled in HW while its SW usecount
in clock tree is still 0, so clk_disable of parent clock will gate
the parent clock in both HW and SW usecount ultimately. Then there will
be a child clock is still on in HW but its parent is already off.
Later in clk_disable_unused(), this clock disable accessing while its
parent off will cause system hang due to the limitation of HW which
must require its parent on.
This patch simply enables the parent clock first before disabling
if flag CLK_OPS_PARENT_ENABLE is set in clk_disable_unused_subtree().
This is a simple solution and only affects booting time.
After kernel booting up the clock tree is already created, there will
be no case that child is off but its parent is off.
So no need do this checking for normal clk_disable() later.
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit a4b3518d14)
Change-Id: Idad6e0b3c7e5be87150698257f3fea15061a207e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This can be useful when clock core wants to enable/disable clocks.
Then we don't have to convert the struct clk_core to struct clk to call
clk_enable/clk_disable which is a bit un-align with exist using.
And after introduce clk_core_{enable|disable}_lock, we can refine
clk_enable and clk_disable a bit.
As well as clk_core_{enable|disable}_lock, we also added
clk_core_{prepare|unprepare}_lock and clk_core_prepare_enable/
clk_core_unprepare_disable for clock core to easily use.
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit a6adc30ba7)
Change-Id: Ie4e31b0d6d638f74ee2304735ddec0eecb56d70e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
