Commit Graph

1072377 Commits

Author SHA1 Message Date
Damon Ding
8e7ed8509c arm64: dts: rockchip: rk3308bs-evb: add rk618 rgb to dsi board
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Ic538d649c61ed7fcd04c05db5d0c74ef75e7e01e
2022-08-24 15:08:16 +08:00
Damon Ding
06d2c5dd1c arm64: dts: rockchip: rk3308: add cma node for rk3308b-mipi-display-v11.dtsi
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I0d813b5f81214f9a6a0e613cd0e7afb0f16924ba
2022-08-24 15:08:10 +08:00
Wyon Bi
9de814a253 arm64: dts: rockchip: Add rk3588-vehicle-maxim-serdes.dtsi
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Idd7ef6dd85d157b939318314a633dd1ec8c002e7
2022-08-24 14:54:33 +08:00
Zhang Yubing
b10a10d25e drm/rockchip: analogix_dp: support vrr
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I17de7401b9da853cd49b0da34abd77385272824d
2022-08-24 14:49:40 +08:00
Zhang Yubing
d2ebeecddd drm/rockchip: support vrr
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I62de662e71b36f49b20ac843d6354cc4b5448ebe
2022-08-24 14:49:40 +08:00
Zhang Yubing
35fd6d07c6 drm/rockchip: vop2: config vtoal and vsync independently
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I9d5cfaf9105d502e3fad1c88de33e2edf0f25514
2022-08-24 14:49:40 +08:00
Tao Huang
7dec57e6ec arm64: rockchip_defconfig: update by savedefconfig
-CONFIG_NET_VENDOR_REALTEK=y
-# CONFIG_HW_RANDOM_CAVIUM is not set

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I08f0142fffea11975d0b4c2f0b9ce1291b55f105
2022-08-24 14:29:00 +08:00
Wyon Bi
76afa43b4a arm64: rockchip_defconfig: Enable CONFIG_DRM_PANEL_MAXIM_DESERIALIZER
Enable the maxim deserializer panel driver used on RK3588 vehicle.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ia017d8fb4fe254f43efa420e12e9eed1e0a4bfc1
2022-08-24 11:25:03 +08:00
Wyon Bi
12b1e6a84a drm/panel: Add panel driver for maxim deserializer panels
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Idaab9f2c04da1b66c36c117472ddb56817a897ca
2022-08-24 11:25:03 +08:00
Algea Cao
18474984db drm/rockchip: dw_hdmi: Fix rk3588 get color depth value error
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I958e5e669272dd2133755406dbb88d68a902e268
2022-08-24 11:12:19 +08:00
Zhang Yubing
7792a252ff drm/rockchip: vop2: fix NULL point issue when access VOP internal PD.
Only VOP for RK3588 has internal PD. VOP in other SoC try
to get PD will return NULL, which may cause NULL pointer
issue as follow:
[08/16/10:45:00:494][   44.750259][  T278] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000020
[08/16/10:45:00:494][   44.751855][  T278] Mem abort info:
[08/16/10:45:00:494][   44.752174][  T278]   ESR = 0x96000005
[08/16/10:45:00:494][   44.752513][  T278]   EC = 0x25: DABT (current EL), IL = 32 bits
[08/16/10:45:00:494][   44.753042][  T278]   SET = 0, FnV = 0
[08/16/10:45:00:494][   44.753402][  T278]   EA = 0, S1PTW = 0
[08/16/10:45:00:494][   44.753752][  T278] Data abort info:
[08/16/10:45:00:494][   44.754076][  T278]   ISV = 0, ISS = 0x00000005
[08/16/10:45:00:494][   44.754478][  T278]   CM = 0, WnR = 0
[08/16/10:45:00:494][   44.754804][  T278] user pgtable: 4k pages, 39-bit VAs, pgdp=0000000002961000
[08/16/10:45:00:495][   44.755434][  T278] [0000000000000020] pgd=0000000000000000, p4d=0000000000000000, pud=0000000000000000
[08/16/10:45:00:495][   44.756272][  T278] Internal error: Oops: 96000005 [#1] PREEMPT SMP
[08/16/10:45:00:495][   44.756830][  T278] Modules linked in: bcmdhd dhd_static_buf
[08/16/10:45:00:495][   44.757343][  T278] CPU: 0 PID: 278 Comm: composer@2.1-se Not tainted 5.10.110 #206
[08/16/10:45:00:495][   44.758019][  T278] Hardware name: Rockchip RK3566 RK817 TABLET LP4X Board (DT)
[08/16/10:45:00:495][   44.758664][  T278] pstate: 60400009 (nZCv daif +PAN -UAO -TCO BTYPE=--)
[08/16/10:45:00:495][   44.759268][  T278] pc : vop2_power_domain_status+0x30/0x10c
[08/16/10:45:00:496][   44.759781][  T278] lr : vop2_crtc_atomic_disable+0x1bc/0xb70
[08/16/10:45:00:496][   44.760288][  T278] sp : ffffffc01497b9e0
[08/16/10:45:00:496][   44.760645][  T278] x29: ffffffc01497b9f0 x28: ffffff8041362800
[08/16/10:45:00:496][   44.761182][  T278] x27: ffffffc0122b9000 x26: ffffff81f1662938
[08/16/10:45:00:496][   44.761713][  T278] x25: 0000000000000000 x24: ffffff8041360400
[08/16/10:45:00:496][   44.762243][  T278] x23: 0000000000000000 x22: ffffff8041362800
[08/16/10:45:00:496][   44.762775][  T278] x21: ffffff81f1660080 x20: 0000000000000000
[08/16/10:45:00:496][   44.763306][  T278] x19: 0000000000000000 x18: ffffffc014955070
[08/16/10:45:00:496][   44.763836][  T278] x17: 071c71c71c71c71c x16: 0000000000000001
[08/16/10:45:00:497][   44.764366][  T278] x15: 0000000000000000 x14: 00000000000017d4
[08/16/10:45:00:497][   44.764896][  T278] x13: 0000000000000000 x12: ffffffc0112e2f60
[08/16/10:45:00:497][   44.765427][  T278] x11: ffffffc012c58000 x10: 0000000000000000
[08/16/10:45:00:497][   44.765957][  T278] x9 : ffffff81f16629a8 x8 : 6b3fc41c13181400
[08/16/10:45:00:497][   44.766487][  T278] x7 : 0000000000000000 x6 : 0000000000000000
[08/16/10:45:00:497][   44.767018][  T278] x5 : fffffffebff8efe8 x4 : ffffff81ff6d8c70
[08/16/10:45:00:497][   44.767547][  T278] x3 : 0000000000000008 x2 : ffffffc01497b9e4
[08/16/10:45:00:497][   44.768077][  T278] x1 : 0000000000000010 x0 : 0000000000000000
[08/16/10:45:00:497][   44.768608][  T278] Call trace:
[08/16/10:45:00:498][   44.768895][  T278]  vop2_power_domain_status+0x30/0x10c
[08/16/10:45:00:498][   44.769371][  T278]  vop2_crtc_atomic_disable+0x1bc/0xb70
[08/16/10:45:00:498][   44.769849][  T278]  drm_atomic_helper_commit_modeset_disables+0x26c/0x4d0
[08/16/10:45:00:498][   44.770462][  T278]  rockchip_drm_atomic_helper_commit_tail_rpm+0x44/0x184
[08/16/10:45:00:498][   44.771071][  T278]  commit_tail+0x110/0x200
[08/16/10:45:00:498][   44.771453][  T278]  drm_atomic_helper_commit+0x1f0/0x210
[08/16/10:45:00:498][   44.771940][  T278]  drm_atomic_commit+0x50/0x64
[08/16/10:45:00:498][   44.772360][  T278]  drm_mode_atomic_ioctl+0x620/0x744
[08/16/10:45:00:498][   44.772823][  T278]  drm_ioctl+0x24c/0x3b8
[08/16/10:45:00:498][   44.773201][  T278]  __arm64_sys_ioctl+0x94/0xd0
[08/16/10:45:00:498][   44.773623][  T278]  el0_svc_common+0xc0/0x23c
[08/16/10:45:00:499][   44.774017][  T278]  do_el0_svc+0x28/0x88
[08/16/10:45:00:499][   44.774381][  T278]  el0_svc+0x14/0x24
[08/16/10:45:00:499][   44.774719][  T278]  el0_sync_handler+0x88/0xec
[08/16/10:45:00:499][   44.775124][  T278]  el0_sync+0x1a8/0x1c0

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I8054625f600598fe413a5d6f5ee691ae2782ec8f
2022-08-23 16:39:39 +08:00
Binyuan Lan
b92a9224e4 arm64: dts: rockchip: rk3568-evb: optimize the recording noise
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
Change-Id: Ifaf13dc0b90f67311051db6567070af9a5e2451e
2022-08-23 10:17:38 +08:00
Huibin Hong
20f05569fe arm64: process: show_regs show_extra_register_data with 512*2 bytes
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: If84fe2946e9fc8331d36e71a1661d2b75d06cadd
2022-08-23 10:09:41 +08:00
Zhang Yubing
1fcbbf99d3 drm/rockchip: dw-dp: support split mode when show logo
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I47625ca0c237f7d11328247705e6f424f74f02dc
2022-08-22 21:24:00 +08:00
Frank Wang
7f0e3549fd usb: typec: fusb302: amend irq work to rt priority
Since the interrupt status of FUSB302 is R/C scheme, the interrupt
may miss between the top half and the bottom half (work), so make
the irq work to run with real time priority and get scheduled in time.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I315ea7689c964a866f6578d25db85af4a26cd860
2022-08-22 19:37:55 +08:00
Cai YiWei
2a2955cd9e media: rockchip: isp: fix pm runtime return -EACCES for thunderboot
Change-Id: I279f171dc3756b0fa64185745678223d7c94e4d3
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2022-08-22 19:37:09 +08:00
Cai YiWei
d97ebe62c6 media: rockchip: isp: first frame run double for isp32 fast mode
Change-Id: I56e63b76ef5b9fd13c00aa809399e110fd77af97
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2022-08-22 19:37:09 +08:00
Cai YiWei
886be9457a media: rockchip: isp: fast to vicap capture raw
Change-Id: Ia059ebbd33c933791c6cc8cb434a599f5f6cb4a6
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2022-08-22 19:37:09 +08:00
Cai YiWei
62fa0cda98 media: rockchip: isp: support rdbk without aiq
aiq no set readback mode and isp set auto readback mode
echo Y > /sys/module/video_rkisp/parameters/rdbk_auto

Change-Id: I78541b7a88bbfa300323a3c4ef4f8f512d7208bf
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2022-08-22 19:37:09 +08:00
Wyon Bi
81f7ff481e mfd: max96755f: Support i2c-mux-idle-disconnect property
This is used, for example, when there are several multiplexers
on the same bus and the devices on the underlying buses might
have same I2C addresses.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Idf2ff4dad5dabffaf7065a3f5d39cf3621b574a1
2022-08-22 19:27:55 +08:00
Wyon Bi
8346555424 mfd: max96745: Support i2c-mux-idle-disconnect property
This is used, for example, when there are several multiplexers
on the same bus and the devices on the underlying buses might
have same I2C addresses.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I33e8206c55785808e2e29128a572ea657cb45f62
2022-08-22 19:27:55 +08:00
Sugar Zhang
73a2042551 ALSA: pcm: Add support trace for applptr-start
This patch add trace 'applptr_start' for analyse R/W whether
it's blocked by user or kernel space.

CONFIG_FUNCTION_TRACER
CONFIG_FUNCTION_GRAPH_TRACER
CONFIG_STACK_TRACER
CONFIG_DYNAMIC_FTRACE

/# cd /sys/kernel/debug/tracing
/# echo "snd_pcm:applptr" >> set_event
/# echo "snd_pcm:applptr_start" >> set_event
/# echo "snd_pcm:hwptr" >> set_event
/# echo "snd_pcm:xrun" >> set_event
/# echo 1 > tracing_on
/# cat trace_pipe > trace.txt

149.773314: applptr_start: pcmC1D0c/sub0: size=4096
149.794870: applptr: pcmC1D0c/sub0: prev=0, curr=1024, avail=0, period=1024, buf=4096
149.816192: applptr: pcmC1D0c/sub0: prev=1024, curr=2048, avail=0, period=1024, buf=4096
149.837526: applptr: pcmC1D0c/sub0: prev=2048, curr=3072, avail=0, period=1024, buf=4096
149.858859: applptr: pcmC1D0c/sub0: prev=3072, curr=4096, avail=0, period=1024, buf=4096
149.858871: applptr_start: pcmC1D0c/sub0: size=4096
149.880192: applptr: pcmC1D0c/sub0: prev=4096, curr=5120, avail=0, period=1024, buf=4096
149.901523: applptr: pcmC1D0c/sub0: prev=5120, curr=6144, avail=0, period=1024, buf=4096
149.922857: applptr: pcmC1D0c/sub0: prev=6144, curr=7168, avail=0, period=1024, buf=4096
149.944192: applptr: pcmC1D0c/sub0: prev=7168, curr=8192, avail=0, period=1024, buf=4096
149.944202: applptr_start: pcmC1D0c/sub0: size=4096
149.965524: applptr: pcmC1D0c/sub0: prev=8192, curr=9216, avail=0, period=1024, buf=4096
149.986858: applptr: pcmC1D0c/sub0: prev=9216, curr=10240, avail=0, period=1024, buf=4096
150.008191: applptr: pcmC1D0c/sub0: prev=10240, curr=11264, avail=0, period=1024, buf=4096
150.029529: applptr: pcmC1D0c/sub0: prev=11264, curr=12288, avail=0, period=1024, buf=4096
150.029539: applptr_start: pcmC1D0c/sub0: size=4096
150.050859: applptr: pcmC1D0c/sub0: prev=12288, curr=13312, avail=0, period=1024, buf=4096
150.072191: applptr: pcmC1D0c/sub0: prev=13312, curr=14336, avail=0, period=1024, buf=4096
150.093524: applptr: pcmC1D0c/sub0: prev=14336, curr=15360, avail=0, period=1024, buf=4096
150.114859: applptr: pcmC1D0c/sub0: prev=15360, curr=16384, avail=0, period=1024, buf=4096

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I66dad75dc183d887ee413539e3df6d77a90a70f6
2022-08-22 17:42:55 +08:00
Sugar Zhang
b48600bef8 drm/bridge: synopsys: dw-hdmi-qp; Add N/CTS for FRL mode
Adds recommended N and Expected CTS Values for FRL Mode
which defined in chapter 9.2.2 of HDMI Specification 2.1.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I1a21a111a65beeb024e5740c8bd231f9f534c1b5
2022-08-22 17:42:55 +08:00
Sugar Zhang
e4405c819b drm/bridge: synopsys: dw-hdmi-qp: Workaround for Hisense TV
This patch workaround for no sound issue on Hisense TV which
seems to need AUDI ACR packet when initial stage.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I192b631b29d33ad6571f70e062788c45b917803c
2022-08-22 17:42:55 +08:00
Sugar Zhang
928790df25 arm64: dts: rockchip: rk3588: Make I2S5/6 for HDMI0/1 always on
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I87b12b875ca3ee5b0b519fc0d80f2720d8f5dee7
2022-08-22 17:42:55 +08:00
Sugar Zhang
b68072194c drm/bridge: synopsys: dw-hdmi-qp: Make audio path always on
Keep ACR, AUDI, AUDS packet always on to make SINK device
active for better compatibility and user experience.

This also fix POP sound on some SINK devices which wakeup
from suspend to active.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I6bb80a85a7ce0ba7046b4ac7bb7d75c38fcd95f3
2022-08-22 17:42:55 +08:00
Sugar Zhang
60d1573824 ASoC: rockchip: i2s-tdm: Adds quirk for HDMI audio path
The HDMI controller ignores the first FRAME_SYNC cycle data,
Lost one frame is no big deal for LPCM, but it does matter
for Bitstream (NLPCM/HBR), So, padding one frame before xfer
the real data to fix it.

Suggested to stop audio source before HDMI configure to make
sure audio data integrity on HDMI-PATH-ALWAYS-ON situation.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I35119736e81dc4687408a59502b9a7ef2f87d3a5
2022-08-22 17:42:55 +08:00
Sugar Zhang
3644caf8de ASoC: rockchip: i2s-tdm: Add support for clk always-on
This patch introduce function always-on which allow controller
to keep clk (BCLK/SYNC) always-on.

In HDMI audio situation, we found some SINK devices need SOURCE
to keep xfer ACR, AUDS packet always on to fix sound compatibility.

And the AUDS packet is drived by audio source (e.g. I2S).

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I4c7aceb504e3b0820c329b398812d04f6a88993d
2022-08-22 17:42:55 +08:00
Sugar Zhang
e1b9f44606 ASoC: rockchip: i2s-tdm: Explicitly delay for dma to fill FIFO
Explicitly delay 1 usec for dma to fill FIFO,
though there was a implied HW delay that around
half LRCK cycle (e.g. 2.6us@192k) from XFER-start
to FIFO-pop.

1 usec is enough to fill at lease 4 entry each FIFO
@192k 8ch 32bit situation.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I9eebfcfa6a3fc73a75b2ea9c700131b5cd366bde
2022-08-22 17:42:55 +08:00
Sugar Zhang
e1df6dab68 ASoC: rockchip: i2s-tdm: Set maxburst per FIFO waterlevel
Set dma maxburst per FIFO waterlevel for better performance
on high bit-rate situation, such as 192k 8ch 32bit situation.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ib8d7596e2f43fa8efec10ce045bb3225e3873070
2022-08-22 17:42:55 +08:00
Sugar Zhang
52397dcf3e ASoC: rockchip: i2s-tdm: Simplify xfer routine
This patch simplify xfer and reset routine. and prepare
for better support for always-on function.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I0d8a2588566783e604dfec26deaf3bfca9178deb
2022-08-22 17:42:55 +08:00
Wyon Bi
2abd3af02c drm/bridge: analogix_dp: Use video format information from register
Force sync polarity to active low for RK3588.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Icbc2b344d67dd1b8e288cfd5117b5065fd4b2142
2022-08-22 14:57:45 +08:00
Wyon Bi
7fbb159554 drm/bridge: analogix_dp: Fix potential NULL pointer dereference
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I737d6ce4f1077ba05c0744fea024652f305adfc1
2022-08-22 14:57:45 +08:00
Ziyuan Xu
d486f41dfc media: i2c: sc3338: increase v-blank to 8ms
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ibf1406ca0967ddace6f073468ddaa2ee6b2eb62f
2022-08-22 11:10:52 +08:00
Sugar Zhang
d2e5b9912d ASoC: rockchip: i2s-tdm: Clean code
* clean and simplify code
* fix clk err handling
* fix copy-paste err

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I09006be2d2ad12a3c71889c22175bc322465c5cb
2022-08-20 11:16:57 +08:00
Xing Zheng
e26cc54362 ASoC: rk3308_codec: fix the crash without do INIT hpdet_work
If we specify the property of acodec "rockchip,no-hp-det", we
shouldn't queue the hpdet_work that is without initialized,
and the dwork timer->function is NULL.

The crashed log:
===
[    0.666484] ------------[ cut here ]------------
[    0.666536] WARNING: CPU: 1 PID: 1 at kernel/workqueue.c:1657 __queue_delayed_work+0x51/0xd8
[    0.666553] Modules linked in:
[    0.666586] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 5.10.110 #168
[    0.666602] Hardware name: Generic DT based system

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: I66de7c031c6d7373eb77e65448771eb183e0888b
2022-08-20 09:54:37 +08:00
Jianqun Xu
efa2755aad pinctrl: rockchip: fix iomux set for rk3588 GPIO0_B4-GPIO0_D7
The pin range from GPIO0_B4 to GPIO0_D7 for rk3588 SoCs should set two
registers for iomux, since each of them has 8 bits width.

This patch fixes a issue when reset the iomux from a value from larger
than 8 to a value littler than 8, the high 4 bits should be reset to
'0'.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I61196f78ceb08ed47b26374c6f1ca7031f15b9d9
2022-08-19 11:30:25 +08:00
Jianwei Fan
de9477630d media: i2c: imx577: add dgain control
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: I2c52c1b57b711c5e8776b39184f0396a0575fa95
2022-08-19 11:18:00 +08:00
Guochun Huang
9218ea9567 mfd: MAX96745: add support line fault monitor status report
GMSL2 serializers include a novel line-fault detection circuit that
detects and reports open-circuit, short-to-battery, short-to-ground,
and line-to-line short. The line-fault monitor is disabled by default,
and configuration options are available through registers. Its status
can be read by register.

Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ie548d25a8492f0ff883cc777c3a14049d25dda9a
2022-08-19 09:44:37 +08:00
Guochun Huang
13c7ab8585 mfd: MAX96755F: add support line fault monitor status report
GMSL2 serializers include a novel line-fault detection circuit that
detects and reports open-circuit, short-to-battery, short-to-ground,
and line-to-line short. The line-fault monitor is disabled by default,
and configuration options are available through registers. Its status
can be read by register.

Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Iad44a7d2a56992f2906376b9a07e708c8f37c05b
2022-08-19 09:44:37 +08:00
Yu Qiaowei
4d223f6c65 video: rockchip: rga3: move rga_dma_sync_flush_range to rga_dma_buf.c
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I2a58ada9e12bba51afe15de55d3f75b28834f931
2022-08-18 21:02:00 +08:00
Yu Qiaowei
8d38661ce3 video: rockchip: rga3: return an error when job_commit failed
when a request is being submitted, if one of the job commits fails,
the submission of the request is aborted and return an error.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I15c0271c95a66288f1232c9e33d731e5c14741c8
2022-08-18 20:07:36 +08:00
Yu Qiaowei
deedcb50d4 video: rockchip: rga3: enable dump_image only when CONFIG_NO_GKI
kernel_read()/kernel_write() are missing from GKI symbol list.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Id8c15e682e6187f551aa48ee28d23944d71b72f6
2022-08-18 20:07:35 +08:00
Jianqun Xu
2c72e670b0 arm64: dts: rockchip: rk3588s move the compatible property ahead for dfi
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I4e2bb5169a9d71e454a09111307c96de3c42cdff
2022-08-18 19:18:58 +08:00
Elon Zhang
c8b2593e7a ARM: configs: rv1106-smart-door: disable thunderboot isp
CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP is not need for now.

Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Change-Id: I6f0d06f8caae764839d87fd3dbcbe35c10140437
2022-08-18 19:14:43 +08:00
Ziyuan Xu
a521037db6 ARM: configs: rv1106: enable ROCKCHIP_THUNDER_BOOT_SERVICE for battery-ipc
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I3f9c7de5dbe76fa4f6f581ec5ebffe1df8798b76
2022-08-18 16:44:57 +08:00
Ziyuan Xu
4cfa4f8150 ARM: dts: rockchip: rv1103g-battery-ipc-v10: enable tb-service for synchronization between A&B
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: If463bd8356abd4986a60e6b8bd9d0c3a01352c66
2022-08-18 16:44:05 +08:00
Ziyuan Xu
e82db3b644 soc: rockchip: tb_service: ensure *cb* to be called when !ROCKCHIP_THUNDER_BOOT_SERVICE
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Id1a876458195c5a8ff591c555a0f9f29672012c6
2022-08-18 16:13:49 +08:00
Ziyuan Xu
c2b9cad6de i2c: rk3x: Serialize interrupt handle when *amp-shared* is available
The "amp-shared" means the other processors might use I2C at the same
time, make sure that the other processors finish.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I43fd964a684e54baf1e600776cbf27b2fe7d6df6
2022-08-18 16:13:47 +08:00
Lin Jianhua
f2e1d39a30 ARM: configs: update rk3308_linux_aarch32_defconfig
1:enable CONFIG_MEDIA_SUPPORT/CONFIG_ROCKCHIP_GRF/CONFIG_RFKILL_RK
2.enable CONFIG_CPU_FREQ_STAT
3:wifi build module
4:enable adb
5:open some debug info

Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
Change-Id: If63ef361336cb24330437384a24ef5f716b03bdf
2022-08-18 14:25:30 +08:00