Commit Graph

1058968 Commits

Author SHA1 Message Date
Finley Xiao
92e72c556e dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible
Add a new compatible for thermal founding on RK3568 SoC.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I5ec192a380ffb331120fa0fed20df83d5d83e8d9
2021-07-14 10:30:49 +08:00
Tao Huang
92d4c59160 nvmem: core: Call nvmem_init() early when CONFIG_ROCKCHIP_THUNDER_BOOT=y
rockchip_otp_module_init() depends on nvmem_init() to init nvmem_bus_type.
But rockchip_otp_module_init() and nvmem_init() are both in the same
subsys_initcall level.

Change-Id: I58bc66519fb76179be3e6a170048a67c0861b224
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2021-07-14 10:30:49 +08:00
Finley Xiao
e621ca5fd6 nvmem: rockchip-efuse: Add mutex lock for rk1808 efuse read
The rk1808 efuse read has some issues when several threads start to read
efuse through nvmem file node.

Thread1                                    thread2
1. timing_init
2.  write auto_ctrl
3.    delay                                  timing_init
4.      read status                            write auto_ctrl
5.        if error goto to timing_deinit         delay

The thread1 will read no finish bit and then goto error, the user will
see a "Input/Output Error".

The thread1 do timing deinit will cause thread2 halt on read status, and
the user will never success to do read efuse again.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I3f462afd844686aac153acc0c33215fbd96827a3
2021-07-14 10:30:49 +08:00
Finley Xiao
bd2d7d615f nvmem: rockchip-efuse: Update driver to use clk_bulk array APIs
Change-Id: I0489a992ed7edb3317b1b5a57522df3a5374cec2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-07-14 10:30:49 +08:00
Liang Chen
cb4ecc7dc3 nvmem: rockchip-efuse: clear efuse timing after read
Clear efuse timing after read to avoid efuse misoperation.

Change-Id: I459d01af9c9a84ab6c621e5e5cf3f01213b4f7f9
Signed-off-by: Liang Chen <cl@rock-chips.com>
2021-07-14 10:30:49 +08:00
Liang Chen
e8b8a27f7e nvmem: rockchip-efuse: add support for rk1808-efuse
This adds the necessary data for handling efuse on the rk1808.

Change-Id: I78b66db1fdc22430ab93b07ad3c7cea3355a7f6e
Signed-off-by: Liang Chen <cl@rock-chips.com>
2021-07-14 10:30:49 +08:00
Liang Chen
8e1e4a51bf dt-bindings: nvmem: rockchip-efuse: add description for RK1808 SoCs
Change-Id: I76c56b0c9709d849c87a059d7e67d67ae98ddbb5
Signed-off-by: Liang Chen <cl@rock-chips.com>
2021-07-14 10:30:49 +08:00
Liang Chen
abbb4ef963 nvmem: rockchip-efuse: add support for rk3128-efuse
This adds the necessary data for handling efuse on the rk3128.

Change-Id: Ieda973675ff959b3157bb4afe6e1dcdfac65506c
Signed-off-by: Liang Chen <cl@rock-chips.com>
2021-07-14 10:30:49 +08:00
Finley Xiao
774fb77ce5 nvmem: rockchip-efuse: add support for rk3288 secure efuse
This adds the necessary data for handling secure efuse on the rk3288.
Need to use secure interface to access efuse when kernel is in no-secure
mode.

Change-Id: I1979f23ed8f85c9eb248de276b32adcbb165bd79
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-07-14 10:30:49 +08:00
Finley Xiao
d774309f8b nvmem: rockchip-efuse: add rk3368-efuse support
This adds the necessary data for handling efuse on the rk3368.
As efuse of rk3368 is secure, use secure interface to access efuse.

Change-Id: I72c29348b7744b232d75ab51c56dc7de0988c24e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-07-14 10:30:49 +08:00
Finley Xiao
09743e83d3 dt-bindings: nvmem: rockchip-otp: Make resets as optional property
Change-Id: Icd2e130548e101a41b3030e90cbec9eca43d408e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-07-14 10:30:49 +08:00
Robin Murphy
2cab89dcae BACKPORT: clk: rockchip: Add appropriate arch dependencies
There's no point offering support for 32-bit platforms to users
configuring a 64-bit kernel - and vice-versa - unless they are
explicitly interested in compile-testing.

Change-Id: I36e9d2c20ba6bb82ae82f12714b14f4fc2dc43f7
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/72abb0f794b8ed77e274e8ee21c22e0bd3223dfd.1603710913.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 6e0781e092)
2021-07-14 10:05:00 +08:00
Tao Huang
eceea1a746 MALI: midgard: Add _mali_profiling_control to rename.h
FATAL: modpost: drivers/gpu/arm/mali400/mali/mali: '_mali_profiling_control'
exported twice. Previous export was in drivers/gpu/arm/midgard/midgard_kbase.ko

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ia75a4edce98dbf5f8d8cbc286c6e5c2faf99c295
2021-07-14 10:03:55 +08:00
Sandy Huang
3ee3c8c01e drm/rockchip: remove drm_atomic_set_property calls
drm_atomic_set_property isn't export function, so we set default prop
vale to instead of it.

Change-Id: I4acc6ddd045415aa180d467b45085609408e2447
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-07-13 20:34:50 +08:00
Andy Yan
eefa1f67a0 drm/rockchip: vop2: Add uv offset for y mirror
Esmart/Smart should add offset in y mirror mode.

Change-Id: I5299543006c702c1492ee740460d0b7536e7d6e8
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-07-13 20:34:50 +08:00
Finley Xiao
b8976991c9 soc: rockchip: pvtm: Add debugfs support when build as module
Change-Id: Icaf80c17344b9cc30fd3e3e39a8070fcbb4499bd
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-07-13 20:27:36 +08:00
Finley Xiao
da2cde8541 soc: rockchip_system_monitor: Add a dummy thermal governor
Add support to change thermal governor to dummy, and the system
monitor will manage cooling devices.

This also fixes the following build errors when build as a module.
ERROR: modpost: "__governor_thermal_table_end" [drivers/soc/rockchip/rockchip_system_monitor.ko] undefined!
ERROR: modpost: "__governor_thermal_table" [drivers/soc/rockchip/rockchip_system_monitor.ko] undefined!

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ia68b5bf2b6d94cb13fafc5cde74bc80b32dfac0a
2021-07-13 20:27:30 +08:00
Simon Xue
888b10e41e PCI: rockchip: support building pcie-rockchip-host to module
Change-Id: Ia9d343f523f7f29e3f70d2fbe7d8b9eb55073508
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2021-07-13 20:25:19 +08:00
Simon Xue
12974c9e3b PCI: rockchip: support building pcie-dw-rockchip to module
Change-Id: Iefbc97c3d5b58fb53d4ad66996ca90088423f480
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2021-07-13 20:25:19 +08:00
Elaine Zhang
d3db9dc0b2 clk: rockchip: clk-pvtm: support module
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I17aa5323ad18b82505e30a44156da358b4ba534f
2021-07-13 19:18:27 +08:00
Finley Xiao
df90644e8f clk: rockchip: Disable boost summary when build as module
In order to fix the following error when enable DEBUG_FS.
drivers/clk/rockchip/clk-pll.c:1643:1: warning: data definition has no type or storage class
error, forbidden warning:clk-pll.c:1643
 late_initcall(boost_debug_init);
 ^~~~~~~~~~~~~
drivers/clk/rockchip/clk-pll.c:1643:1: error: type defaults to 'int' in declaration of 'late_initcall' [-Werror=implicit-int]
drivers/clk/rockchip/clk-pll.c:1643:1: warning: parameter names (without types) in function declaration
error, forbidden warning:clk-pll.c:1643
drivers/clk/rockchip/clk-pll.c:1623:19: warning: 'boost_debug_init' defined but not used [-Wunused-function]
error, forbidden warning:clk-pll.c:1623
 static int __init boost_debug_init(void)
                   ^~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
scripts/Makefile.build:333: recipe for target 'drivers/clk/rockchip/clk-pll.o' failed
make[4]: *** [drivers/clk/rockchip/clk-pll.o] Error 1

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I6aa341ea05925f6c05285329fd56b7c1e7f2307b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2021-07-13 19:18:20 +08:00
Finley Xiao
26a3f658f1 clk: rockchip: export some functions for pll scaling
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I9d6269901a77c62efea4cb1592469ffdccbf815d
2021-07-13 19:06:35 +08:00
David Wu
413e7e6b0a arm64: dts: rockchip: add voppwm support for rk3399
Change-Id: I16b4f77083c05ffa71d569e378ea6e3cc9b1ee54
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-07-13 17:28:14 +08:00
Finley Xiao
454e2669d1 arm64: dts: rockchip: add pvtm node for rk3399
Change-Id: Ic7becefeb7e7a1000b259c21fedda76794b7115c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-07-13 17:10:12 +08:00
Finley Xiao
ee27d73fed arm64: dts: rockchip: rk3399: add gpu pvtm voltage table
stress test:
1. Antutu, use governor simpleondemand
2. Need for Speed, use governor simpleondemand
3. Glmark2, use userspace, scanning frequency

Change-Id: Ibe27380e582b193d900b0d55da3567ce553c32df
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-07-13 16:55:40 +08:00
Jung Zhao
239c747658 arm64: dts: rockchip: rk3399: add iep device node
Change-Id: I725d4668fd5fa29f94055d8ce36b81bcd29c2d52
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-07-13 16:25:54 +08:00
Lin Jinhan
a421a20a4d arm64: dts: rockchip: add rng node for rk3399
use rng of crypto1

Change-Id: Ic8cd339d43012a356d981284726ac4d8158a2316
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-07-13 16:25:36 +08:00
Shengfei xu
7f3b0babc8 arm64: dts: rockchip: add rockchip-suspend node for rk3399
Change-Id: I6af1f487f40c0775102d3b9951617c5d03b884ef
Signed-off-by: Shengfei xu <xsf@rock-chips.com>
2021-07-13 16:25:17 +08:00
Finley Xiao
bee6e65d6a arm64: dts: rockchip: rk3399: Add nocp device node
Change-Id: I9ef68b69a263720aea3d51e854375b51027c94a2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-07-13 16:24:46 +08:00
Lin Huang
0263166d73 arm64: dts: rockchip: rk3399: add dmc and dfi node
To support ddr frequency scaling function, we need
enable dmc and dfi node.

Change-Id: I84ea6bff679365d86937ff10bcdf466ea31901fb
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-07-13 16:11:18 +08:00
Huibin Hong
87d78c122b fiq_debugger: support module and remove some commands
Change-Id: Ie55f18a22a8270289443c50ab8be4f5c364394a6
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2021-07-12 19:12:32 +08:00
Bian Jin chen
917c14f43e input: touchscreen: add touch screen of gslx680 for rk3399-firefly-edp
Change-Id: Ic4fa205f8f71353c4703d745e96ec9056181c198
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>
2021-07-12 18:18:06 +08:00
Finley Xiao
1e41761854 cpufreq: rockchip: Register a system monitor device for cpu
Add support to check initial rate and voltage according to opp table,
limit rate and update voltage according to temperature.

Change-Id: I146787e07be63f9f7eeaf93e8a1594809dcc23e8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-07-12 15:01:47 +08:00
Sandy Huang
0084647e87 drm/rockchip: drv: update rockchip drm driver version to 3.0
linux 4.4:  1.0
linux 4.19: 2.0
linux 5.10: 3.0

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I8f1d7f53ccbdcfd163343ff179271a466a9cc661
2021-07-12 15:01:19 +08:00
Sandy Huang
c910049be1 drm/rockchip: vop2: add more yuv format
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I30f4ca4ce7b9cfc0c3943bb547a57cb5d7547b6c
2021-07-12 15:01:19 +08:00
Sandy Huang
9fad8c5fa8 drm: drm_fourcc: add NV20 and NV30 format
DRM_FORMAT_NV20 and DRM_FORMAT_NV30 is a 2 plane format suitable for
linear layouts, this two format is similar to NV15 has no padding
between component, but NV15 is 4:2:0 sub-sampling, NV20 is 4:2:2
sub-sampling and NV30 is no-sampling.

The '20' and '30' suffix refers to the optimum effective bits per
pixel which is achieved.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I84da7e03125e675f274c6307128b4b7b307767cc
2021-07-12 15:01:19 +08:00
Guochun Huang
255e14f4b3 drm/bridge: dw-mipi-dsi: the lanes of dual-dsi is twice as much as max_data_lanes
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I1666a320a08318f555b145281f4fc324893ebc59
2021-07-12 14:56:56 +08:00
Guochun Huang
292f792757 drm/rockchip: dsi: add support dual dsi
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I6c929771a7f45c778f84f549e28cea74312ad9b8
2021-07-12 14:56:56 +08:00
Simon Xue
c65c0584b6 iommu: rockchip: support building to module
Change-Id: I5ab119b5227c2679ea5b750ed2f78836c9ea8f58
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2021-07-12 09:20:54 +08:00
Sandy Huang
402889ee5f drm/rockchip: vop2: close cluster sub win when main win is closed
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ifad854f2e70fe3487731f6cd1d3c41f2a512087e
2021-07-09 17:21:13 +08:00
Andy Yan
2309468102 drm/rockchip: vop2: Support disable Cluster sub win
Change-Id: Ia2f764992ce51ca61f6ba269083fa643509f58e1
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-07-09 17:21:04 +08:00
Andy Yan
d19ffa72a4 drm/rockchip: vop2: Support set cursor win from dts
for example:

Use CLuster0 as cursor win for vp0.

&vp0 {
	cursor-win-id = <ROCKCHIP_VOP2_CLUSTER0>;
};

Change-Id: I10f7921928fbf7ff803c55a95cbce62df658fbed
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-07-09 17:20:54 +08:00
Sandy Huang
30dd06d9b2 drm/rockchip: vop2: check plane state before check plane oetf
We have some plane not registered to drm core(Such as cluster
plane on some linux system), so they don't have pstate.

And also we don't need to check plane state for oetf for
a inactived plane(has no fb).

Change-Id: I909b665397c3df530ff0f466e0d654dcbb3f1a40
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-07-09 17:20:45 +08:00
Sandy Huang
93f2587f47 drm/rockchip: vop2: only when have active win then need to wait win close
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ieaf6497a8597d5d6d3f4a0eb0169fba55c93b4e2
2021-07-09 17:20:37 +08:00
Sandy Huang
91b41a2818 drm/rockchip: vop2: use default sdr2hdr(1000nit) curve
keep sdr2hdr result consistent between VOP and GPU

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I3ef6b289978d4b0c083d99e93d97a95b2e7f0b25
2021-07-09 17:20:24 +08:00
Sandy Huang
088fa736f9 drm/rockchip: vop2: fix csc config error when at hdr mode
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ide5b9deb13882a561765a2e2be660e3463d1764f
2021-07-09 17:18:29 +08:00
Sandy Huang
0f7ea21642 drm/rockchip: vop2: add more sdr2hdr scene
maybe appear the following scene for sdr2hdr:
1. one sdr layer      -> vop[sdr2hdr]   -> hdr output
2. one hdr layer      -> vop[bypass]  |
                                      | -> hdr output
   one/more sdr layer -> vop[sdr2hdr] |

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I042baf68d36f6f9a089d81928c783e52a2b21499
2021-07-09 17:17:23 +08:00
Andy Yan
cab0d20056 drm/rockchip: vop2: Support set background color from userspace
Add a BACKGROUND property for each crtc.
8 bit for every color channel(r/g/b/y/u/v).

Change-Id: I9439bf16a8142e936508e843cc25b6263e2f661d
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-07-09 17:16:34 +08:00
Andy Yan
e4c73bca35 drm/rockchip: vop2: Fix color key shift to 10bit
Fixes: 8c59d20b75 ("drm/rockchip: vop2: Add color key support")
Change-Id: I449f32eb9e69297b2c37feb85611a550310f2304
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-07-09 17:16:01 +08:00
Sandy Huang
fd219584a9 drm/rockchip: vop2: add more debug info
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I9277ff4a0f363fdb53aed88a33007a31e6f47f4c
2021-07-09 17:14:47 +08:00