This patch add a quirk for some special platforms (e.g. rk3399
platform) which need to do warm reset for USB3 device on resume.
BUG=chrome-os-partner:58347
TEST=Plug an USB3 flash drive in rk3399 Kevin board Type-C
port, then set system enter S3. Wakeup system, check if USB3
device can be detected after resume.
Change-Id: I19acc0560001481e5a952175433e82d17dfb3a40
Signed-off-by: William wu <wulf@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/412488
Commit-Ready: Guenter Roeck <groeck@chromium.org>
Tested-by: Guenter Roeck <groeck@chromium.org>
Tested-by: Inno Park <ih.yoo.park@samsung.com>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
This patch adds a quirk to disable USB 2.0 MAC linestate check
during HS transmit. Refer the dwc3 databook, we can use it for
some special platforms if the linestate not reflect the expected
line state(J) during transmission.
When use this quirk, the controller implements a fixed 40-bit
TxEndDelay after the packet is given on UTMI and ignores the
linestate during the transmit of a token (during token-to-token
and token-to-data IPGAP).
On some rockchip platforms (e.g. rk3399), it requires to disable
the u2mac linestate check to decrease the SSPLIT token to SETUP
token inter-packet delay from 566ns to 466ns, and fix the issue
that FS/LS devices not recognized if inserted through USB 3.0 HUB.
(am from https://patchwork.kernel.org/patch/9684951/)
Change-Id: I6298f59a5b89a76a90c628a58c932942ede2c3ef
Signed-off-by: William Wu <william.wu@rock-chips.com>
Add the device tree bindings document for ROCKCHIP CPUFreq driver.
The operating-points-v2 binding allows us to provide an opp-supported-hw
property for each OPP to define when it is available and an
opp-microvolt-<name> property to choose a suitable voltage for OPP.
This driver reads SoC version and leakage values from eFuse and
provides them as matching data to the opp framework.
Change-Id: I10f959edd46668bedf3be4835bb5ec63e089808d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
U8_MAX payload length can meet most requirements
Change-Id: I77e5780bde72b4229ab36d961dc7498f7c78a468
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
This adds the necessary data for handling efuse on the rk3328.
Change-Id: Ica66635977163f380b7d96d73d3a2423d1e08298
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The exact efuse size is defined in property <reg> before, this assume
that the length of registers is equal to efuse size, but it not true
for some chips, so we need anothor property to redefine efuse size.
Change-Id: I9cdab8adc2a13b55cfcacc3c2248295c4387a806
Signed-off-by: Chen Liang <cl@rock-chips.com>
On rockchip platforms, usb vbus 5V can be controlled by
gpio or pmic while otg work as host mode. If vbus 5v is
supplied from pmic, and usb charger circuit also connect
to pmic, we need to ensure usb vbus is disconnected from
external power source (e.g. PC or USB adapter) before
power on vbus 5v from pmic, otherwise, the pmic may be
broken by the external power. It always happens with rk816
which support usb charge and usb vbus power function.
With this patch, if we use pmic for usb vbus 5v, it needs
to add a new property 'rockchip,usb-pmic-vbus' in dts usb
node, like this:
&usb0 {
rockchip,usb-pmic-vbus;
};
Change-Id: I1055f637e77fb5dd681994ff440293a6682b2a12
Signed-off-by: William Wu <wulf@rock-chips.com>
In future it will be modified to support more rockchip platforms.
Change-Id: I5cd7ce555eefe08b12fbfcda8ef445c4b169e8c6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Set system_serial_low/high from eFuse ID.
Serial can read from /proc/cpuinfo.
Change-Id: If412fc5a89a5e5092b510452fc5a126fdd374ac2
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
This adds the necessary data for handling secure efuse on the rk3288.
Need to use secure interface to access efuse when kernel is in no-secure
mode.
Change-Id: I1979f23ed8f85c9eb248de276b32adcbb165bd79
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This adds the necessary data for handling dfi on the rk3368.
Access the dfi via registers provided by GRF (general register
files) module.
Change-Id: I96c2b4dcd34d90731b749ebdbe6922f01559d8e6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
LSK 17.03 v4.4-android
* tag 'lsk-v4.4-17.03-android': (166 commits)
Linux 4.4.55
ext4: don't BUG when truncating encrypted inodes on the orphan list
dm: flush queued bios when process blocks to avoid deadlock
nfit, libnvdimm: fix interleave set cookie calculation
s390/kdump: Use "LINUX" ELF note name instead of "CORE"
KVM: s390: Fix guest migration for huge guests resulting in panic
mvsas: fix misleading indentation
serial: samsung: Continue to work if DMA request fails
USB: serial: io_ti: fix information leak in completion handler
USB: serial: io_ti: fix NULL-deref in interrupt callback
USB: iowarrior: fix NULL-deref in write
USB: iowarrior: fix NULL-deref at probe
USB: serial: omninet: fix reference leaks at open
USB: serial: safe_serial: fix information leak in completion handler
usb: host: xhci-plat: Fix timeout on removal of hot pluggable xhci controllers
usb: host: xhci-dbg: HCIVERSION should be a binary number
usb: gadget: function: f_fs: pass companion descriptor along
usb: dwc3: gadget: make Set Endpoint Configuration macros safe
usb: gadget: dummy_hcd: clear usb_gadget region before registration
powerpc: Emulation support for load/store instructions on LE
...
Change-Id: I4db95bbe5b2523e19ddf22b3f65863f7f6d46632
The INNO MIPI D-PHY is built in witch a standard digital interface
to talk to any third part Host controller.That is part of Rockchip SoCs,
like rk3368.
Change-Id: I9806882e0e3fb6b20348015d0f34923d1bc46b89
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
This adds support host-port on rk3368 SoC and amend phy Documentation.
Change-Id: I49a2efe37aad8b34505e4dac08336dc4231f4669
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This adds the necessary data for handling efuse on the rk3368.
As efuse of rk3368 is secure, use secure interface to access efuse.
Change-Id: I72c29348b7744b232d75ab51c56dc7de0988c24e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The rk3328 saradc is the same as rk3399, so change the compitiable,
they are both 6 channels.
Change-Id: Ia6104e8c5c3590cc745792b8cd3a457a15bb53d2
Signed-off-by: David Wu <david.wu@rock-chips.com>
commit 6bee835dd5 upstream.
Move mic/mpssd examples to samples and remove it from Documentation
Makefile. Create a new Makefile to build mic/mpssd. It can be built
from top level directory or from mic/mpssd directory:
Run make -C samples/mic/mpssd or cd samples/mic/mpssd; make
Acked-by: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
[backported to 4.4-stable as this code is broken on newer versions of
gcc and we don't want to break the build for a Documentation sample.
- gregkh]
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
this patch is used for rockchip built-in HDMI and DP audio output which are
wired to the same i2s line. so we use a DAI link CPU to multicodecs.
Change-Id: Ie8d1ede201a4d4b4cd11c8c05cd1f6177d844957
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
The ChromeOS Embedded Controller can support controlling its attached
PWMs via its host-command interface. The number of supported PWMs varies
on a per-board basis, but we can autodetect this by checking the error
codes, so we don't need an extra property for this. And because the EC
only allows specifying the duty cycle and not the period, we don't
specify the period via pwm-cells, and instead have only support for one
cell -- to specify the index.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
(cherry picked from commit 9e60f50b4a)
Change-Id: Ibb2ac5cff1e8cc2ab43c9f1f89e68e48da23d897
Signed-off-by: David Wu <david.wu@rock-chips.com>
Add an optional enable GPIO to the pwm-regulator driver.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 27bfa8893b)
Change-Id: I6530165e6bccb4fc82d2916d169a02ecdcbfcd3e
Signed-off-by: David Wu <david.wu@rock-chips.com>
Allow a user to read PWM capture results from sysfs. To start a capture
and read the result, simply read the file:
$ cat $PWMCHIP/capture
The output format is "<period> <duty cycle>".
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
(cherry picked from commit 1a366fe915)
Change-Id: I86326709c373630a9189232a1cf2804a1a6ed380
Signed-off-by: David Wu <david.wu@rock-chips.com>
The "clock-freq-min-max" property was deprecated.
There is "max-frequency" property in drivers/mmc/core/host.c
"max-frequency" can be replaced with "clock-freq-min-max".
Minimum clock value might be set to 100K by default.
Then MMC core should try to find the correct value from 400K to 100K.
So it just needs to set Maximum clock value.
Change-Id: I1c72a891c8afd221b0c395c32c7adf8696cc46f1
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit b023030f10)
This board is similar with the rk3288 evb board but the rk3368 top
board. There exist the act8846 as the pmic.
Moment, add the balight/thermal/emmc/usb.. stuff,
Let the board can happy work.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 5378e28c97)
Change-Id: I78f39fa080d221e06849285b6a0c52bc04d5d1a9
commit 47512cfd0d upstream.
The goldfish platform code registers the platform device unconditionally
which causes havoc in several ways if the goldfish_pdev_bus driver is
enabled:
- Access to the hardcoded physical memory region, which is either not
available or contains stuff which is completely unrelated.
- Prevents that the interrupt of the serial port can be requested
- In case of a spurious interrupt it goes into a infinite loop in the
interrupt handler of the pdev_bus driver (which needs to be fixed
seperately).
Add a 'goldfish' command line option to make the registration opt-in when
the platform is compiled in.
I'm seriously grumpy about this engineering trainwreck, which has seven
SOBs from Intel developers for 50 lines of code. And none of them figured
out that this is broken. Impressive fail!
Fixes: ddd70cf93d ("goldfish: platform device for x86")
Reported-by: Gabriel C <nix.or.die@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
