This patch uses a fixed-regulator instead of GPIO pin for
usb vbus power. It doesn't fix any issue, but it makes more
sense to convert the GPIO code into a fixed-regulator.
Change-Id: I7196a9cd592dbb3fab3ef8b9e99babc613a42869
Signed-off-by: William Wu <william.wu@rock-chips.com>
This patch enables SD(IO) 3.0 for all boards by adding correct
vccq and vcc power supplies, as well as properities required by
UHS-I mode.
Change-Id: Iec11e1d1abe7ef9fc17ba08eece3440d7dcaea0b
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Add simple read only driver for the OTP (One Time Programmable)
memory found on Rockchip SoCs.
Change-Id: I01c63dcacaf471ed7d06e0e8263a14e29af7fb0e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This patch documents the Rockchip otp device tree binding.
Change-Id: I90dc6110c386bd0fab3b9531d857514b300c81df
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
PX30_GRF_SOC_CON5 is intended for postponing the auto switch
of pinmux from SDMMC to JTAG after removing the SD cards.
However, the default value is too small to meet the actual
requirement. Increase this value to 5 seconds currently.
Change-Id: I18fafe07822b81d9cd448ab71c1f0e49a75db357
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reset on too high aclk rate will result in bus dead, so we reduce the aclk
before reset and then recover it after reset.
Change-Id: I38b51c3b39329e2bc96b964e7575d06183d33fd0
Signed-off-by: Zhong Yichong <zyc@rock-chips.com>
Phase calculation should be based on the clock rate of these clk,
which inherits the clock rate from their parents. If the parent
goes wrong, it would be orphan node leading all the clk rate to
be zero. This breaks the normal tuning process whilist probing
the card. Fix them!
Change-Id: I7b64748e90684f8ca9710b63f10205d50d24f6d0
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
As rk3399's sapphire board have used 5 camera sensors on
rk3399-sapphire-excavator-linux.dts, enable configure to support these.
Change-Id: I0afe26ad40aeeba889a556b4024a4798feeaf08e
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
The rk3399 had supported the dmc, the sapphire excavator board should
supported it too.
Change-Id: Id462ca1957b8c4960564d0ca24f71e7811aaabfd
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
1.This driver only report charging status.
2.Support usb and dc charging.
3.Applicable to all charger IC that the
charging current is determined by hardware.
Change-Id: I1c125580248cc1ba770b3c22f0b8dc3c21b980e0
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
In the 3nod full function board, there are some pins is multiplexed
(such as: PWM0/2, SDMMC, IR and SPDIF). So we need create two DT files
rk3229-at-3nod.dts and rk3229-at-3nod-func.dts. In the rk3229-at-3nod,
these pins be iomux to gpio. In the rk3229-at-3nod-func, these pins be
iomux to function pins.
Change-Id: I369dabc4dceb25023ab97b74e12cfef058e522d1
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
Enable usbmon driver to collect traces of I/O on the USB bus.
Change-Id: Idc4b0afa6bb2f2dc8c8af10d28c05e4a169bcd62
Signed-off-by: William Wu <william.wu@rock-chips.com>
Enable usbmon driver to collect traces of I/O on the USB bus.
Change-Id: I7314a2fb01f9ce852e4172aad62ef13fabbd3fd9
Signed-off-by: William Wu <william.wu@rock-chips.com>
Enable usbmon driver to collect traces of I/O on the USB bus.
Change-Id: Ie15f6184ccffb85d440549419a5c5f129d90c7b4
Signed-off-by: William Wu <william.wu@rock-chips.com>
vcc_3v0: supply for wifi bt module, should keep enable in sleep mode.
vcc1v8_dvp: supply for camera, should be off in sleep mode, otherwise,
increase current consumption.
Change-Id: Idfd10f7b8f6fca6db1760e429acc9b215a8cf595
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
When get leakage failed, we assume the leakage is zero.
Change-Id: I7731eaaa6dc31620d0210c1c9138631b8890be8d
Signed-off-by: Liang Chen <cl@rock-chips.com>
add power model for gpu and also add cpu thermal config
Change-Id: Iab5ef69b50c792b35c9ae5ffa863cc106d2c4292
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
since only rk3288 can run on 600MHz, and sometimes other socs
will step into the 600MHz branch when its 3th register value can
meet the condition, it will cause rkvdec crash.
Change-Id: I3668aa22a3d82af6af2c87ca970028685b8b1960
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
The FPGA platform is used for rk3308 validation, which has
one cortex-a35 cpu and uart/timer peripherals.
Change-Id: I3a78cc5afec04d954f4d2715b6a6066400a1c513
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
RK3308 is a Soc from Rockchip, which embedded with quad
ARM Cortex-A35 and highly integrated audio interfaces.
This patch add basic support for it, with arm cpu core
timer/gic/uart/pinctrl enabled.
Change-Id: I924827146fab30bf636440ce3cc7e48c74bc0eaf
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
