Add a new heap named "ion_protected_heap" with heap index as
(ION_HEAP_TYPE_CUSTOM + 1).
The protected heap could be used for secure memory, or memory limit.
Change-Id: I080f7d1c8e0516c1e967c3ec6d1c123d5df1867c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
sata0 is not available for rk3566 and sata2 is available.
Change-Id: I901a509d98826dd63788cde49c4a9caae7d0f6f0
Signed-off-by: Liang Chen <cl@rock-chips.com>
gmac1 access to the NIU bus depends on this clock.
Change-Id: I883e39678693f71acdc655004b59c5abc760ad86
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
If sdr2hdr_path_en is not set in sdr2hdr mode, the dly may
not match with the delay number list in TRM.
Change-Id: I989df532e42dc071ee78db79c234fa9582b8bccd
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
The vop2 default hdr2sdr tf is not good enough,
update custom hdr2sdr_tf from rk3328.
Test video: LG_BT2020_HDR10_H265_10B_2160P_60F_67M_DDR933M_Chess_HDR.mp4
Change-Id: I60b396558ede14c8b561c0403f36cf480c488edd
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
During dwc3 probe, it init the current_dr_role in drd_work,
and it must make sure that the current_dr_role is initialized
to DWC3_GCTL_PRTCAP_DEVICE or DWC3_GCTL_PRTCAP_HOST if it
support dule role mode before do async probe.
However, the drd_work and dwc3_rockchip_async_probe are handled
asynchronously, if the drd_work is handled prior to async probe,
it may fail to call dwc3_core_exit from dwc3_runtime_suspend in
async probe because of uninitialized current_dr_role. If this case
happens, the USB 2.0/3.0 PHY power on/off operations are unbalanced.
This patch get the extcon state before do runtime suspend in async
probe, and init the current_dr_role according to the extcon state.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I4d1f7683d3ef3c5580f35be52d28821c47f6457f
- It is for lite and mem mode, the ultra mode is not configurable.
- Disable sleep debug msg;
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I628aa1da19e2704b382a4a7307566a094daaa63a
The MCU reserves 10 frames raw data for 1080P sensor and about 1MB
header, it's about 32MB memory usage for 1080P on MCU.
Change-Id: I3bed8df0816af789ab4f143725c50e8e43ba12bb
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
The assigned clks take effect off-line capture on MCU, and make MCU
abnormal.
Signed-off-by: Sun ChuanHu <aaron.sun@rock-chips.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ib41b397afc7dd31a898cef9ccdef7b7c9b162f17
1.link enable ispp input video
2.set ispp input format
3.ispp output video config and stream on
4.ispp input video config and stream on
Change-Id: I742ebb71ceb87059e269628e8092177178b0ac45
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
Fake platform devices for ion page pools, which are required by dma api.
Change-Id: Id4b5844f20f993ea1b93704286610555386aeda8
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Which is no longer needed after commit
b67a8b29df ("arm64: mm: only initialize swiotlb when necessary").
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: If1afd62f81b37f81cfdfc9bb4ef95e753b2006c4
Which is no longger needed after commit
b67a8b29df ("arm64: mm: only initialize swiotlb when necessary").
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I4a387406cee1308406bf3630f69c67f6dd4cd30f
1.disable touch q function
2.pull down touch q gpio default to avoid electric leakage when sleep
Change-Id: Iedc1aa31f26d701153138c689bff943dc88ffe89
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
For some chips, the Vmin of NPU 200MHz is the same as NPU 600MHz.
Change-Id: I74bb792473c38d5a16d7f79d8eb8f7ef4feff3b8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
