fireprime is using rk818, which need a battery node for fuel gauge,
or else the input current will be limit to 500mA.
Change-Id: Ie80dbc103d1ac57b704235a9b618b7e9db44c953
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The address@88000000 is out of memory on rk3128-fireprime, so remove
the cma region@88000000, just delete the property <reg>, so that
system will alloc cma region automatically.
Change-Id: I2b9fdf1cd19d9fcecd59421fd551d709f9054cae
Signed-off-by: Liang Chen <cl@rock-chips.com>
ttyS2 and fiq debugger don't use the same uart2
Change-Id: Ibb9db5ff84d334d77787ea6f39a0802ba489781c
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
In order to support 420MHz for gpu and 125MHz, 50MHz for gmac.
Change-Id: I2b0e3edbf08850555c5bd4bc1d063c8923d54bda
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
It doesn't support 400MHz, but support 420MHz.
Change-Id: Ife31469307912f83919b02b532acde91cc0f19ce
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The default parent of i2s_src is 200MHz CPLL, it doesn't meet
the constraint of fractional divider that denominator must be
20 times larger than numerator.
Change-Id: I986525ca7a92cb5883facd1b6e89079398302856
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Enable otg to apply dwc2-controller and u2phy_otg driver.
Change-Id: I5d5b7623ff18b1bf14f8b6e91620bfb88770cd63
Signed-off-by: David Wu <david.wu@rock-chips.com>
If this clock does not enable, the otg controller is
working abnormally.
Change-Id: Ic08043e19d3ef1ed8cfb35267828ff317fb438f6
Signed-off-by: David Wu <david.wu@rock-chips.com>
1.Decrece reserved IDBlock from 16 to 8
2.Decrece print info
Change-Id: I69443b0f2381f061176d6f2cf32497f644564093
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.Extern all controller low layer driver APIs in rkflash_api.h
2.Register dev when controller node is probed;
3.APIs rkflash_dev_xxx for dev register in rkflash_blk.c, support:
rkflash_blk: SLC Nand blk dev;
rkflash_blk: SPI Nand blk dev;
rkflash_blk: SPI Nor mtd dev;
spi_nand_mtd: SPI Nand mtd dev;
spi_nor_mtd: SPI Nor mtd dev;
Change-Id: I5423fead6b6343d1ab94303d30d486dea74b166c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
The pwm clk parent is GPLL,PWM clk not allowed to change freq,
so the GPLL not allowed change mode and freq when pwm is used.
If have trust is need't rk3288_clk_suspend and rk3288_clk_resume.
Change-Id: I4845fda89d7ae7713e8c0e94747c3f4dfd140c6a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Fix bad timing and write the regs all in one including the 0x12(mode
control) when starting up in .s_power().
To avoid bad mipi signal during mipi dphy enabling, let jx_h65
enter sleep mode right after .s_power().
Change-Id: Ib72e790093297d99fc8db385fb8bd8493e4fe52b
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
This patch adds a new RGB media bus formats that describe
30-bit samples transferred over an LVDS bus with five
differential data pairs, serialized into 7 time slots,
using standard VESA/JEIDA data ordering.
Change-Id: I922a48c70f96727f0292004bb38dabab99f6a918
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Primary plane for this CRTC, this is only relevant for legacy IOCTL,
it specifies the plane implicitly used by the SETCRTC and PAGE_FLIP IOCTLs,
It does not have any significance beyond that.
Change-Id: Ia4b0ac8fd4f597cd628377be32eef2ef498f4af3
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
It is a new structure for compat_ioctl and unlock_ioctl.
The target is adpat to kinds of ioctl data.
Data structure as:
cmd_type | flag | size | offset | data
a) each fixed at 32bit.
b) size is the length of following data.
c) In kernel space, first parse this header, then read
the following data according to the cmd_type and data_size.
Change-Id: If3d08d54f42606ec71fbca402e5b330f7f37438d
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
In platform arm32, iommu is shared in different device,
it must attach to ensure hardware working in current device.
Change-Id: I854a362adf6145dcfd796885922683f8a6b7e131
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
for android-10.0: increase the sampling frequency to pass the vts test.
Change-Id: I2d68b51e5697a576acebff03b5b1e92b1c90a7d8
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
The default max segment size is 64Kb, if memory that device
want to map larger than default then it will break to several times
mapping which may result in non-contiguous IOVA. So set to 4Gb
Change-Id: I22eb7f30a3f741689c8c32734509c34f99fd8100
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Use devm_reset_control_get replace devm_reset_control_get_shared
because we want to reset hardware really and don't care about others.
Change-Id: I548ed01e0ce7bbed46c37e2da1476b2623c3d452
Signed-off-by: Grey Li <grey.li@rock-chips.com>
This change adds a kernel config for default enable
the check_at_most_once dm-verity option. This is to give us
the ability to enforce the usage of at_most_once
for entry-level phones.
Change-Id: Id40416672c4c2209a9866997d8c164b5de5dc7dc
Signed-off-by: Patrik Torstensson <totte@google.com>
Bug: 72664474
Sync with floral_defconfig
CONFIG_ZRAM_WRITEBACK=y
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ib5be461af0c4b290983e8374e0e9fe2ebae2594f
