rga2 and edp pd is the same -- PD_VIO.
if rga2 initcall earlier than edp,
then it will flash sreen when power on.
Change-Id: Ifa9b4f1f985a6de66d48915f56bc7d225ae0d7a9
Signed-off-by: xubilv <xbl@rock-chips.com>
Add basic support for the PCM-947 carrier board, a RK3288 based development
board made by PHYTEC. This board works in a combination with
the phyCORE-RK3288 System on Module.
Following interfaces and devices are available on the PCM-947 carrier board:
- 2x UART
- micro SDMMC
- USB host and USB otg
- USB 3503 HSIC hub
- Ethernet
- 2nd alternative KSZ9031 ethernet phy
- Display connectors: PHYTEC LVDS, DDG LVDS, parallel signals, HDMI
- Parallel Camera CIF
- SGTL5000-32QFN audio codec
- 4x LEDs connected via PCA9533
- 2 user buttons
- Expansion connectors for WiFi and other modules
- RTC RV-4162-C7
- Resistive touch STMPE811
- EEPROM M24C32
(am from https://patchwork.codeaurora.org/patch/217711/)
Change-Id: Iab737032fa74e5fecc49ff6d06d27cc952ff1a6f
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC.
The module can be connected to different carrier boards.
It can be also equipped with different RAM, SPI flash and eMMC variants.
The Rapid Development Kit option is using the following setup:
- 1 GB DDR3 RAM (2 Banks)
- 1x 4 KB EEPROM
- DP83867 Gigabit Ethernet PHY
- 16 MB SPI Flash
- 4 GB eMMC Flash
(am from https://patchwork.codeaurora.org/patch/217709/)
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Change-Id: Id1155a479dfcddfaeb870461de79855c6680db9c
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
1. support arm v7.
2. support 128MB and 256MB SLC NAND FLASH.
Change-Id: I3b2972ed27c138ed7a6c75e2fefa10ce06a5b668
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
Companion descriptor is only used for SuperSpeed endpoints,
if the endpoints are HighSpeed or FullSpeed, the Companion
descriptor will not allocated, so we can only access it if
gadget is SuperSpeed.
I can reproduce this issue on Rockchip platform rk3368 SoC
which supports USB 2.0, and use functionfs for ADB. Kernel
build with CONFIG_KASAN=y and CONFIG_SLUB_DEBUG=y report
the following BUG:
==================================================================
BUG: KASAN: slab-out-of-bounds in ffs_func_set_alt+0x224/0x3a0 at addr ffffffc0601f6509
Read of size 1 by task swapper/0/0
============================================================================
BUG kmalloc-256 (Not tainted): kasan: bad access detected
----------------------------------------------------------------------------
Disabling lock debugging due to kernel taint
INFO: Allocated in ffs_func_bind+0x52c/0x99c age=1275 cpu=0 pid=1
alloc_debug_processing+0x128/0x17c
___slab_alloc.constprop.58+0x50c/0x610
__slab_alloc.isra.55.constprop.57+0x24/0x34
__kmalloc+0xe0/0x250
ffs_func_bind+0x52c/0x99c
usb_add_function+0xd8/0x1d4
configfs_composite_bind+0x48c/0x570
udc_bind_to_driver+0x6c/0x170
usb_udc_attach_driver+0xa4/0xd0
gadget_dev_desc_UDC_store+0xcc/0x118
configfs_write_file+0x1a0/0x1f8
__vfs_write+0x64/0x174
vfs_write+0xe4/0x200
SyS_write+0x68/0xc8
el0_svc_naked+0x24/0x28
INFO: Freed in inode_doinit_with_dentry+0x3f0/0x7c4 age=1275 cpu=7 pid=247
...
Call trace:
[<ffffff900808aab4>] dump_backtrace+0x0/0x230
[<ffffff900808acf8>] show_stack+0x14/0x1c
[<ffffff90084ad420>] dump_stack+0xa0/0xc8
[<ffffff90082157cc>] print_trailer+0x188/0x198
[<ffffff9008215948>] object_err+0x3c/0x4c
[<ffffff900821b5ac>] kasan_report+0x324/0x4dc
[<ffffff900821aa38>] __asan_load1+0x24/0x50
[<ffffff90089eb750>] ffs_func_set_alt+0x224/0x3a0
[<ffffff90089d3760>] composite_setup+0xdcc/0x1ac8
[<ffffff90089d7394>] android_setup+0x124/0x1a0
[<ffffff90089acd18>] _setup+0x54/0x74
[<ffffff90089b6b98>] handle_ep0+0x3288/0x4390
[<ffffff90089b9b44>] dwc_otg_pcd_handle_out_ep_intr+0x14dc/0x2ae4
[<ffffff90089be85c>] dwc_otg_pcd_handle_intr+0x1ec/0x298
[<ffffff90089ad680>] dwc_otg_pcd_irq+0x10/0x20
[<ffffff9008116328>] handle_irq_event_percpu+0x124/0x3ac
[<ffffff9008116610>] handle_irq_event+0x60/0xa0
[<ffffff900811af30>] handle_fasteoi_irq+0x10c/0x1d4
[<ffffff9008115568>] generic_handle_irq+0x30/0x40
[<ffffff90081159b4>] __handle_domain_irq+0xac/0xdc
[<ffffff9008080e9c>] gic_handle_irq+0x64/0xa4
...
Memory state around the buggy address:
ffffffc0601f6400: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ffffffc0601f6480: 00 00 00 00 00 00 00 00 00 00 06 fc fc fc fc fc
>ffffffc0601f6500: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
^
ffffffc0601f6580: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
ffffffc0601f6600: fc fc fc fc fc fc fc fc 00 00 00 00 00 00 00 00
==================================================================
(am from https://patchwork.kernel.org/patch/9697795/)
Change-Id: Ic27fc44663f51e139825cb36ca16e4b315293fe2
Signed-off-by: William Wu <william.wu@rock-chips.com>
Refer to E.2 (P67) of Device Class Definition for Human Interface
Devices V1.11, the bmAttributes field of the standard configuration
descriptor bit 5 should be set if the HID support Remote Wakeup.
This patch enable the usb HID to wake up the system if the HID
supports remote wakeup.
Change-Id: I169c49ff6187b6400b91633332a72964caca1a94
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
PSCI v1.0 introduces a new API called PSCI_SYSTEM_SUSPEND. This API
provides the mechanism by which the calling OS can request entry into
the deepest possible system sleep state.
Change-Id: I2dbb56ad337315eee76170443de96a1df05f8aab
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
RKVDEC second generation uses a new device id.
It is the new generation of the RKV decoder found on
the RK3328 platform.
Change-Id: I63891b7f774e68d8820f1a9c88052795af37f99d
Signed-off-by: Randy Li <randy.li@rock-chips.com>
I re-order all the merged nodes in alphabetic order.
Change-Id: I677259b1ec3cd8463c8ef557a9c1f0afbef66318
Signed-off-by: Randy Li <randy.li@rock-chips.com>
This patch add a quirk for some special platforms (e.g. rk3399
platform) which need to do warm reset for USB3 device on resume.
BUG=chrome-os-partner:58347
TEST=Plug an USB3 flash drive in rk3399 Kevin board Type-C
port, then set system enter S3. Wakeup system, check if USB3
device can be detected after resume.
Change-Id: I19acc0560001481e5a952175433e82d17dfb3a40
Signed-off-by: William wu <wulf@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/412488
Commit-Ready: Guenter Roeck <groeck@chromium.org>
Tested-by: Guenter Roeck <groeck@chromium.org>
Tested-by: Inno Park <ih.yoo.park@samsung.com>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Some xHC controllers (e.g. Rockchip rk3399) integrated in
DWC3 IP, will be powered down in S3, and reinitialized after
resume.
However, if a USB3 device is plugged before system enter S3,
the device will be disconnected after resume because of xHC
lose power. And the device can't be detected again even if
we reinitialize xHC. In this case, CCS and CSC is '0' and
can't reflect the current state of the port, also the link
state stays in Rx.Detect.
So try to do warm reset on resume to reset USB3 device to
the default state, also reset a USB3 link, and re-exchange
link configuration information.
BUG=chrome-os-partner:58347
TEST=Plug an USB3 flash drive in rk3399 Kevin board Type-C
port, then set system enter S3. Wakeup system, check if USB3
device can be detected after resume.
Change-Id: I90975a48866569f2c2422a244afc618a3e427f57
Signed-off-by: William wu <wulf@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/412487
Commit-Ready: Guenter Roeck <groeck@chromium.org>
Tested-by: Guenter Roeck <groeck@chromium.org>
Tested-by: Inno Park <ih.yoo.park@samsung.com>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
rk3368 rga sometime may timeout when do scaling, and it can't
be restore until do a non-scale rga work.
So hack that, if timeout with scaling work, do a tiny non-scale rga
work before normal work.
Change-Id: I4598741347c44a1ff3c2272270f4c6a1def36177
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
IC type options 00, 13 and 23 are sharing the same DIE_ID 0.
Let's differentiate between these revisions.
FAN53555UC13X has the ID 0 and REV 0xf, starts at 800mV and
increments in 10mV steps.
Change-Id: I3fdcd305013ccef73145da2b84f303021304876a
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit e57cbb70b7)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
FAN53555BUC18X has the DIE_ID 8, starts at 600mV and
increments in 10mV steps.
Change-Id: If4f7d2d911748c42e79ad8268b884275d4230aef
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 5e39cf4972)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
This isn't currently used by the driver but the correct value is 19
since DSIHOST0 is 51 in the TRM and the GIC offset requires 32 to be
subtracted.
Change-Id: I81ad5143296227aa0cd67f7d33e23db6ecc6cf35
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 5415ba4065)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
if edp_panel add disp_timings, it will conflict with mipi_panel.
Change-Id: Ic6d9bcb5f38670d203ca9c220354f1ac476ccbfb
Signed-off-by: xubilv <xbl@rock-chips.com>
Since everybody copied my own mistake from the DT binding example,
let's address all the offenders in one swift go.
Most of them got the CPU interface size wrong (4kB, while it should
be 8kB), except for both keystone platforms which got the control
interface wrong (4kB instead of 8kB).
In a few cases where I knew for sure what implementation was used,
I've added the "arm,gic-400" compatible string. I'm 99% sure that
this is what everyone is using, but short of having the TRM for
all the other SoCs, I've left them alone.
Change-Id: I15f66453fa9db952d1758cd5b61432405b019dc8
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
(cherry picked from commit 387720c938)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
