To set dw hdmi i2c bus adapter scl clock rate, we introduce two device
tree parameter, ddc-i2c-scl-high-time-ns and ddc-i2c-scl-low-time-ns.
ddc-i2c-scl-high-time-ns: how many ns SCL hold high
ddc-i2c-scl-low-time-ns: how many ns SCL hold low
After measurement, 50KHz scl clock rate recommended configuration is:
&hdmi {
ddc-i2c-scl-high-time-ns = <9625>;
ddc-i2c-scl-low-time-ns = <10000>;
};
100KHz recommended configuration is:
&hdmi {
ddc-i2c-scl-high-time-ns = <4708>;
ddc-i2c-scl-low-time-ns = <4916>;
};
If dts parameter is not available, the default scl rate is 100KHz.
Change-Id: I6f6b0bf1694ab59e70da789ead99e15a53c93e4d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
This patch add hdmi_output_colorimetry to support modify
hdmi output colorimetry. It could be following value:
- None
- IUT_2020
Default value is None, which means normal hdmi output
colorimetry.
Change-Id: Ib4883fd0553d9d4193c7295812d2c1433724fe63
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
CEA 861.3 spec adds colorimetry data block for HDMI.
Parsing the block to get the colorimetry data from
panel.
v2: Rebase
v3: No Change
v4: Addressed Shashank's review comments. Updated
colorimetry field to 16 bit as DCI-P3 got added
in CEA 861-G spec, as pointed out by Shashank.
v5: Fixed checkpatch warnings with --strict option.
Change-Id: Ia82d4c04edff53bd4d6c4411dd90391497140e85
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10861325/)
there are maximum TMDS clock limit, when the clock is out of range
reducing frequency by set color format to yuv420 and/or set color
depth to 8bit
Change-Id: I8b79de97329561bf0399d05c0264a5c818f844fc
Signed-off-by: xuhuicong <xhc@rock-chips.com>
If color depth is automatic, it is same as 8bit.
If tmdsclk > max_tmds_clock, fall back to 8bit.
Change-Id: Ia8cbf5206831ef99456ae59add94c6f8b5a33380
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
For some display device, max_tmds_clock is 0, we think
max_tmds_clock is 340MHz. If tmdsclock > max_tmds_clock,
depth should fall back to 8bit. And If display mode support
YCBCR420, output format is YCBCR420.
Because max tmds clk of RK3368 is 340MHz, hdmi output policy
is same as mentioned above.
It is need to check tmds clock rate at the last. So we move
depth checking into dw_hdmi_rockchip_select_output.
Change-Id: I27e029fc0171b175ddbfa453ed12854ab6a7432b
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
VOP irq is share with VOP mmu, so the irq_desc is point to the same
address, this maybe case the following bug:
vop_bind()
devm_request_irq() -> irq_desc->depth is 0
disable_irq() -> irq_desc->depth is 1
encoder/connector/panel maybe bind failed, so next step is:
vop_unbind()
……
vop_bind() again
devm_request_irq() -> because the irq_desc is share with VOP MMU,
the irq_desc isn't freed.so the depth is 1
disable_irq() -> irq_desc->depth is 2
next step when we want to enable_irq, the irq_desc->depth is 2, the GIC
will not enable VOP irq realy.
so we update the VOP irq control, delete the GIC VOP interrupt control.
after this the VOP interrupt only control by VOP interrupt register.
maybe we can enable_irq at vop_unbind when vop_bind failed to keep irq
balance, but the enable_irq() at vop_unbind() seem not friendly.
Change-Id: I30ee0b6973e8eebb9209b10d8bbbfb6cbcfb30e8
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
The Innosilicon Video Combo PHY not only supports MIPI DSI,
but also LVDS and TTL functions with small die size and low
pin count. Customers can choose according to their own applications.
Change-Id: I0e4a5f69af5cc967b5df0fb17a51c43cef9ea33f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This patch adds more generic PHY modes to the phy_mode enum, to
allow configuring generic PHYs to the MIPI/LVDS/TTL mode by
using the set_mode callback.
Change-Id: Ib6966828011aa52f1f133449f69df46c2001a57b
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
PX30 vopb have win0, win1 and win2 layers.the formats they support below:
Win0: XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16 NV12 NV16 NV24 NA12 NA16 NA24
Win1/2: XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16
Only the win0 layer support NV12 format(video decode format).
So change to use win0 for video overlay layer and win1 for ui layer.
Change-Id: I7ef8bda4be908188700ca4d3f1df23a6336e02b2
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
AFAWK, there are four layers in RK3399's VOPB, and two layers for
RK3399's VOPL.
And RK3399's VOBL has the win0 and win2 layers, the formats they support
as below.
win0:
XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16 NV12 NV16 NV24 NA12 NA16 NA24
win2:
XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16
So only win0 layer supports NV12 format (for video decode format),
adjust the overlay for video and primary layer for display.
It didn't care this case if some platforms had handled the display in
application (e.g android), then on the Linux platform, it's hard to handle
the all kinds of cases in Display application, perhaps the linux needn't
this patch fixes it in the future.
Depend-CL:76144
Fixes: d82f1d3e58
("arm64: dts: rockchip: reasonable alllcation of VOP on rk3399 linux")
Change-Id: Id93b315b6e3ae670bf5ea4dc0a64e140c6e37e80
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
The zpos currently configure is the order in vop_win_data array,
which is related to the actual hardware plane.
But in the Linux platform, such as video hardware and camera preview,
it can only be played on the nv12 plane.
So set the order of zpos to PRIMARY < OVERLAY (if have) < CURSOR (if have).
Change-Id: Ia9ab3cb9225fd2c385703109afbfbb42a1564110
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
AOSP 983425fe9480 ("eliminate meaningless non-zero values of second_offset and ramdisk_offset")
Revert 7261bb083a97 ("Check DTB image size for boot image header version 2 and above")
which failed to repack image without dtb.
Change-Id: I3d3b7ebb87f137bcc66dd7d59bac3423c0c33193
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
As rockchip maybe appear one crtc connect two connecter,
the conn_state->best_encoder always isn't NULL, so
here no need warning.
Change-Id: I3e4274e64f4c2b4eea5d9700cebffb716425426b
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
The Dynamic Range and Mastering InfoFrame carries data such as
the EOTF and the Static Metadata associated with the dynamic
range of the video stream.
This function is introduced in the 2.11a version.
Change-Id: I279cc0665e34d75209774013882ccc8946ce6da5
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
HDR_PANEL_METADATA is used to indicate HDR capacity of sink device.
Change-Id: I598a7bb5634f14b57f94135fd3be6b0ad2075116
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
HDMI will set vop eotf and color space according to display mode.
Change-Id: I469d03dd1f14a2bcd75ed5c8e3227cd1d34eb354
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
HDR_SOURCE_METADATA property is used to set source hdr metadata,
which will be sent to sink though HDMI DRM infoframe.
Change-Id: If3500cb505c16c2f0caf66b8e64b4d80b93b228f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
ADD HLG EOTF to the list of EOTF transfer functions supported.
Hybrid Log-Gamma (HLG) is a high dynamic range (HDR) standard.
HLG defines a nonlinear transfer function in which the lower
half of the signal values use a gamma curve and the upper half
of the signal values use a logarithmic curve.
v2: Rebase
v3: Fixed a warning message
v4: Addressed Shashank's review comments
v5: Addressed Jonas Karlman's review comment and dropped the i915
tag from header.
Change-Id: I6542cb0cb6cfccb92f76aa98df5d054fc1e908d8
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-8-git-send-email-uma.shankar@intel.com
(cherry picked from commit b5e3eed1ee)
Enable Dynamic Range and Mastering Infoframe for HDR
content, which is defined in CEA 861.3 spec.
The metadata will be computed based on blending
policy in userspace compositors and passed as a connector
property blob to driver. The same will be sent as infoframe
to panel which support HDR.
Added the const version of infoframe for DRM metadata
for HDR.
v2: Rebase and added Ville's POC changes.
v3: No Change
v4: Addressed Shashank's review comments and merged the
patch making drm infoframe function arguments as constant.
v5: Rebase
v6: Fixed checkpatch warnings with --strict option. Addressed
Shashank's review comments and added his RB.
v7: Addressed Brian Starkey's review comments. Merged 2 patches
into one.
v8: Addressed Jonas Karlman review comments.
v9: Addressed Jonas Karlman review comments.
v10: Addressed Ville's review comments.
v11: Added BUILD_BUG_ON and sizeof instead of magic numbers as
per Ville's comments.
Change-Id: I9f64d3df1a62afb83a5075662d96964c4dd3c2be
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-5-git-send-email-uma.shankar@intel.com
(cherry picked from commit 2cdbfd66a8)
Let's make the infoframe pack functions usable with a const infoframe
structure. This allows us to precompute the infoframe earlier, and still
pack it later when we're no longer allowed to modify the structure.
So now we end up with a _check()+_pack_only() or _pack() functions
depending on whether you want to precompute the infoframes or not.
The names aren't great but I was lazy and didn't want to change all the
drivers.
v2: Deal with exynos churn
Actually export the new funcs
v3: Fix various documentation fails (Hans)
Change-Id: I5a74363af0e985ffa4f7698c9eef486b69882961
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Cc: linux-media@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180921143332.28970-1-ville.syrjala@linux.intel.com
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
(cherry picked from commit c5e69ab35c)
HDR metadata block is introduced in CEA-861.3 spec.
Parsing the same to get the panel's HDR metadata.
v2: Rebase and added Ville's POC changes to the patch.
v3: No Change
v4: Addressed Shashank's review comments
v5: Addressed Shashank's comment and added his RB.
v6: Addressed Jonas Karlman review comments.
v7: Adressed Ville's review comments and fixed the issue
with length handling.
v8: Put the length check as per the convention followed in
existing code, as suggested by Ville.
Change-Id: Ia13317764bab48f95e9fffd5f9bce7e9d64853ba
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-4-git-send-email-uma.shankar@intel.com
(cherry picked from commit e85959d6cb)
This patch adds a blob property to get HDR metadata
information from userspace. This will be send as part
of AVI Infoframe to panel.
It also implements get() and set() functions for HDR output
metadata property.The blob data is received from userspace and
saved in connector state, the same is returned as blob in get
property call to userspace.
v2: Rebase and modified the metadata structure elements
as per Ville's POC changes.
v3: No Change
v4: Addressed Shashank's review comments
v5: Rebase.
v6: Addressed Brian Starkey's review comments, defined
new structure with header for dynamic metadata scalability.
Merge get/set property functions for metadata in this patch.
v7: Addressed Jonas Karlman review comments and defined separate
structure for infoframe to better align with CTA 861.G spec. Added
Shashank's RB.
v8: Addressed Ville's review comments. Moved sink metadata structure
out of uapi headers as suggested by Jonas Karlman.
v9: Rebase and addressed Jonas Karlman review comments.
v10: Addressed Ville's review comments, dropped the metdata_changed
state variable as its not needed anymore.
Change-Id: I5dc8882f8e9dd488140e2747195c278f94b1e1fa
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-2-git-send-email-uma.shankar@intel.com
(cherry picked from commit fbb5d0353c)
When switch color new hdmi phy config may not be set because hdmi phy
is already on in upstream code.
So we should power down hdmi phy first before power on hdmi phy when
set new hdmi phy config.
Change-Id: Icb1cf29931f1084cc70b0b320137260491497771
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
if bootup with hdmi plugin initialize mtmdsclock to modify voicelessness
and set bridge_is_on true to modify green screen when reboot from recovery
Change-Id: I0ed9f956d62ab4087cb42a54dafba6a0fc9e5a7e
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
Introduce mtmdsclock to record tmds clock, which is different
to mpixelclock in deep color mode. Use this variable to select
synopsys phy curr_ctrl/phy_config, and audio N/CTS.
Change-Id: Ia78dee9c4901d2f1ca7f339dfb030d65bbf6861d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
if get edid error at bootup the input bus format will be set as
rgb and hdmi is no reinit, so hdmi color will be wrong if set yuv
in uboot, now reinit hdmi in this case.
Change-Id: I8d117b6e241079ceab44793f6566adf91e9d84c6
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
to modify bus width error sometime plug out hdmi and switch cvbs output
Change-Id: Iaa7914fbccc99991fbfbc5495ba647f97997c8ba
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
