At same voltage and frequency, the greater the PVTM value, the lower
the OPP's voltage. In order to reduce power consumption, it is necessary
to adjust OPP's voltage according to PVTM value.
Change-Id: Ic1d2a74048f6c7d97d92868292f14776ea380d99
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
switch TX1/RX1 D-PHY of rk3288/3399 to RX status before it's
initialization to avoid conflicting with sensor output.
Change-Id: I672730fe5fb5a33b8437df1ae61078a9a79ac41b
Signed-off-by: zhangyunlong <dalon.zhang@rock-chips.com>
Enable the nand node by default in the android dtsi as
they're wired on every board for drmboot compatible.
Change-Id: I63aea9be6ca43fb91f7ec6616f5b9051ca5c23a8
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
RK1000 is a digital-analog mixed chip which has tve output function.
RK1000's registers can be written and read through I2C interaface.
Because RK1000's I2C need dclk and mclk, RK1000 TVE should be registered
after RK1000 CORE. RBG signal output is controlled by LVDS, so RK1000
should be registered as connector and attach LVDS encoder.
Change-Id: I65b40826bd1dbf07d4fa94ecdf8c75005008731f
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
RK1000's control register block need mclk for i2c communication.
So mclk should be enabled in advance.
RK1000's control register block should be registered before RK1000
TVE.
Change-Id: Iba9a2a410fe927666072f8d246995462a860ec3a
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
1. Fix disconnect issue during system suspend
2. Add more module support
3. fix read country code from config
4. modify config.txt reading behavior
Change-Id: Ib6392523752d9af60329df0dd810ceb8b76467ff
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
Fixes:
error: redefinition of 'rockchip_drm_backlight_update'
error: redefinition of 'of_rockchip_drm_sub_backlight_register'
Change-Id: I4eeebc6075387f720acec597cee765e2a1a83b7c
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
When begin connecting to PC in device mode, the driver will hold a
wake lock to prevent system from entering deep sleep. If it fails
to connect to PC or doesn't detect the vbus, the driver will suspend
usb phy and disable usb clk, and release the wake lock.
If unlock the wake lock first, system may enter deep sleep before
suspend usb phy and disable usb clk. Then wake up system by pull
out the usb cable, it may cause usb interrupt abnormal.
TEST=rk3126c connect the usb charger into the charging interface,
after the system entered deep sleep, pull out the usb cable with
the following log:
irq 42: nobody cared (try booting with the "irqpoll" option)
CPU: 0 PID: 146 Comm: charger Not tainted 3.10.104 #133
[<c0014088>] unwind_backtrace+0x0/0xe0
[<c00118cc>] show_stack+0x10/0x14
[<c00b0be0>] __report_bad_irq+0x28/0xb8
[<c00b0e68>] note_interrupt+0x138/0x1cc
[<c00aef88>] handle_irq_event_percpu+0x2c0/0x2f4
[<c00aeff8>] handle_irq_event+0x3c/0x5c
[<c00b1a20>] handle_fasteoi_irq+0xbc/0x124
[<c00ae764>] generic_handle_irq+0x20/0x30
[<c000e4cc>] handle_IRQ+0x64/0x8c
[<c000853c>] gic_handle_irq+0x38/0x5c
handlers:
[<c042b3ec>] dwc_otg_common_irq
[<c0438704>] dwc_otg_pcd_irq
[<c03fab48>] usb_hcd_irq
Disabling IRQ #42
Change-Id: Id36717ae68e02226255c1207aeded0bd6fb356cd
Signed-off-by: Feng Mingli <fml@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
PMIC should set "system-power-controller" in dts, otherwise
it couldn't be closed when system shutdown.
Change-Id: I3efd7efb1b1911621f21e8a741e2f6c2eebb60dc
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
dclk_ddr is supported on rk3368 vop, it would effect the
display quality on YUV420 mode.
Change-Id: Ia624a1f397e732d80d3908b8e712ae79d3ad7948
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Reported-by: Huacong Yang <will.yang@rock-chips.com>
From Rockchips fractional divider description:
3.1.9 Fractional divider usage
To get specific frequency, clocks of I2S, SPDIF, UARTcan be generated by
fractional divider. Generally you must set that denominator is 20 times
larger than numerator to generate precise clock frequency. So the
fractional divider applies only to generate low frequency clock like
I2S, UART.
Therefore add a special approximation function that handles this
special requirement.
Change-Id: I80260392539da9d8cab79a5f6e37534d003bdbd1
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Fractional dividers may have special requirements concerning numerator
and denominator selection that differ from just getting the best
approximation.
For example on Rockchip socs the denominator must be at least 20 times
larger than the numerator to generate precise clock frequencies.
Therefore add the ability to provide custom approximation functions.
Change-Id: I656a5851a3e2581b7f1b44bd67681ac00172873d
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
to_clk_*(_hw) macros have been repeatedly defined in many places.
This patch moves all the to_clk_*(_hw) definitions in the common
clock framework to public header clk-provider.h, and drop the local
definitions.
Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 5fd9c05c84)
Change-Id: Ib0f9de8b9aeb30302b9d21e6668a35d18764517e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
So we can define reg offset according to TRM, otherwise it will make
us confused.
Change-Id: I1687542fcaf7ac4e6e78d863e8940f6604794407
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This reverts commit 9a9259a78c.
It seems schedtune_init_cgroups and schedtune_boostgroup_init
all call raw_spin_lock_init(&bg->lock), it is wrong.
Change-Id: Icbdfeaf81f4fb59fdcc02623ac5e26d41bd1e496
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
As gpu clock sources had been changed, the gpu frequencies also
should modifiy.
1. 297MHz is not support and replace it with 300MHz.
2. If enable tow vops, 500MHz is not support,
so remove it from the default table.
Change-Id: If2a653571f0222e895f7df825eeb8ae43ce99332
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Add efuse_id for cpuinfo to get system serial number.
Change-Id: If197c2961611364a2cb94972c33171bea105c61b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Fixes: 7f1f1ef ("drm/rockchip: vop: don't force enable post scale")
Change-Id: I57b44e7fe00bce7615ecde2e1f23837c74532c68
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
