Commit Graph

25480 Commits

Author SHA1 Message Date
Sandy Huang
d3cc85847c drm/rockchip: px30 vop: fix iommu pagefault when disable win2
In the bandwidth tension environment when close win2, vop will access
the freed memory lead to iommu pagefault. so we add this reset to workaround.

Change-Id: I22b0c0f145d042e3aaf98fb45ffff6304c93963c
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-07 15:17:23 +08:00
Sandy Huang
50b9027229 drm/rockchip: fix some problem on the process
Because when enable uboot logo display, vop_crtc_enable() will not be
called when power on, this will lead to some vop initial like
axi channel and some debug irq will not be enabled. so we move some
config to vop_initial() and call from vop_crtc_loader_protect().

Change-Id: I86f02e2e7d12b78cce17e278baaf6dff93137167
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-07 15:17:23 +08:00
Sandy Huang
9c0c016732 drm/rockchip: vop: add feature for alpha add scale
some version vop unsupport pixel alpha add scale, this case
will lead to display error and post empty.

Change-Id: I32820a14292b46ce61fd30bfccdaa5e4f635de49
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-07 15:17:23 +08:00
Sandy Huang
285f058cfe Revert "drm/rockchip: px30 vop: delete win2"
This reverts commit 424a08f4cb.
Change-Id: I32820a14292b46ce61fd30bfccdaa5e4f635de4b
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-07 15:17:23 +08:00
Sandy Huang
5851d77b10 Revert "drm/rockchip: px30 vop: set win2 zorder to 2"
This reverts commit 91b8d990c0.
Change-Id: I32820a14292b46ce61fd30bfccdaa5e4f635de4a
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-07 15:17:23 +08:00
Zhen Chen
789d098dd4 MALI: bifrost: rockchip: not to enable clk_gpu when probing
Otherwise, clk_gpu won't be disabled actually in the runtime.

Change-Id: I92787a5e23bfb92f5a79efda92c130832751cc3b
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-03-07 09:19:16 +08:00
Sandy Huang
f72adfb770 drm/rockchip: vop: fix out of memory when calc bandwidth
bug log:
[   21.432332] Internal error: Accessing user space memory outside uaccess.h routines: 96000005 [#1] PREEMPT SMP
[   21.433228] Modules linked in:
[   21.433530] CPU: 3 PID: 716 Comm: ndroid.settings Not tainted 4.4.83 #121
[   21.434130] Hardware name: Rockchip RK3399 Excavator Board edp (Android) (DT)
[   21.434768] task: ffffffc0cd63e800 task.stack: ffffffc0cd630000
[   21.435304] PC is at kmem_cache_alloc_trace+0xa8/0x204
[   21.435776] LR is at binder_transaction+0x58c/0x1c44
......
[   21.572340] [<ffffff80081ad584>] kmem_cache_alloc_trace+0xa8/0x204
[   21.572890] [<ffffff800893964c>] binder_transaction+0x58c/0x1c44
[   21.573424] [<ffffff800893cd08>] binder_thread_write+0xa44/0x136c
[   21.573968] [<ffffff800893d710>] binder_ioctl_write_read+0xe0/0x314
[   21.574523] [<ffffff800893db14>] binder_ioctl+0x1d0/0x668
[   21.575010] [<ffffff80081c77b8>] do_vfs_ioctl+0x5e4/0x720
[   21.575494] [<ffffff80081c7954>] SyS_ioctl+0x60/0x88
[   21.575936] [<ffffff8008083170>] el0_svc_naked+0x24/0x28

or:

[  549.171031] Internal error: Accessing user space memory outside uaccess.h routines: 96000005 [#1] PREEMPT SMP
[  549.171920] Modules linked in:
[  549.172213] CPU: 2 PID: 2575 Comm: surfaceflinger Not tainted 4.4.83 #121
[  549.172810] Hardware name: Rockchip RK3399 Excavator Board edp (Android) (DT)
[  549.173444] task: ffffffc0b851a700 task.stack: ffffffc0b2a40000
[  549.173973] PC is at kmem_cache_alloc_trace+0xa8/0x204
[  549.174437] LR is at drm_flip_work_allocate_task+0x2c/0x4c
[  549.174920] pc : [<ffffff80081ad584>] lr : [<ffffff800848ce04>] pstate: 60400145
......
[  549.285299] [<ffffff80081ad584>] kmem_cache_alloc_trace+0xa8/0x204
[  549.285845] [<ffffff800848ce04>] drm_flip_work_allocate_task+0x2c/0x4c
[  549.286422] [<ffffff800848d020>] drm_flip_work_queue+0x38/0xa4
[  549.286942] [<ffffff80084a7a30>] vop_crtc_atomic_flush+0x1f48/0x2274
[  549.287509] [<ffffff800846add4>] drm_atomic_helper_commit_planes+0x194/0x1bc
[  549.288136] [<ffffff80084a0584>] rockchip_atomic_commit_complete+0x58/0xa0
[  549.288750] [<ffffff80084a0750>] rockchip_drm_atomic_commit+0x184/0x1a4
[  549.289340] [<ffffff800848e678>] drm_atomic_commit+0x64/0x70
[  549.289848] [<ffffff800848f960>] drm_mode_atomic_ioctl+0x4fc/0x604
[  549.290393] [<ffffff8008473368>] drm_ioctl+0x278/0x3f8
[  549.290856] [<ffffff80081c77b8>] do_vfs_ioctl+0x5e4/0x720
[  549.291339] [<ffffff80081c7954>] SyS_ioctl+0x60/0x88
[  549.291778] [<ffffff8008083170>] el0_svc_naked+0x24/0x28

Change-Id: I101c7dfa881611f3ca9225542e767897efe8fc1d
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-06 14:08:00 +08:00
Sandy Huang
b42661a086 drm/rockchip: framebuffer should never be freed
In recovery mode, fb will be freed and lead to following error:

[    2.571563] ffffffc03d5f9400: FB ID: 0 (0) fb:0xffffffc03d5f9400, fb->refcount:0
[    2.571694] ------------[ cut here ]------------
[    2.571717] WARNING: at include/linux/kref.h:46
[    2.571738] Modules linked in:
[    2.571763]
[    2.571792] CPU: 0 PID: 169 Comm: recovery Not tainted 4.4.114 #1042
[    2.571815] Hardware name: Rockchip rk3326 863 board (DT)
[    2.571843] task: ffffffc03b078d40 task.stack: ffffffc03b064000
[    2.571877] PC is at drm_framebuffer_reference+0x98/0xc8
[    2.571910] LR is at drm_framebuffer_reference+0x68/0xc8
......
[    2.589269] [<ffffff80084823a8>] drm_framebuffer_reference+0x98/0xc8
[    2.589306] [<ffffff80084831ac>] drm_mode_set_config_internal+0xd4/0x110
[    2.589339] [<ffffff8008488560>] drm_mode_setcrtc+0x448/0x4ec
[    2.589370] [<ffffff8008479830>] drm_ioctl+0x26c/0x3f4
[    2.589404] [<ffffff80081d3884>] do_vfs_ioctl+0x6f0/0x82c
[    2.589438] [<ffffff80081d3a20>] SyS_ioctl+0x60/0x88
[    2.589470] [<ffffff80080832f0>] el0_svc_naked+0x24/0x28

Change-Id: I0706c832b4705bf23147c306e34557a152fb069b
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-06 09:25:17 +08:00
Sandy Huang
91b8d990c0 drm/rockchip: px30 vop: set win2 zorder to 2
Change-Id: Id0d510ce4f247d14646d51bba4dfa94383ff8e29
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-01 18:27:17 +08:00
Sandy Huang
ddcb4f03b5 drm/rockchip: px30 vop: enable more debug interrupt
Change-Id: Ib9a6835cf4113b84fbd4ef249868a5ba11ec8073
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-01 18:19:36 +08:00
Zheng Yang
955745bc12 drm/bridge: synopsys: dw-hdmi: disable phy in dw_hdmi_bind
If hdmi is enabled in uboot and pluged out when booting kernel,
the hdmi phy is still enabled. It's better to disable it to
match the real status.

Change-Id: Ia1c5ede6499ee277d08c35a85c50e3257305f90f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2018-03-01 16:23:55 +08:00
Zheng Yang
b87d97a99c drm/bridge: synopsys: dw-hdmi: update rxsense status in repo_hpd_event
Under following processes, rxsense will be not match the real
signal status.
1. HDMI plug in, irq is triggered.

2. HDMI irq is mute in dw_hdmi_hardirq, bring up dw_hdmi_irq.

3. For HDMI connection is not stable, phy_stat read in
   dw_hdmi_irq may be zero, then hdmi->rxsense will be false.

4. Connection fallback to stable, but dw_hdmi_irq had not
   unmute the irq, irq is not triggered again, and hdmi->rxsense
   keep false.

5. repo_hpd_event inform HDMI is pluggned in, dw_hdmi_bridge_enable
   is called to enable HDMI. For rxsense is flase, bridge is not
   powered up.

When repo_hpd_event is called, we think HDMI connection is stable,
updating rxsense is reliable.

Change-Id: Ie1f52f65b15e9a603dad9200529202053528a390
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2018-03-01 16:22:43 +08:00
Sandy Huang
f1f22eb38b drm/rockchip: add version control for rockchip drm driver
Add basic version for rockchip DRM driver

Change-Id: I13f9b81a79e4f580aa0ba6cb5b418e2780ee4f5e
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-01 16:04:28 +08:00
Sandy Huang
23d7592936 drm/rockchip: rk3288 vop: identify vop lit and vop big
most of rk3288 vop lit is same with vop big, but some feature is
different, just like max output resolution.

vop big max output: 3840*2160
vop lit max ougput: 2560*1600

Change-Id: Ie926ed29c9d23159ccf3dd5c3e885e48a21731cb
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-01 16:04:28 +08:00
Sandy Huang
d37da3f924 drm/rockchip: vop: close all win when enable vop
Because vop is unstable when update output timing,
so we close all win make sure stable.

Change-Id: Ifd4e60a41c667426d40e0d57e5180034bab9d5e7
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-01 14:22:04 +08:00
Sandy Huang
3edcf7147a drm/rockchip: update crtc->primary->fb to fb help fb
Before this update, drm_fb_helper_is_bound will return false
when hdmi plug.

Change-Id: I28c07b1c1c3405af2627bf423721c757f1e84258
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-01 14:22:04 +08:00
Sandy Huang
0f25f377ac drm/rockchip: vop: set is_iommu_enabled to false when enable iommu fail
for some unknown reason, iommu will enable fail, so we set is_iommu_enabled
to false insure the iommu will be enable at next frame.

Change-Id: Icd8779fff816f7498385aff9aa4712e6ad18f93c
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-01 14:22:04 +08:00
Algea Cao
07bbb4fe5f drm/rockchip: vop: support rk322x drm cvbs
Change-Id: Ifdaad0cfafb4230d80ff5c27a039839a44fa94d1
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2018-02-28 14:16:58 +08:00
Algea Cao
262653c976 drm/rockchip: Fix cvbs display err when power off
DPMS status default value should be set according to
whether uboot logo is enabled. If uboot logo is enabled,
DPMS status default value should be set to ON.

Change-Id: I492d76c29687e583771824fcbc5a57455242ec0e
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2018-02-26 17:21:08 +08:00
Sandy Huang
5570802cb7 drm/rockchip: px30 vop: fix axi channel error
Change-Id: Ic1af7e43f4d4b842ac5a10d1f9c6ea42cd6c2a17
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-02-24 16:17:51 +08:00
Sandy Huang
28d50f0fd8 drm/rockchip: px30 vop: add outstanding config
Change-Id: I81d5e8412e01c57ac7ede292a55b3d59941a507f
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-02-24 16:08:45 +08:00
Sandy Huang
613b6b6a10 drm/rockchip: px30 vop: update afbdc format for color transform
Change-Id: Ic551f0b7de22bd9154535a64daba2ca51fd79f37
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-02-24 16:06:27 +08:00
Finley Xiao
f09c78549e MALI: bifrost: support sharing regulator with other devices
If the regulator is shared between several devices then the lowest
request voltage that meets the system constraints will be used.

Change-Id: Icb6afcb571bddd6709d352dfad8fc2da80567bc0
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-02-13 16:21:57 +08:00
Finley Xiao
6e0e7a80fa MALI: bifrost: Avoid GPU voltage domain keeping the initial voltage
If there is only one opp whose frequency is equal to the initial value
in opp table list, the GPU voltage domain will keep the initial voltage,
it may be too large.

Change-Id: If2ae1c876de185d810e05296b1b9e98855c3ef48
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-02-13 16:21:48 +08:00
Sandy Huang
ce0ec8d27b drm/rockchip: vop: alpha_pre_mul mode depend on user space
Change-Id: Iaada438902ddddbbd00890c53a58cc49af3c3d3e
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-02-11 19:08:48 +08:00
Sandy Huang
424a08f4cb drm/rockchip: px30 vop: delete win2
Change-Id: If36214c7f57c96d7a06e81db383300cff0669681
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-02-11 14:58:38 +08:00
Zheng Yang
5f1c036a65 drm/bridge: synopsys: dw-hdmi: fix kernel logo flash when output YCbCr422 mode
On rockchip platform, hdmi input format is YCbCr444 when output mode
is YCbCr422. Then the value of HDMI_TX_INVID0 on YCbCr422 is same as
the value of YCbCr444, both is 0x09/0x0b. This make enc_out_bus_format
stroed in struct hdmi_data is wrong, which is MEDIA_BUS_FMT_YUV8_1X24
or MEDIA_BUS_FMT_YUV10_1X30.

When android set enc_out_bus_format to YCbCr422, dw_hdmi_setup will be
called and logo will flash.

This patch use colorspace restored in HDMI_FC_AVICONF0 to distinguish them.

Change-Id: I6b913951b58fb47628617c11d6059bc1be4e370a
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2018-02-11 10:21:53 +08:00
Algea Cao
bcc83cb2ff drm/bridge: Support rk1000 kernel logo
Setting connector port to support kernel logo

Change-Id: I594eec0a924ecf1c47c82d61c471dd21c2af1830
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2018-02-09 16:44:17 +08:00
Sandy Huang
d06bd5047d drm/rockchip: vop: default set to premultiplied alpha mode
Change-Id: I006d2d7bda2413d3796a14c23a34fe2beea878a8
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-02-09 16:38:20 +08:00
Sandy Huang
bc11949511 drm/rockchip: vop: fix iommu pagefault
This version vop will read buffer when win2 master0-3 disable but
win2 enable, this is different from old vop version. so we add to
disable win2 en to make sure it's save.

Change-Id: Ib239a8901095a6eff980747f219c3aa585437dae
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-02-08 18:11:33 +08:00
Sandy Huang
a442d86da8 drm/rockchip: px30 vop: not support ymirror and add channel config
Change-Id: Ia89b6d5fde3b191b82e81c1399f82689267a629a
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-02-08 09:25:43 +08:00
Wyon Bi
b7dc6245a7 drm/rockchip: lvds: Add support for PX30
Fixes: 35cd525521 ("drm/rockchip: lvds: Add support for PX30")
Change-Id: Ib71efbb6a063694d755df287568e0d14d6074238
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-02-07 17:56:42 +08:00
Sandy Huang
78e60f5ad5 drm/rockchip: px30 vop: correct for alpha config
Change-Id: Ifc9741392e3b3fc2996917655e84535039e5ca00
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-02-07 14:09:49 +08:00
Zheng Yang
08ec13e4d0 drm: rockchip: dw-hdmi: fix 10bit not work when booting up with uboot logo
Default value of hdmi->colordepth is defined by input color mode,
so there is no need to set value again when color depth property
is created.

Change-Id: I2e242fabdaadc0c3b41e48f806cbded5f619c455
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2018-02-07 12:02:59 +08:00
huangjc
6abfe1d617 drm: bridge: synopsys: Fix hdmi can't display in android
Change-Id: I2f3ee8176761b5227c30df25c569e4c34ae773e2
Signed-off-by: Jiancai Huang <huangjc@rock-chips.com>
2018-02-07 12:02:45 +08:00
Wyon Bi
1aa2618e86 drm/rockchip: dsi: support dual-link mode
Display Pipeline:

1) dual-channel mode

              --> dsi0 --> dphy_tx0 -->
             /                 !       \
vopl/vopb -->              dphy_pll     --> panel
             \                 !       /
              --> dsi1 --> dphy_tx1 -->

2) dual-link mode

vopb/vopl --> dsi0 --> dphy_tx0 --> panel0
                           !
                       dphy_pll
                           !
vopl/vopb --> dsi1 --> dphy_tx1 --> panel1

Change-Id: Iddbea22f121959e4afa969d74549d8fb66ab09f1
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-02-07 12:02:27 +08:00
Jianqun Xu
990d5872ed drm/rockchip: alloc object with limit to 32bit when LPAE enabled
Change-Id: I049c52b1fcee2d14e9db477f4cb58d352d456da3
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2018-02-06 19:21:22 +08:00
Wyon Bi
f242736258 drm/rockchip: lvds: Add a better description for rockchip_lvds_soc_data
Change-Id: I0750074515fd131abb17d7636b1183842199a9f5
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-02-06 10:01:44 +08:00
Zhen Chen
a58d4bfdbb drivers/gpu/arm: add bifrost/ into kernel build system
Change-Id: Ia5728750e6a98d3c366e116013fbd43bff1a1459
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-02-05 20:18:26 +08:00
Zhen Chen
24b77886e3 bifrost: make it possible to build midgard and bifrost as module in one make
including :
	modifications for changing patch from drivers/gpu/arm/midgard
		to drivers/gpu/arm/bifrost;
	rename output mali_kbase.ko to bifrost_kbase.ko;
	rename configs, which have duplicated names in midgard, in Kconfig,
		Kbuild and source files.

Change-Id: I127d8c8043db9010398946b3f4a90640ab1f13fe
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-02-05 20:18:26 +08:00
Zhen Chen
07210d909f MALI: bifrost: rk: ipa/: to fit current 'struct devfreq_cooling_power'
Need CONFIG_MALI_PWRSOFT_765 enabled

Change-Id: I96476f6b884bf48e46643685aa6d77dadcd80edb
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-02-05 20:17:47 +08:00
Zhen Chen
1d3cef672c MALI: bifrost: rk: not to use sg_dma_len in bifrost DDK r8p0-01rel0
When CONFIG_NEED_SG_DMA_LENGTH is enabled,
sg_dma_len is defined as follow :
"#define sg_dma_len(sg)             ((sg)->dma_length)"
But, dma_length is not used by the framework indeed.

Change-Id: I93b4ceed28882236dc252fcabb7c7710153804a0
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-02-05 17:08:31 +08:00
Zhen Chen
7481e8328c MALI: bifrost: add rk_platform_specific_code
Copyed from midgard/platform/rk at commit 77a680a3.

Change-Id: Iaa218e2183e5fc6ef34f50678fc34376a54a29a4
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-02-05 16:36:56 +08:00
Zhen Chen
2152419621 MALI: midgard: RK: rename output mali_kbase.ko to midgard_kbase.ko
Some optimizations on files of KBuild in addition.

Change-Id: I1db012e116b8b69897a2791ae610da35365a1a61
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-02-05 16:35:07 +08:00
Huicong Xu
1cb8aa091d drm/bridge/synopsys: restore bus_width as 8 when disable hdmi encoder
to modify bus width error sometime plug out hdmi and switch cvbs output

Change-Id: Iaa7914fbccc99991fbfbc5495ba647f97997c8ba
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
2018-02-05 16:02:37 +08:00
Sandy Huang
ac4076851c drm/rockchip: vop: fix wait frame start timeout
In the following case will lead to wait frame start timeout:

uboot(HDMI output 4K(DCLK: 594HZ))
    -> kernel start(unplug HDMI)
        ->drm driver probe(plug HDMI)enable crtc(set dclk to 27Mhz)
            ->VOP timing register is frame effect
                ->VOP working at 4k output but dclk is 27M
                    -> VOP frame time 16.6ms * 574 / 27 = 354ms

Change-Id: Ic98af0029a15fbeef78e4f3abe4e739e760ab471
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-02-05 16:00:53 +08:00
Zhen Chen
142f58d546 MALI: rockchip: add arm release of Bifrost DDK r8p0-01rel0
Change-Id: If8d2c3a903a205e3a7c101c4383735940439c9d0
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-02-05 14:28:39 +08:00
Zheng Yang
ea56866919 drm: bridge: synopsys: update more hdmi status in dw_hdmi_bind
If hdmi is enabled in uboot, hdmi->disabled and bridge_is_on and
phy status need to be updated.

Change-Id: Ib21d894b673bf12b46a271c91d3e08fe7475ea89
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2018-02-02 19:09:12 +08:00
Algea Cao
21c38316b3 drm/rockchip: Support tve uboot logo
Add tve connector port. If uboot logo is enabled,
dac will not be disabled when tve bind.

Change-Id: I5d87f9d1afc05481968dc34b0bd09dd82719a933
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2018-02-02 18:55:50 +08:00
Zheng Yang
3a61ef4874 drm: bridge: synopsys: update mc_clkdis in dw_hdmi_bind
If vop return error when showing kernel logo, connector atomic flush
will not be call, and mc_clkdis can not be updated.

This patch update mc_clkdis in the dw_hdmi_bind, when phy clock is
locked and HPD is connected.

Change-Id: I1498d787a993961fe75236c309ecc3c898d611a4
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2018-02-01 15:18:41 +08:00