Commit Graph

311193 Commits

Author SHA1 Message Date
Finley Xiao
c11c980229 video: rockchip: vpu: Fix core and cabac rate error when high temperature
Fixes: 5bc582df48 ("video: rockchip: vpu: Add devfreq feature")
Change-Id: I0af1c64f778059a5f42e88ad9316f65f4c554fb9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-08-24 09:34:15 +08:00
Jeffy Chen
76f2837b6e rtc: Add an RTC driver for rk-timer
This driver uses Rockchip timer to simulate RTC functions.

Change-Id: I49eed6ecbb4c55527696c63b0d479afe837502d5
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
2018-08-23 17:51:33 +08:00
Hu Kejun
f553a8641c media: rockchip: isp1: change needed min buffers of stream to 0
change needed min buffers of stream to 0, because we allocate dummy
buffer in advance.

Change-Id: Ib7647983b495c11dc18151b3c1f8856c49496c3a
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2018-08-23 17:46:25 +08:00
Hu Kejun
d961e44af2 media: i2c: gc2145: change sensor setting from 20fps to 30fps in svga size
Change-Id: I3af9061d2a4d90c0ec3bc9ec193af51edb2aa2cf
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2018-08-23 17:45:53 +08:00
Hu Kejun
0cc3fd0986 media: i2c: gc0312: change sensor setting from 20fps to 30fps in vga size
Change-Id: I5c9f0df26af6597c4fa16199ecb40b9e6bf9bf1c
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2018-08-23 17:45:20 +08:00
Wyon Bi
8f873910de drm/bridge: analogix_dp: support video BIST generation
The video BIST function of the DP_TX generates arbitrary video formats
internally according to the specified format configuration and selection.
These BIST video formats simplify DP_TX debugging.

Change-Id: Ia019c8f40fdd4ebea3e5250be8e2c15540481a6c
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-23 16:37:45 +08:00
Huibin Hong
a990c87249 spi: rockchip: init rxconf and txconf to 0
Dmac pl330 adds src_interlace_size of dma_slave_config rxconf.
If rxconf is local variable, src_interlace_size may be non zero,
which causes wrong process.

Fixes: ddd2e87ad4 ("dmaengine: pl330: add support for interlace size config")
Change-Id: Ib301c7ca4a1175bafd0631cb4deea4baa60eebc7
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2018-08-23 16:17:00 +08:00
Andy Yan
86b17a821c soc: rockchip: cpuinfo: init soc id for rk3308/rk3308b
RK3308B is a enhanced variant of RK3308 with more flexible
iomux and peripherals(for example, RK3308B has 12 pwms, but
RK3308 has 4).

The CHIP_ID is stored in GRF_CHIP_ID:

RK3308:  0xcea (3306 in decimal)
RK3308B: 0x3308

Change-Id: I8f675656c012bdedb43043f5dbeea8bd11ea4ded
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2018-08-22 20:53:01 +08:00
Chris Zhong
ce1a9c72c5 drm/rockchip: cdn_dp: support audio info frame
Change-Id: I867b79dce73aa7c82dd06e6ed6e2963e118f1129
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-22 17:42:53 +08:00
Finley Xiao
bb1005b17c clk: rockchip: px30: Add support to set parent rate for vopl dclk
Change-Id: I208471f938b1795273c4f33ac35b82d667a2b312
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-08-22 09:31:20 +08:00
Finley Xiao
c9ff227e0b clk: rockchip: px30: Let npll only provide clock for vopl and gpu
As npll rate may be changed according to vopl dclk rate on px30.

Change-Id: I4abc042b49ee06436ba5d69dc8adfa9460da37f7
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-08-22 09:31:20 +08:00
Finley Xiao
1dbe048eb5 clk: rockchip: px30: Remove npll from gpu parent clock on px30
NPLL should provide clock for vopl dclk on px30, and its rate will be
changed according to vopl dclk rate, so GPU can't use npll as parent
on px30.

Change-Id: Ib2c8c57020405bcd14070dcd7bc71cbfe18230e3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-08-22 09:31:20 +08:00
Hu Kejun
00b52e7e42 media: rockchip: isp1: update isp clock adjustment table
Change-Id: I5c799d0e1dc62819d2f77f0287904a2c7c1d4c1d
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2018-08-21 10:21:09 +08:00
Hu Kejun
4f7ee87b6c media: rockchip: isp1: support dvp camera
Change-Id: If04dce4118f8b2ec90168c9286e8357619712820
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2018-08-21 10:20:59 +08:00
Randy Li
5930efdc03 video: rockchip: vpu: adjust the register buffer table
make me more easily to check the mapping.
Also fix some compiler warnings.

Change-Id: Ic28f6ce54b4dcd0c4a9d9543939c5f5e013136fc
Signed-off-by: Randy Li <randy.li@rock-chips.com>
2018-08-20 11:47:31 +08:00
Randy Li
9def402f50 rockchip/mpp_service: use the same ioctl as vpu_service
It make all kernel version use the same ioctl defines.
The compat ioctl doesn't support the customer ioctl of the
mpp device.

Change-Id: I018ec2eb48cd2ca4e211da7137781771b33bda15
Signed-off-by: Randy Li <randy.li@rock-chips.com>
2018-08-20 11:46:40 +08:00
Dingqiang Lin
057b63a64f drivers: rkflash: add rkflash proc info
Change-Id: I7316c628d79cdee8fb513e144b6c365a142d4ecb
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-08-20 11:18:34 +08:00
Jianqun Xu
12db436a63 pinctrl: rockchip: add rk1808 mux route
Add rk1808 iomux route, also fix some error codes.

Change-Id: I2a079cdc8ad1491df653cd6c05226ff3d16beb1a
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2018-08-17 17:50:23 +08:00
Weiguo Hu
557686e70b net: wireless: rockchip_wlan: ssv6051 remove cp fw
Change-Id: Ice43fadd3e91a233cd19093422fadd697ef520dc
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
2018-08-17 16:10:48 +08:00
Hu Kejun
2629173c88 media: i2c: add gc2145/gc0312 driver for rkisp1
Change-Id: I3d4bae2e45a6fd40cf7bf6b53900abcbfacba2d7
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2018-08-17 11:22:08 +08:00
Hu Kejun
15b41be882 media: rockchip: isp1: fix two dvp sensor can't connect to rkisp1 sink pad
when two dvp sensor connect to rkisp1, only one sensor can connect to sink
pad, another sensor connect to sink params pad.

Change-Id: I6cc9e6db3ad074c82c15a9cc642330ece6997d09
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2018-08-17 10:16:02 +08:00
Jeffy Chen
77e938e49d fiq_debugger: Sanity check state in fiq_tty_proc_show
The fiq_tty_proc_show can be called even when fiq is not enabled in dts,
which would cause crash.

Add sanity check to avoid that.

Change-Id: I69d34718f91813aed14c542901060e4fd68b818b
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
2018-08-17 10:14:42 +08:00
Wyon Bi
363e47c6aa phy/rockchip: typec: improved handling of typec_dp_phy_config()
Change-Id: I61ca43ffe7fe85e041fb3ed66ba1d59f515770d9
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-16 18:13:54 +08:00
Wyon Bi
08aea10ffd phy/rockchip: typec: PLL1 settings improvements
When I tested DP function on excavator, I found that commit 1bf7191033de
("BACKPORT: FROMLIST: phy: rockchip-typec: support variable phy config value"),
which change pll settings, but it does not work as expected on excavator board.
With this patch series, DP works well on excavator and roc.

Change-Id: I48fe0c51e322369d1aff352f4ebaf1096f264834
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-16 18:13:48 +08:00
Dingqiang Lin
f0f004d826 drivers: rkflash: adjusting the vendor interface provided to the kernel
Change-Id: I9c939c774601f866b8c29270740aaab41c08a194
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-08-16 18:00:34 +08:00
Sandy Huang
b0ae63a095 drm/rockchip: csi: Add support RK1808
Change-Id: Ia908f1a8c0a4f72b61bacf98ab6e4ed9a3e3ebed
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-08-15 18:47:25 +08:00
Wyon Bi
a8c0f12f4e phy/rockchip: mipi_dphy: Add support for RK1808
The innoslicon GF22FDX MIPI D-PHY integrates a MIPI 1.2
compatible PHY that supports up to 2.5Gbps high speed data
transmitter, plus a MIPI low-power low speed transceiver
that support data transfer in the bi-directional mode.
The IP supports the full specifications described in the
D-PHY spec 1.2. The D-PHY is built in with a standard
digital interface to talk to any third party host controller.

Change-Id: Iad7b9dc8fedaa1a5741830e9c02a593f544c2423
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:39:45 +08:00
Wyon Bi
2ba3dad0f8 phy/rockchip: mipi_dphy: registers clean up and fix some typos
Change-Id: Ibdb8c3a4c83df7be8c4f83cb556a0769efc01139
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:39:02 +08:00
Wyon Bi
15c03fc985 drm/rockchip: dsi: Add support for RK1808
Change-Id: Icb02137a3c5f0636cbe01163de2135d28ea14c49
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:38:42 +08:00
Sandy Huang
5babaa7e5f drm/rockchip: vop: add support rk1808 vop
rk1808 have vop lite and vop raw:
1. vop lite: support win1 for display, vop->dsi tx->dphy->lcd.
2. vop raw: transfer data from ddr to csi tx.

Change-Id: I11229b5e61e66e72e4228e7e0ac966f1f85cb49f
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-08-15 17:38:03 +08:00
Wyon Bi
eafd8e2fb2 drm/rockchip: rgb: Add support for RK1808
Change-Id: I60d99dea417b2708ffb2c784a0d26313e7d20fdb
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:35:48 +08:00
Zorro Liu
bd3a986189 drivers: input: sensors: make compass ak8963 && ak09911 can pass google vts/cts test
Change-Id: I565cfff357e0c7b3fb6311b5bb6465d0a0b030e9
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
2018-08-15 17:32:46 +08:00
Wyon Bi
5b4205b1cb mfd: fusb302: fix pin assignment selection algorithm
This algorithm defaults to choosing higher pin config over
lower ones in order to prefer multi-function if desired.

NAME | SIGNALING | OUTPUT TYPE | MULTI-FUNCTION | PIN CONFIG
-------------------------------------------------------------
A    |  USB G2   |  ?          | no             | 00_0001
B    |  USB G2   |  ?          | yes            | 00_0010
C    |  DP       |  CONVERTED  | no             | 00_0100
D    |  PD       |  CONVERTED  | yes            | 00_1000
E    |  DP       |  DP         | no             | 01_0000
F    |  PD       |  DP         | yes            | 10_0000

if UFP has NOT asserted multi-function preferred code masks away
B/D/F leaving only A/C/E. For single-output dongles that should
leave only one possible pin config depending on whether its a
converter DP->(VGA|HDMI) or DP output. If UFP is a USB-C receptacle
it may assert C/D/E/F. The DFP USB-C receptacle must always choose
C/D in those cases.

Change-Id: I5594d39a302f27e2d72259f6a18308488d4fa47c
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
huang lin
da29ad0019 BACKPORT: FROMLIST: drm/rockchip: support dp training outside dp firmware
DP firmware uses fixed phy config values to do training, but some
boards need to adjust these values to fit for their unique hardware
design. So get phy config values from dts and use software link training
instead of relying on firmware, if software training fail, keep firmware
training as a fallback if sw training fails.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10420469/)

Conflicts:
   drivers/gpu/drm/rockchip/cdn-dp-reg.h
[Context - non-upstream HDCP stuff]

BUG=b:72006974
TEST=DP can display on Dru

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/985573
Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: I402c5fd2c83979cee67856e66311d2b1b9c6f774
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
huang lin
eedd1893c9 BACKPORT: FROMLIST: phy: rockchip-typec: support variable phy config value
the phy config values used to fix in dp firmware, but some boards
need change these values to do training and get the better eye diagram
result. So support that in phy driver.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10420473/)

Conflicts:
	drivers/phy/phy-rockchip-typec.c
[phy-rockchip-typec.c is different path in upstream code]

BUG=b:72006974
TEST=DP can display on Dru

Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1032713

Change-Id: I8a63307ad5cb690d819779662d70ae1c232842a5
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Lin Huang
707ec089ca BACKPORT: FROMLIST: soc: rockchip: split rockchip_typec_phy struct to separate header
we may use rockchip_phy_typec struct in other driver, so split
it to separate header.

Signed-off-by: Lin Huang <hl@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10420467/)

Conflicts:
	drivers/phy/phy-rockchip-typec.c
[phy-rockchip-typec.c is different path in upstream code]

BUG=b:72006974
TEST=DP display on Dru

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1069958

Change-Id: I709331d1577923be662660eb606f92b743903ba7
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Chris Zhong
afdd986c45 BACKPORT: FROMLIST: drm/rockchip: add transfer function for cdn-dp
We may support training outside firmware, so we need support
dpcd read/write to get the message or do some setting with
display.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Enric Balletbo <enric.balletbo@collabora.com>
(am from https://patchwork.kernel.org/patch/10420461/)

Conflicts:
   drivers/gpu/drm/rockchip/cdn-dp-core.c
   drivers/gpu/drm/rockchip/cdn-dp-reg.h
[context - HDCP stuff that's not upstream]

BUG=b:72006974
TEST=DP on Dru

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/985572
Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: If89911e6205546df1a5ae8997ea214d5d2a60af6
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
e4c2c77a28 CHROMIUM: drm/rockchip: Refactor cdn-dp hdcp code
This patch transitions our rockchip driver to using the upstream
content_protection_property (located in drm_connector) as opposed to the
downstream version that's in mode_config.

In addition to the new location of the property, this patch also makes
HDCP enablement work via atomic commits in addition to the legacy
setproperty ioctl.

The trickiest part of making this work is ensuring we keep the
connector->state->content_protection value in sync with what the
hardware is doing. We're only allowed to change this value in
atomic_check (which we do for certain transitions), however we have to
be careful when updating it outside of atomic_check, this requires
locks. In order to update the property without races, we need a new property
worker whose job is to acquire the connection and dp locks and update the state.
It's not possible to do this without the dedicated worker since the hdcp event
worker doesn't hold the connection mutex, and can't acquire it since we
synchronously cancel it while holding the connection mutex elsewhere. Sigh.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/864343
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: I22d2592096866d2346bc9b48f48e66e845a173f8
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
29eec2954c BACKPORT: drm: Add Content Protection property
This patch adds a new optional connector property to allow userspace to enable
protection over the content it is displaying. This will typically be implemented
by the driver using HDCP.

The property is a tri-state with the following values:
- OFF: Self explanatory, no content protection
- DESIRED: Userspace requests that the driver enable protection
- ENABLED: Once the driver has authenticated the link, it sets this value

The driver is responsible for downgrading ENABLED to DESIRED if the link becomes
unprotected. The driver should also maintain the desiredness of protection
across hotplug/dpms/suspend.

If this looks familiar, I posted [1] this 3 years ago. We have been using this
in ChromeOS across exynos, mediatek, and rockchip over that time.

Changes in v2:
 - Pimp kerneldoc for content_protection_property (Daniel)
 - Drop sysfs attribute
Changes in v3:
 - None
Changes in v4:
- Changed kerneldoc to recommend userspace polling (Daniel)
- Changed kerneldoc to briefly describe how to attach the property (Daniel)
Changes in v5:
- checkpatch whitespace noise
- Change DRM_MODE_CONTENT_PROTECTION_OFF to DRM_MODE_CONTENT_PROTECTION_UNDESIRED
Changes in v6:
- None

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

[1] https://lists.freedesktop.org/archives/dri-devel/2014-December/073336.html
Link: https://patchwork.freedesktop.org/patch/msgid/20180108195545.218615-4-seanpaul@chromium.org

(cherry picked from commit 24557865c8)
Signed-off-by: Sean Paul <seanpaul@chromium.org>

[downstream changes]
 - Fixed some conflicts in comments
- Remove duplicate definition for drm_get_content_protection_name

Change-Id: I825b4863bea715434cb8f76f99fdf6e3fca74a60
Reviewed-on: https://chromium-review.googlesource.com/849079
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Sean Paul <seanpaul@google.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
c1b002bdf2 CHROMIUM: drm/rockchip: Disable HDCP before enabling it
Enabling HDCP on plug/re-plug when already desired was flakey. However,
toggling the property always worked when already plugged in. It seems
like the hardware wants to be explicitly disabled before being enabled.
This patch adds the disable with a short wait before kicking off HDCP.

BUG=b:63816472
TEST=Two cases:
	1)
		- Boot device with dongle unplugged
		- Mark HDCP as desired
		- Plug HDMI + dongle
		- Ensure HDCP is enabled
	2)
		- Plug HDMI + dongle
		- Mark HDCP as desired, wait for it to enable
		- Unplug HDMI from dongle
		- Replug HDMI to dongle
		- Ensure HDCP is enabled

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/687802
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I7c1dfd93bad60483d04525b79c6f75b728096ed4
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
13a2ddb4ba CHROMIUM: drm/rockchip: Move HDCP_TX_CONFIGURATION bits to #defines
Instead of using an enum to define the values of the HDCP_TX_CONFIGURATION
register, use #defines with descriptive names and explicit values.

BUG=None
TEST=Compiles

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/687801
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: Id78cb0b1655fb8c1629f5e1c2ef2cc075475bff8
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
42398fc353 CHROMIUM: drm/rockchip: Enable/disable HDCP at the correct times
This patch adds new calls for HDCP disable/enable such that HDCP is
properly disabled/restored across hotplugs (both dongle and cable) and
power on/off.

BUG=b:63816472
TEST=Use hdcp test script below:
	attr=/sys/class/drm/card1-DP-1/content_protection
	printf "Testing HDCP...\n"
	while [ 1 ]; do
            printf "\rSetting state to desired...  "
            echo "Desired" > $attr
            sleep $(perl -e 'printf("%.1f\n", rand() * 3)')
            printf "\rSetting state to undesired..."
            echo "Undesired" > $attr
            sleep $(perl -e 'printf("%.1f\n", rand() * 3)')
	done

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657941
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I4bcc7decc43f7b648054d841efbade7315e785fe
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
4ab44aa4a1 CHROMIUM: drm/rockchip: Fix hdcp logging to use DRM_DEV_*
The rest of the driver uses DRM_DEV_*, so too should the hdcp functions.
This patch also prints error messages when enable/disable fails, as well
as info messages when hdcp is successfully enabled/disabled.

BUG=b:63816472
TEST=Enable hdcp, log messages are prefixed with drm goo

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657940
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I2503ba4ce6839bb8d9db77ae88446da4888732d5
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
f97906f20b FROMLIST: drm/rockchip: Add forward declarations to cdn_dp_device and audio_info
Add forward declarations in cdn-dp-reg.h to cdn_dp_device and audio_info

BUG=None
TEST=None

Signed-off-by: Sean Paul <seanpaul@chromium.org>
(from https://lists.freedesktop.org/archives/dri-devel/2017-September/152108.html)
Reviewed-on: https://chromium-review.googlesource.com/657939
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I8b12f76a5fb441ad5353259b4c74d161b1d4693e
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
6c07a5023c CHROMIUM: drm/rockchip: Make hdcp enable/disable less racy
A couple of things to reduce the races during hdcp enable/disable:
- Cancel any active workers currently transition
- Hold lock while disabling hdcp

BUG=b:64438996
TEST=Run the following script, ensure sequencing is correct:

attr=/sys/class/drm/card1-DP-1/content_protection
printf "Testing HDCP...\n"
while [ 1 ]; do
	printf "\rSetting state to desired...  "
	echo "Desired" > $attr
	sleep $(perl -e 'printf("%.1f\n", rand() * 3)')
	printf "\rSetting state to undesired..."
	echo "Undesired" > $attr
	sleep $(perl -e 'printf("%.1f\n", rand() * 3)')
done

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657938
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I535b23ffb22eba251a595dcdc4c204de80765414
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
b26e4d8db2 CHROMIUM: drm/rockchip: Improve cdn hdcp error messages
Add a message for start hdcp transfer failure (instead of using the same
one below the loop), and print the errors in hex as opposed to decimal.

BUG=b:63816472
TEST=Try enabling HDCP on kevin with busted firmware, get the correct msg

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657937
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I746574e26b200d746a7a228c868dd22e1b82cae8
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
effb787b85 CHROMIUM: drm/rockchip: Enforce cdn_dp_hdcp_key_1x size assumption
struct cdn_dp_hdcp_key_1x is assumed to be evenly divisible by 6, given
its usage and reserved member. Unfortunately, this is neither
documented, nor enforced anywhere. This patch fixes that.

BUG=b:63816472
TEST=Builds

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657576
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I3f683cb9dd48d6e6d104d2e9a1a94c03e34d25dd
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
5d712529cc CHROMIUM: drm/rockchip: Bump HDCP authorization timeout to 3s
500ms is insufficient for my test monitor, bump it up to 3s.

BUG=b:64437717
TEST=HDCP works on ASUS VE258Q

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657575
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: Ia2d30046532fb80d224b5dc07494b3c69b7ffe5f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Sean Paul
54237fefb1 CHROMIUM: drm/sysfs: Make content_protection R/W
This makes debugging and stress testing much easier.

BUG=b:63816472
TEST=echo "{Un|D}esired" > /sys/class/drm/card1-DP-1/content_protection

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657574
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I5dc2d836ded2c7f95f9ee4c16d9ac7242707e9f2
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00
Wyon Bi
1719a7cd5f drm/crtc: Export drm_mode_connector_set_obj_prop
Change-Id: Ie09b8798d7d2951c5e794c7054e85a5c40bc85d7
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-15 17:28:40 +08:00