Commit Graph

600319 Commits

Author SHA1 Message Date
hero.huang
c1b18ddbbc arm64: dts: rockchip: add RK3399 Firefly Board for Linux Opensource
Add Firefly board dts file for Linux Opensource project

Change-Id: Ia525b7ff17f4d74990625e2e02c764996f57e520
Signed-off-by: hero.huang <hero.huang@rock-chips.com>
2017-03-20 19:14:21 +08:00
Zorro Liu
097c89626d arm64: dts: rk3368-p9: add usb host
Change-Id: Ief0045ac99d3af4db22042d468b67609d6fddf2f
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
2017-03-20 16:29:01 +08:00
Jianqun Xu
1ae04305b6 arm64: dts: rk3368-p9&sheep: disable uart2
Disable uart2 since gpio mux on uart with sdmmc, and rk3368 use
fiq debugger, the uart2 could set to be disabled.

Change-Id: I2d784ccd6cf7526afc0f3bae54914e05febf91a6
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-03-20 14:35:48 +08:00
Jianqun Xu
b3c7d6f14c arm64: dts: rk3368-p9: enable sdmmc
Change-Id: Ib2849e2af020c744e33f0ab1baefbe50cecaa80b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-03-20 14:35:10 +08:00
Maarten Lankhorst
6c59c5bb51 FROMLIST: drm/core: Reuse the reserved member in drm_event_vblank for crtc_id.
When doing a atomic commit affecting multiple crtc's, multiple events
are generated. The user_data member does not allow you to distinguish,
because they all have the same pointer.

I've chosen to use crtc_id, because using pipe would create ambiguity
when pipe = 0. A test for != 0 is easier to implement, and crtc_id
will never be 0.

Change-Id: Ie2daba50f711f298872f15498b8d46dedb38c0ff
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Stone <daniels@collabora.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9272895/)
2017-03-20 11:10:55 +08:00
Zikim,Wei
b8ee4085ec arm64: dts: rk3368-android: enable rga
Change-Id: I869f4bae54f72dc384c644fe3a0a499db2af3dbf
Signed-off-by: Zikim,Wei <wzq@rock-chips.com>
2017-03-20 10:53:00 +08:00
Mark Yao
8c677f9c19 arm64: dts: rk3368-sheep: fix sheep backlight
Change-Id: Ief2603afd33a65158bf6e86f08e53f96573ce486
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-03-20 10:49:56 +08:00
Mark Yao
e16d8ea934 video: backlight: pwm_bl: fix backlight polarity
Backlight polarity not works without pwm_adjust_config.

Change-Id: I11e5eefe340f758b6721021f13238306b3721270
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-03-20 10:49:34 +08:00
Mark Yao
b20e10aa93 arm64: dts: rk3368: enable uboot loader logo
Change-Id: I4807ac2aafd9cf319e37eacd184c1eae3ea36242
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-03-20 10:48:44 +08:00
Zhou weixin
92fb96cb16 ARM64: dts: rk3368: p9: fix dc detect failed
Change-Id: Ia4cd3528725dd4de250b9417295e7705eb16c412
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
2017-03-17 19:27:20 +08:00
Jianqun Xu
68865315a5 arm64: dts: rk3368-sheep: support mipi display
Change-Id: Ibeadd258ccbcd68a6c96fb08e7bfbcea79e5e6c6
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-03-17 16:06:20 +08:00
Jianqun Xu
00f65d6c96 arm64: dts: rk3368-android: reserve memory for drm-logo
Change-Id: I81b401d5561c67012f4d42d1640a6b1176490ca4
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-03-17 15:59:16 +08:00
WeiYong Bi
02a0a43f01 ARM64: dts: rk3368: p9: Add MIPI DSI panel support
Change-Id: I0d42d9ccd7ba09338c3074d1328ab5ec18079c27
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-03-17 15:30:25 +08:00
Jianqun Xu
f78164b394 arm64: dts: rk3368-android: enable display and vop
Change-Id: Iad1bd3544191d3badc8d0d8b8d9be363e3ac6ed6
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-03-17 15:30:25 +08:00
Elaine Zhang
d072a98be5 clk: rockchip: rk3368: add CLK_SET_RATE_PARENT flag for dclk_vop
dclk_vop only allowed on NPLL.

Change-Id: I5325a530d3052de1e8685c39b90357291f0f4fb3
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-03-17 15:24:30 +08:00
Finley Xiao
a2b002f666 nvmem: Fix dependencies for ROCKCHIP_EFUSE
On some rockchip platforms, need use secure interface to access efuse.

Change-Id: I49a4d5e547b689ff1665f1eb29a1dbbba5ef2595
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-03-17 15:23:50 +08:00
chenjh
45568625fe firmware: Kconfig: ROCKCHIP_SIP depends on HAVE_ARM_SMCCC and ARCH_ROCKCHIP
HAVE_ARM_SMCCC is default selected by ARM(if CPU_V7) or ARM64

Change-Id: I4bc64d4c98de5fad3179b3121b0f361d6337732c
Signed-off-by: chenjh <chenjh@rock-chips.com>
2017-03-17 15:18:54 +08:00
WeiYong Bi
14a8620d9b arm64: rockchip_defconfig: enable CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY
Change-Id: Iba7bd03c86691670990102e2202bf5c4e2a718b8
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
2017-03-17 15:11:20 +08:00
Mark Yao
d6ba614691 clk: rockchip: rk3368: remove the flag ROCKCHIP_PLL_SYNC_RATE for NPLL
NPLL is used for vop dclk, sync rate flag would cause loader display
abnormal.

Change-Id: Ia170a8d0b7d1f39e2c9dcbc10b5d33fd1886d5f7
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-03-17 15:10:54 +08:00
Zorro Liu
d1838ce8ee ARM64: dts: rk3368-android: remove rkfb related nodes
Change-Id: I6a180419aabd705736fa1274c3463bad0cb95304
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-03-17 15:02:53 +08:00
Mark Yao
03b9791af3 arm64: dts: rk3368: don't assign clock rates for display pll
NPLL is used for display pixelclock, assign clock rates would overlap
loader pll setting, cause display abnormal.

Change-Id: Iaf1094c43526c7ca7b364608fa7153d03f84326c
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-03-17 14:19:58 +08:00
Mark Yao
90b26dec64 arm64: dts: rk3368: assign clock rates for aclk_vop and hclk_vop
Change-Id: I1d8559f09cd2df516aa8d479aa1b7407418916aa
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-03-17 14:19:39 +08:00
WeiYong Bi
edd4032b64 ARM64: dts: rk3368: Add MIPI DSI support
Change-Id: Ia74bb0726cb23acc914f976acf76849f0e764280
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
2017-03-17 11:30:43 +08:00
WeiYong Bi
6ee9b7d6fb drm/rockchip/dsi: dw-mipi: Add support for RK3368 MIPI DSI Controller Host
Change-Id: I6c16b5a51451cdfc112a0bdefb44ad5a4b216c4f
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
2017-03-17 11:28:39 +08:00
WeiYong Bi
35a788ded3 phy: Add support for INNO MIPI D-PHY
The INNO MIPI D-PHY is built in witch a standard digital interface
to talk to any third part Host controller.That is part of Rockchip SoCs,
like rk3368.

Change-Id: I9806882e0e3fb6b20348015d0f34923d1bc46b89
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
2017-03-17 11:26:29 +08:00
Jianqun Xu
94ea732c72 arm64: dts: rockchip: rk3368 enable pmu node
Change-Id: I031fb437a84b19bb7cc389acb2404777f732cf6c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-03-17 10:49:26 +08:00
Elaine Zhang
81ea6550cc arm64: dts: rockchip: rk3368: add qos node
when pd power on/off, the qos regs need to save and restore.

Change-Id: I34146660e75609517463d679271386b536401b20
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-03-17 10:48:49 +08:00
chenjh
30a9b9fd67 firmware: rockchip: fix AARCH32 compile warning
Change-Id: I31924c9a1180d7fe034233c7ebd90413a7fa0fc3
Signed-off-by: chenjh <chenjh@rock-chips.com>
2017-03-16 16:43:52 +08:00
Jianqun Xu
4fa5180387 arm64: dts: rk3368: set higher voltage for gpu dvfs
As GPU share voltage domain with DDR and the minimum voltage of DDR
696MHz is 1100mV, GPU's voltage must be equal or greater than 1100mV.

After add ddr frequency scaling support, we can change them again.

Change-Id: I761931675265aac75425bf1cc9c7280a33f91e16
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-03-16 14:30:34 +08:00
Bin Yang
c374936464 drm/bridge: dw_hdmi: clear ih_mute register when system resume
HDMI PD is power off when system suspend, so ih_mute register
bit0 mute_all_interrupt will be reset to 1 when system resume.
HPD interrupt will be mask, that would cause hdmi plugin could
not be detected.

Change-Id: I3bf2e6116e902cd516a7ac69fbe8569ca943e853
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
2017-03-16 14:26:48 +08:00
Finley Xiao
f030ff821d arm64: dts: rockchip: modify cpu's opp table for rk3368
Change-Id: I2f7f15f9b3a9e6190e5e8895e9e4fe939d284b43
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-03-16 11:33:00 +08:00
Jianqun Xu
4f9bae4246 FROMLIST: arm64: dts: rockchip: rk3368 swap clust0 and clust1
Before this patch, clust1 has little core0~3, clust0 has big core0~3
cpu_l | cpu0 |
cpu_l | cpu1 | clust1
cpu_l | cpu2 |
cpu_l | cpu3 |
----------------------
cpu_b | cpu4 |
cpu_b | cpu5 | clust0
cpu_b | cpu6 |
cpu_b | cpu7 |

With this patch, clust0 will have little core0~3, clust1 will have big core0~3
cpu_l | cpu0 |
cpu_l | cpu1 | clust0
cpu_l | cpu2 |
cpu_l | cpu3 |
----------------------
cpu_b | cpu4 |
cpu_b | cpu5 | clust1
cpu_b | cpu6 |
cpu_b | cpu7 |

It makes no other change, just keep same with other SoCs definations.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9625109/)

Change-Id: I1beea4d3e75409d3a1f1614b0b86f1a929db4eee
2017-03-16 11:32:49 +08:00
Shawn Lin
03150c2ba8 arm64: dts: rockchip: add linux,pci-domain for PCIe
We need this to ask PCIe bus allocater to always
assign 0 to our root bus isntead of increasing it
, otherwise the hierarchy would be wrong if we unbind
and bind the root port.

Change-Id: I4ada61c89e617c7bccd92c5f9fa3334cae40603e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2017-03-16 11:30:35 +08:00
Sinan Kaya
3694d7d0d0 UPSTREAM: PCI: Add pci_unmap_iospace() to unmap I/O resources
Add pci_unmap_iospace() to undo what pci_remap_iospace() did.

This is needed to support hotplug removal of host bridges that use
pci_remap_iospace().

Change-Id: Iee5d778cb8ddfedab59c55c227a8c60825786854
[bhelgaas: changelog]
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
(cherry picked from 4d3f138459)
Conflicts:
	drivers/pci/pci.c
2017-03-16 11:25:48 +08:00
Shawn Lin
946c054110 UPSTREAM: PCI: rockchip: Fix rockchip_pcie_probe() error path to free resource list
rockchip_pcie_probe() calls of_pci_get_host_bridge_resources() to parse
resources from DT and build a resource list.  The caller is responsible for
disposing of the resource list.  This is normally done by
pci_release_host_bridge_dev() when the host bridge is removed.

If the host bridge probe fails, dispose of the resource list in the probe
error path.

Change-Id: Iefc17963a6ce99c64f2940d8dc2ba93bd00fe120
[bhelgaas: changelog]
Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from f1d722b607)
2017-03-16 11:25:30 +08:00
Shawn Lin
ced6f050d4 PCI: rockchip: remove the warning log of 32bit-access only
That prevents me from doing git-am or git-cp patches from
linux-pci, but it was removed by a patch involving some other
platforms as well as a pci-core change, so I won't touch anything
else but pcie-rockchip.

Change-Id: I4268204b4c1d173a385bed8d1b6f7305bef0b5eb
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2017-03-16 11:25:14 +08:00
Shawn Lin
21f50b58fb PCI: rockchip: remove redundant platform data assignment
We add it twice, so remove one.

Change-Id: I103ee8ffcc15569d65e9455a5465ac4b7dc5112d
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2017-03-16 11:25:00 +08:00
Shawn Lin
cda08393f8 PCI: rockchip: add new dev variable to indent the log
Change-Id: Idc3bf972c7ab47187b115fb1d2efe7847ee82796
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2017-03-16 11:24:53 +08:00
Elaine Zhang
a4d5799749 clk: rockchip: rk3368: export SCLK_TIMERXX id for timers
Change-Id: I77fa21f29e7ff46e1bd4150845dfafe0a83b84c1
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-03-16 08:50:17 +08:00
ZhuangXiaoLiang
ee26241747 ARM64: dts: rk3368: Update gpu opp table.
Change-Id: Id155a49d96e7533cb8c7f930c63528f452836b0e
Signed-off-by: ZhuangXiaoLiang <zhuangxl@rock-chips.com>
2017-03-16 08:43:48 +08:00
Frank Wang
8718e585e3 arm64: dts: rockchip: enable ehci/ohci and u2phy for rk3368-sheep
This adds enable ehci/ohci and u2phy configuration for rk3368-sheep.

Change-Id: Icafd7d0606ea199bdd8eac902b40459694b7f5a4
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-03-16 08:35:21 +08:00
Frank Wang
064752be44 arm64: dts: rockchip: add vcc-host regulator for rk3368-sheep
This adds abstract vbus-host as a vcc-host regulator on rk3368-sheep.

Change-Id: I64deb38a3333346c47a5e2f499cec8d538d18baa
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-03-16 08:35:05 +08:00
Frank Wang
2005ce5dc1 arm64: dts: rockchip: add ehci/ochi and u2phy nodes for rk3368
This adds configure ehci/ohci and u2phy nodes for rk3368 SoC.

Change-Id: I80cc311d7c14abc56084118baccf87501d44263e
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-03-16 08:34:03 +08:00
Frank Wang
53d9df84d4 phy: rockchip-inno-usb2: add support for rk3368 SoC
This adds support host-port on rk3368 SoC and amend phy Documentation.

Change-Id: I49a2efe37aad8b34505e4dac08336dc4231f4669
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-03-16 08:33:35 +08:00
Frank Wang
6f32ea684e phy: rockchip-inno-usb2: amend sm work to support legacy SoC
This adds amend logic of sm work to compatibly support some legacy SoCs,
because _host_utmi_linestate_ and _host_utmi_hostdisconnect_ GRF status
bits which are required for host sm work were not introduced in these
SoCs.

Change-Id: Ib4f499f592618930ac5016a63b7a530674aa6005
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-03-16 08:33:27 +08:00
Finley Xiao
af6f2d70c0 clk: rockchip: rk3368: add 216M and 126M for armclkb and armclkl
support 216M/126M for armclkb and armclkl

Change-Id: I047ac24ad5a176923a55bd6934f06afcf272660d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-03-15 18:49:09 +08:00
Mark Yao
20201aebf8 ARM64: dts: rk3368: add vop display node
Change-Id: Ie747e90413fbfabe95e9d3c2ae55e02eff2e4708
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-03-15 18:34:58 +08:00
William Wu
7cc91d50e9 phy: rockchip-inno-usb2: don't power on otg phy in ls irq handler
The commit c590056b6a ("phy: rockchip-inno-usb2: usb remote
wakeup support") power on otg phy in linestate irq handler,
this will cause usb peripheral fail to connect to PC in the
following case:
1. enable otg linestate irq
2. set system enter deep sleep
3. wakeup system by power key
4. connect usb peripheral to PC, pull up D+ to ~3V, trigger
   linestate irq and power on otg phy.
5. usb peripheral do BC1.2 detect, but PC try to enumerate
   the usb peripheral at the same time and fail at last.

Actually the usb controller drivers (e.g. dwc3 driver)
and otg_sm_work can manage the otg phy power consumption, so
it doesn't need to power on otg phy in linestate irq handler.

Change-Id: Ifd78e4d44ab96f07f75f063ed20af153b4027028
Signed-off-by: William Wu <wulf@rock-chips.com>
2017-03-15 17:38:47 +08:00
Elaine Zhang
edd7917229 arm64: dts: rockchip: rk3368-p9: add ramp-delay for syr82x dcdc
Change-Id: I0a1cca68d6e40a881e153f824ccbeb611d006ff0
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-03-15 16:51:10 +08:00
William Wu
d3e500796d usb: dwc_otg_310: pcd: fix isoc in ep transfer issue
When test usb gadget uvc function, we find a isoc in
ep transfer bug that will cause uvc data transfer fail.
The error case is:

1. The current EP request is done, call complete_ep()
to completes the request, and then call start_next_request()
to check the EP request queue, in this error case, the
queue is empty, so it doesn't start next request, just
set ep frame_num to 0xFFFFFFFF.

2. NAK Interrutp is triggered, check isoc ep frame_num
is 0xFFFFFFFF, then reset the frame_num to 0, and then
call start_next_request() to check the EP request queue,
in this error case, the queue is still empty, so set ep
frame_num to 0xFFFFFFFF again.

But afer the above operation, the current code will
modify the ep frame_num in NAK Interrutp handler by
add ep bInterval to frame_num, this cause frame_num
change again, but not keep in 0xFFFFFFFF, so the next
NAK Interrutp handler doesn't start next request any
more.

This patch reset the frame_num to the current frame
number got from DSTS SOFFN register if detect the
frame_num is 0xFFFFFFFF in NAK Interrutp handler.
And modify the frame_num in NAK Interrutp handler
only when the frame_num is not 0xFFFFFFFF.

TEST=Set usb gadget as webcam, use Ubuntu Guvcview
to preview the webcam, observe the preview screen
and the error log "There are no more ISOC requests".

Change-Id: I4403a67b1d5d257d092a2a71d5666c5d6fd5af3c
Signed-off-by: William Wu <wulf@rock-chips.com>
2017-03-15 11:07:52 +08:00