Commit Graph

862908 Commits

Author SHA1 Message Date
Finley Xiao
c472f79a09 PM / devfreq: rockchip_dmc: Add SYS_STATUS_CIF0/1 system status support
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ie683ed0cc49b21ec95765396a73e2e7a3f7cbb04
2021-03-16 17:16:12 +08:00
Huang zhibao
241b780cac arm64: dts: rockchip: rk3568-nvr: set rockchip,default-max-load to 100
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I31859f56b753635999414342d934d18fa68298ad
2021-03-16 14:47:14 +08:00
Jianqun Xu
e169bc2262 irqchip/gic-v3: get free page instead of kmalloc for itt
Since kmalloc may not care about GFP_DMA32, change to use get free pages
for itt on its device.

Change-Id: I2e91c97bd4d61d2542cf437363fc3dd1d9fa669c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-03-16 14:43:13 +08:00
Shawn Lin
58a17c4f09 PCI: rockchip: dw: Fix possible wrong power supply
regulator_disable/enable() accessories may not be supported by
all regulator drivers such as gpio regulator. In order to compliant
to all, it would be better to call a .set_voltage() before enabling
or disabling regulators as this hook fits for all, no metter if enable
or disable hooks were implemented.

Change-Id: Id6c67728ed29ae76986908908361dec966724a3e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2021-03-16 14:41:01 +08:00
Shunqing Chen
ba901481e0 arm64: dts: rockchip: rk356x: evb: add hdmi phy-table
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I7314c505028f2e69698b693a036da8162c4842d8
2021-03-16 10:03:01 +08:00
Yifeng Zhao
f1be951d1b drivers: rk_nand: fix some NAND FLASH initialization failed issue
There are two sets of NAND flash drivers. The NAND flash state needs
to be restored to the default value after detection.

bug:
[    2.722218] No.1 FLASH ID:45 3a 94 93 76 51
[    2.726295] toshiba RR 18 row=400,count 18,status=-1
[    2.726353] flash_read_page_en 0 400 error_ecc -1 1

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I80c95a68ad900e0653684ba3978e59102d27bf70
2021-03-16 10:02:44 +08:00
Herman Chen
6e04278ece video: rockchip: mpp: rkvdec2: Rename functions
Rename rkvdec2 functions which have the same name to the rkvdec
functions.

Change-Id: I188ce1afa8e9fab0a63813a4071e42b51fe92ccf
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
2021-03-16 09:17:50 +08:00
Ding Wei
d15513be2c video: rockchip: mpp: Modify mpp_dma interface
Change-Id: Ia7b45daaa120a1f3bbb3adf9c2decda4f71d8c60
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
2021-03-15 20:00:24 +08:00
Herman Chen
444d1b0a64 video: rockchip: mpp: Add task index for debug
Change-Id: I2d8399f626d60afcb2149c21af0f39c9043c7200
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
2021-03-15 18:33:03 +08:00
Shawn Lin
3677e0f619 arm64: dts: rockchip: rk356x: correct gpio regulator usage
Should not be zero ahead, otherwise the min voltage is interpreted
as a wrong value by regulator code.

Change-Id: Ia141583f411a54bf26cb88b3992687539f29fec8
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2021-03-15 17:10:59 +08:00
Huang zhibao
495f9016d9 arm64: dts: rockchip: rk3566-box-demo-v10: enable sata2
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: If63af728d36d98698e4811666834729fd8868a0e
2021-03-15 17:09:20 +08:00
Shunqing Chen
c5ed611fe1 ARM: dts: rk3288-evb-android-rk808-edp: add test power
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: Ie9427d07e6ff40cdec7849a9897c8cbddb7ff720
2021-03-15 17:09:05 +08:00
Ville Syrjälä
b631bcf22d UPSTREAM: drm/dsc: Fix bogus cpu_to_be16() usage
__be16 = cpu_to_be16(__be16) is nonsense. Do it right.

../drivers/gpu/drm/drm_dsc.c:218:53: warning: incorrect type in assignment (different base types)
../drivers/gpu/drm/drm_dsc.c:218:53:    expected restricted __be16
../drivers/gpu/drm/drm_dsc.c:218:53:    got int
../drivers/gpu/drm/drm_dsc.c:225:25: warning: cast from restricted __be16
../drivers/gpu/drm/drm_dsc.c:225:25: warning: incorrect type in argument 1 (different base types)
../drivers/gpu/drm/drm_dsc.c:225:25:    expected unsigned short [usertype] val
../drivers/gpu/drm/drm_dsc.c:225:25:    got restricted __be16
../drivers/gpu/drm/drm_dsc.c:225:25: warning: cast from restricted __be16
../drivers/gpu/drm/drm_dsc.c:225:25: warning: cast from restricted __be16

Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: David Francis <David.Francis@amd.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190710125143.9965-2-ville.syrjala@linux.intel.com
Reviewed-by: Sean Paul <sean@poorly.run>
(cherry picked from commit 40d51c05d0)
Change-Id: Ia0bebf00c978b2a2bd8750de1210f9ee30e62cdb
2021-03-15 11:24:02 +08:00
David Francis
e139e81fd1 UPSTREAM: drm/dsc: Split DSC PPS and SDP header initialisations
The DP 1.4 spec defines the SDP header and SDP contents for
a Picture Parameter Set (PPS) that must be sent in advance
of DSC transmission to define the encoding characteristics.

This was done in one struct, drm_dsc_pps_infoframe, which
conatined the SDP header and PPS.  Because the PPS is
a property of DSC over any connector, not just DP, and because
drm drivers may have their own SDP structs they wish to use,
make the functions that initialise SDP and PPS headers take
the components they operate on, not drm_dsc_pps_infoframe,

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190221202001.28430-4-David.Francis@amd.com
(cherry picked from commit dbfbe717cc)
Change-Id: I691b513d778f8763e9e48e6b073a26fc1f6adb5b
2021-03-15 11:24:02 +08:00
David Francis
6da39e1110 UPSTREAM: drm/dsc: Add native 420 and 422 support to compute_rc_params
Native 420 and 422 transfer modes are new in DSC1.2

In these modes, each two pixels of a slice are treated as one
pixel, so the slice width is half as large (round down) for
the purposes of calucating the groups per line and chunk size
in bytes

In native 422 mode, each pixel has four components, so the
mux component of a group is larger by one additional mux word
and one additional component

Now that there is native 422 support, the configuration option
previously called enable422 is renamed to simple_422 to avoid
confusion

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190221202001.28430-3-David.Francis@amd.com
(cherry picked from commit 06d7cecdb6)
Change-Id: I5496e7bb6f3548fe9f59b6152ff0d72bb7d8fa7f
2021-03-15 11:24:02 +08:00
David Francis
58ac87aef0 UPSTREAM: drm/i915: Move dsc rate params compute into drm
The function intel_compute_rc_parameters is part of the dsc spec
and is not driver-specific. Other drm drivers might like to use
it.  The function is not changed; just moved and renamed.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190221202001.28430-2-David.Francis@amd.com
(cherry picked from commit dc43332b7a)
Change-Id: I306b87e9f29ef54f7011a12336d5ad277a65b6a2
2021-03-15 11:24:02 +08:00
Manasi Navare
b9630468f5 UPSTREAM: drm/dsc: Add kernel documentation for DRM DP DSC helpers
This patch adds appropriate kernel documentation for DRM DP helpers
used for enabling Display Stream compression functionality in
drm_dp_helper.h and drm_dp_helper.c as well as for the DSC spec
related structure definitions and helpers in drm_dsc.c and drm_dsc.h
Also add links between the functions and structures in the documentation.

v3:
* Fix the checkpatch warnings (Sean Paul)
v2:
* Add inline comments for longer structs (Daniel Vetter)
* Split the summary and description (Daniel Vetter)

Suggested-by: Daniel Vetter <daniel.vetter@intel.com>
Suggested-by: Sean Paul <sean@poorly.run>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Sean Paul <sean@poorly.run>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <sean@poorly.run>
Reviewed-by: Daniel Vetter <daniel.vetter@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190206213148.21390-1-manasi.d.navare@intel.com
(cherry picked from commit 05bad2357a)
Change-Id: I241d62c90db77f542690a244908ff8e1836633c4
2021-03-15 11:24:02 +08:00
Manasi Navare
d3f201f534 UPSTREAM: drm/dsc: Modify DRM helper to return complete DSC color depth capabilities
DSC DPCD color depth register advertises its color depth capabilities
by setting each of the bits that corresponding to a specific color
depth. This patch defines those specific color depths and adds
a helper to return an array of color depth capabilities.

v2:
* Simplify the logic (Ville)

Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-1-manasi.d.navare@intel.com
(cherry picked from commit 4d4101c8b3)
Change-Id: I3f8e33773f965c7b347df17be6227c253eb5a075
2021-03-15 11:24:02 +08:00
Manasi Navare
d9e8d88cb0 UPSTREAM: drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
DSC specification defines linebuf_depth which contains the
line buffer bit depth used to generate the bitstream.
These values are defined as per Table 4.1 in DSC 1.2 spec

v2 (From Manasi):
* Rename as MAX_LINEBUF_DEPTH for DSC 1.1 and DSC 1.2

Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-6-manasi.d.navare@intel.com
(cherry picked from commit f25310c736)
Change-Id: I1582b2b49463810f356bf7fdaf35b0730a81308c
2021-03-15 11:24:02 +08:00
Manasi Navare
24674c188c UPSTREAM: drm/dsc: Add helpers for DSC picture parameter set infoframes
According to Display Stream compression spec 1.2, the picture
parameter set metadata is sent from source to sink device
using the DP Secondary data packet. An infoframe is formed
for the PPS SDP header and PPS SDP payload bytes.
This patch adds helpers to fill the PPS SDP header
and PPS SDP payload according to the DSC 1.2 specification.

v7:
* Use BUILD_BUG_ON() to protect changing struct size (Ville)
* Remove typecaseting (Ville)
* Include byteorder.h in drm_dsc.c (Ville)
* Correct kernel doc spacing (Anusha)
v6:
* Use proper sequence points for breaking down the
assignments (Chris Wilson)
* Use SPDX identifier
v5:
Do not use bitfields for DRM structs (Jani N)
v4:
* Use DSC constants for params that dont change across
configurations
v3:
* Add reference to added kernel-docs in
Documentation/gpu/drm-kms-helpers.rst (Daniel Vetter)

v2:
* Add EXPORT_SYMBOL for the drm functions (Manasi)

Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-5-manasi.d.navare@intel.com
(cherry picked from commit a408c857a9)
Change-Id: I3f46f13570f95488f4f1ba0dff6801457109e1a3
2021-03-15 11:24:02 +08:00
Srivatsa, Anusha
7d5903e328 UPSTREAM: drm/dsc: Define Rate Control values that do not change over configurations
DSC has some Rate Control values that remain constant
across all configurations. These are as per the DSC
standard.

v3:
* Define them in drm_dsc.h as they are
DSC constants (Manasi)
v2:
* Add DP_DSC_ prefix (Jani Nikula)

Cc: dri-devel@lists.freedesktop.org
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Srivatsa, Anusha <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-4-manasi.d.navare@intel.com
(cherry picked from commit 082a7b8601)
Change-Id: Ifefe0bc5dfae70bbe9228bde8b50fe7c2cc37816
2021-03-15 11:24:02 +08:00
Manasi Navare
360884e66e UPSTREAM: drm/dsc: Define VESA Display Stream Compression Capabilities
This defines all the DSC parameters as per the VESA DSC spec
that will be required for DSC encoder/decoder

v6: (From Manasi)
* Add a bit mask for RANGE_BPG_OFFSET for 6 bits(Manasi)
v5 (From Manasi)
* Add the RC constants as per the spec
v4 (From Manasi)
* Add the DSC_MUX_WORD_SIZE constants (Manasi)

v3 (From Manasi)
* Remove the duplicate define (Suggested By:Harry Wentland)

v2: Define this struct in DRM (From Manasi)
* Changed the data types to u8/u16 instead of unsigned longs (Manasi)
* Remove driver specific fields (Manasi)
* Move this struct definition to DRM (Manasi)
* Define DSC 1.2 parameters (Manasi)
* Use DSC_NUM_BUF_RANGES (Manasi)
* Call it drm_dsc_config (Manasi)

Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Co-developed-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-3-manasi.d.navare@intel.com
(cherry picked from commit 19fd5adbb5)
Change-Id: I95115779a7efaef93309cabb16691be632be1d54
2021-03-15 11:24:02 +08:00
Manasi Navare
1455f21ce0 UPSTREAM: drm/dsc: Define Display Stream Compression PPS infoframe
This patch defines a new header file for all the DSC 1.2 structures
and creates a structure for PPS infoframe which will be used to send
picture parameter set secondary data packet for display stream compression.
All the PPS infoframe syntax elements are taken from DSC 1.2 specification
from VESA.

v4:
* Remove redundant blankline in doc (Ville)
* use drm_dsc namespace for all structs (Ville)
* Use packed struct (Ville)
v3:
* Add the SPDX shorthand (Chris Wilson)
v2:
* Do not use bitfields in the struct (Jani Nikula)

Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-2-manasi.d.navare@intel.com
(cherry picked from commit 7c247c0675)
Change-Id: I3f21cf671e629e10092a35675316bd6c772cc9f9
2021-03-15 11:24:02 +08:00
Manasi Navare
b67617785a UPSTREAM: drm/dp: DRM DP helper/macros to get DP sink DSC parameters
This patch adds inline functions and helpers for obtaining
DP sink's supported DSC parameters like DSC sink support,
eDP compressed BPP supported, maximum slice count supported
by the sink devices, DSC line buffer bit depth supported on DP sink,
DSC sink maximum color depth by parsing corresponding DPCD registers.

v4:
* Add helper to give line buf bit depth (Manasi)
* Correct the bit masking in color depth helper (manasi)
v3:
* Use SLICE_CAP_2 for DP (Anusha)
v2:
* Add DSC sink support macro (Jani N)

Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-4-manasi.d.navare@intel.com
(cherry picked from commit 0575650077)
Change-Id: I0d4952118e1b9e9a613d71abe1e0ecfaab1af6cc
2021-03-15 11:24:02 +08:00
Manasi Navare
47edb50671 UPSTREAM: drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT
This patch defines the DP DSC receiver capability size that gives
total number of DP DSC DPCD registers.
This also adds a missing #defines for DP DSC support missed in the
commit id (ab6a46ea68 "Add DPCD definitions for DP 1.4 DSC feature")

v3:
* MIN_SLICE_WIDTH = 2560 (Anusha)
* Define DP_DSC_SLICE_WIDTH_MULTIPLIER = 320
v2:
* Add SHIFT define and DECOMPRESSION_EN define missed in prev patch

Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-2-manasi.d.navare@intel.com
(cherry picked from commit ffddc4363c)
Change-Id: Ie6fea02981e53658d1d94cc0be9029fbf5a5e1f2
2021-03-15 11:24:02 +08:00
Manasi Navare
004e29eb3a UPSTREAM: drm/dp: Define payload size for DP SDP PPS packet
DP 1.4 spec defines DP secondary data packet for DSC
picture parameter set. This patch defines its payload size
according to the DP 1.4 specification.

Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-7-manasi.d.navare@intel.com
(cherry picked from commit 6e97272a9a)
Change-Id: I2d3bc1d31286da528b38fc79230c3d3b2935edb2
2021-03-15 11:24:02 +08:00
Ankit Nautiyal
e8095dc82a UPSTREAM: drm/edid: Parse DSC1.2 cap fields from HFVSDB block
This patch parses HFVSDB fields for DSC1.2 capabilities of an
HDMI2.1 sink. These fields are required by a source to understand the
DSC capability of the sink, to set appropriate PPS parameters,
before transmitting compressed data stream.

v2: Addressed following issues as suggested by Uma Shankar:
-Added a new struct for hdmi dsc cap
-Fixed bugs in macros usage.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
[Jani: Fixed checkpatch PARENTHESIS_ALIGNMENT.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-4-ankit.k.nautiyal@intel.com
(cherry picked from commit 76ee7b9056)
Change-Id: I02d96954736a9dae33cc31e06f411f2ffffddc35
2021-03-15 11:24:02 +08:00
Swati Sharma
67020697e3 UPSTREAM: drm/edid: Parse MAX_FRL field from HFVSDB block
This patch parses MAX_FRL field to get the MAX rate in Gbps that
the HDMI 2.1 panel can support in FRL mode. Source need this
field to determine the optimal rate between the source and sink
during FRL training.

v2: Fixed minor bugs, and removed extra wrapper function (Uma Shankar)

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
[Jani: Fixed checkpatch FROM_SIGN_OFF_MISMATCH, PARENTHESIS_ALIGNMENT.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-3-ankit.k.nautiyal@intel.com
(cherry picked from commit 4499d488f6)
Change-Id: I34cec87592960398eb04e9c2437b9352c14cdf3e
2021-03-15 11:24:02 +08:00
Swati Sharma
e95a840b8e UPSTREAM: drm/edid: Add additional HFVSDB fields for HDMI2.1
The HDMI2.1 extends HFVSDB (HDMI Forum Vendor Specific
Data block) to have fields related to newly defined methods of FRL
(Fixed Rate Link) levels, number of lanes supported, DSC Color bit
depth, VRR min/max, FVA (Fast Vactive), ALLM etc.

This patch adds the new HFVSDB fields that are required for
HDMI2.1.

v2: Minor fixes + consistent naming for DPCD register masks
(Uma Shankar)

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
[Jani: Fixed checkpatch FROM_SIGN_OFF_MISMATCH.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-2-ankit.k.nautiyal@intel.com
(cherry picked from commit 9bb85a6e29)
Change-Id: Ibbdea12806897cab0f95d13847b7e3d8bea1931d
2021-03-15 11:24:02 +08:00
Andy Yan
cc27baeeb7 drm/rockchip: dw-hdmi: Support multi connector attach one crtc
VOP support one VP output to multi connectors with
the same scan out timing.

Change-Id: I4f31140135b0ebca89caa6a94be2f1a558e34a31
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-03-15 09:14:49 +08:00
Andy Yan
53744719be drm/rockchip: vop2: use dev_dbg instead of DRM_WARN to warn odd dst_w
There are many display scene with odd dst_w, so
DRM_WARN will bring too much warning log, which
may frighten somebody.
Use dev_dbg hide it.

Change-Id: I2b132eb49a90792468fbea4e133c9e63aa50bf04
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-03-13 18:21:55 +08:00
Zefa Chen
dbc572151b media: i2c: imx307 support lvds 2 lane
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I2828b5db68064e15597f37ceac80f1307bb90c71
2021-03-12 19:09:49 +08:00
Ren Jianing
0b82f4909b usb: gadget: u_audio: disable eps when usb disconnect
UAC gadget disable eps only when receiving set_alt_0. If USB is
unplugged before the packet of set_alt_0, the corresponding eps
will not be released and leading to UAC dysfunction when the next
time the usb is plugged.

Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I476ef8ce64a5b04cc3fec32a28126e2eb9d5ad78
2021-03-12 18:45:50 +08:00
Yiqing Zeng
2b48a7268d media: i2c: gc02m2: update gc02m2 sensor driver
1. add hflip/vflip function.
2. modify set_gain_reg function.

Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Change-Id: I5178fee98bc06e445737a2c7f665921d501ec906
2021-03-12 17:30:02 +08:00
Cai YiWei
eb6b27104a media: rockchip: ispp: add cru reset
Change-Id: Ief13da5cb192777d9743954377005ef90796e8c7
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-03-12 17:26:19 +08:00
Zefa Chen
ddc6e37dc6 media: i2c: ov4689 fixed hdr2 exposure issue
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ie9f7c0401d6b1b3ee30a159c1c2aac02e17a9e04
2021-03-12 15:51:33 +08:00
Yandong Lin
b3c39dfa96 video: rockchip: mpp: Fix wait all the time when hw hang issue
When the dec hw is stuck, the software timeout is triggered.
the waiting thread should be awakened and return timeout at this time.

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ifc1a6fbac4b4b328c7a2f5c8d8a6322fff222088
2021-03-12 15:50:19 +08:00
Steven Liu
95c92f0df0 arm64: dts: rockchip: rk3568: add pwm interrupt
Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: Ie330a1cc111d1f9f9cbedc7f123e06b31518fa5a
2021-03-12 15:49:42 +08:00
Lin Jinhan
4c59d5d2ae crypto: rockchip: fix dead lock when FDE enable
Full disk encryption can result in a deadlock by nested
 calls to the crypto driver.To fix this bug, it should
decrease the granularity of mutex, lock in rk_load_data
 and unlock in rk_unload_data.

Change-Id: Ic61aadfe3e6f548e1c2e27be9862941af2b53fd9
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-03-12 15:49:26 +08:00
Lin Jinhan
c3b8c753c6 crypto: rockchip: fix bugs on rk_iv_copyback
rk_iv_copyback is referring NULL point in ECB mode calculation
which will cause kernel crashed.

Change-Id: I98edd3529811b08b3de4fc46437a7d0d32e36f6f
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-03-12 15:49:26 +08:00
Cai YiWei
ad10b5dd9b media: rockchip: ispp: fix input video config
Change-Id: I818e546aabc63fa717354cdcdf2eaadb146bb0f4
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-03-12 15:08:00 +08:00
Cai YiWei
44b1a2e820 media: rockchip: isp: fix err of mp dump raw for isp20
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
Change-Id: If36d8f233db6318b51a65ed80fa4343f6f5e3aaf
2021-03-12 15:07:36 +08:00
Allon Huang
20118d8c09 phy: rockchip: csi2-dphy: optimize config operation code
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: I210e8de9b437d5117649609c53591dedf42fae00
2021-03-12 14:54:32 +08:00
Jianqun Xu
6a40ead69f staging: android: ion: set dma ops for platform device
Set dma ops for platform device.

Change-Id: I09c43104774f8b5b95f816293a44d280d8d0f23a
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-03-12 14:36:19 +08:00
Tao Huang
319e24e84a Revert "staging: android: ion: use dma_sync_sg_for_device to do flush"
This reverts commit d37c482e0e.

Change-Id: I320b78412a9a89fea7f24c3c8405176d750d0415
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2021-03-12 14:35:13 +08:00
Jon Lin
5e9451196b drivers: rkflash: Support more slc nand
Change-Id: I243b6dec7a23a11514d2b623b3aef19bca4cfd83
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-03-12 14:31:42 +08:00
Andy Yan
7a827bc658 drm: Fix typo in drm_debugfs
Change-Id: Iafbab1e642b95acbbc64c04e9ad3e39d720c0a4e
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-03-12 14:27:11 +08:00
Sandy Huang
e1370ed7ec drm/rockchip: vop2: set vop min size to 4x4
Change-Id: I6e11917386400cec306520b52feecf4f78a971f7
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-03-12 11:49:29 +08:00
Sandy Huang
6749d4644b drm/rockchip: vop: set vop min size to 4x4
Change-Id: Ib00c223b4df34cf0821e19fb23b54c1496bc2b3a
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-03-12 11:49:22 +08:00
Allon Huang
89d6545bd1 media: rockchip: cif: update frm0 buf when frm0/frm1 appear simultaneously to avoid panic
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: I9062f45c9fc2ac6799c768182fbb2214906117df
2021-03-12 09:13:46 +08:00