soft reset works on SCLK, which come from external device
when controller work as slave mode.
When SCLK disabled before reset done, the controller stalled
and can not recovery.
Instead, we do global reset for this issue.
Change-Id: If801aa03a01d42386f7cfa6145cd6d0af7a3b041
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
The rk_dma_heap_bufferfd_alloc has expand argument 'const char *name'
which is used for debug to oversee all dmabuf.
The dma_buf_set_name is provided and exported by dma-buf, also support
via ioctl of dma-buf. This patch set the name to dmabuf if support for
the CONFIG_DMABUF_RK_HEAPS_DEBUG.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I834a1f2009d5a1c6a6835ea78b3dd1aeec43e31f
Enable the 'cache_sgt_mapping' for rk_cma_heap_buf_ops, to cache the
first mapping made for each attachment. This avoids create mappings for
attachments multiple times.
By the way, cache the sgt can support debugfs to get the buffer
information from scatterlists.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Id822e3088af9eab5d88d0172c31191d2fc9d4151
The rk_cma_heap and rk_cma_heap_buffer are only used by rk cma heap
driver, move them into driver.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I98867254dff5d4092008aa70244bbf9e10c394ac
There are three head files named "rk-dma-heap.h", one is the uapi, and
the other two both for drivers.
<drivers/dma-buf/rk_heaps/rk_dma_heap.h> is designed for rk-dma-heap.c
which is located the same directory, always include it by a relative
path - "rk-dma-heap.h".
<include/linux/rk_dma_heap.h> is designed for other kernel module to use
the apis from rk-dma-heap, it only declears the functions which may used
by other modules. And importantly, this file declear "struct rk_dma_heap".
Before this patch, the xx-heap.c under "rk_heaps" directory should keep
mind to include the <linux/rk_dma_heap.h> first to declear rk_dma_heap
struct, then to include the "rk_dma_heap.h" to define other things, such
as debug, structures and declear functions.
This patch makes the <drivers/dma-buf/rk_heaps/rk_dma_heap.h> to include
the <include/linux/rk_dma_heap.h>, after that, the heap drivers only
need to include "rk_dma_heap.h", and the other modules only need to keep
to include <linux/rk_dma_heap.h>.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I9e9aabb3247e02439249872c2483d716a4af07c8
Only rename rk_dma_heap_attachment to rk_cma_heap_attachment, this patch
do nothing fix to driver.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ief67ed2a8c849398c41d82f9a1fdeac697d68b4a
This patch moves the reset property of usb dwc3_0 and dwc3_1
to the dwc3 core node, then it can reset the dwc3 controller
in runtime PM and sleep PM, rather than only reset in sleep
PM. This can help to fix typec phy power on fail with the
following log when do hotplug test with Type-C dongle.
phy phy-ff7c0000.phy.9: phy poweron failed --> -110
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I27c90147591f83e8cacb8147ed49c1c6c9646a46
Default set CONFIG_DMABUF_HEAPS_ROCKCHIP_CMA_ALIGNMENT to '8' to keep
nothing fix with this patch for heap.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ie1d41b001e2414766989de576f96f21069a7508e
This adds the necessary data for handling pvtm on the RV1106.
Change-Id: I72c1cb38141cf246738d3a592cb7c8a9f4192815
Signed-off-by: Liang Chen <cl@rock-chips.com>
1. Fixup fix_width will only be less than 128(0x3f).
2. Add support RGBA2BPP.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I8af80a6ca6e26a0b1e2f023427108739fdf27dfa
Support to modify and cache the parameters passed by mpi.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: If6b3b10336280d7d2e6a0195eb38e8f5bad2b024
Camera should declare vicap_clkout/mipi_refclk_out independently,
ensure that the initialized successfully without cif/mipi.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I1dce667774d0aec0ec1ee9361c124d0fead95eb9
This patch make driver able to set the queue depth and keep the default
vaule to be '64'.
Change-Id: I54cd065d6536c170d1615a6f9d7071d479bfeb84
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Add mutex to prevent multi-threaded concurrency from competing.
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ia9a0dad65b47168c4588cf64eaa93e0d2566e17e
On page 362 of the USB3.2 specification (
https://usb.org/sites/default/files/usb_32_20210125.zip),
The 'SuperSpeed Endpoint Companion Descriptor' shall only be returned
by Enhanced SuperSpeed devices that are operating at Gen X speed.
Each endpoint described in an interface is followed by a 'SuperSpeed
Endpoint Companion Descriptor'.
If users use SuperSpeed UDC, host can't recognize the device if endpoint
doesn't have 'SuperSpeed Endpoint Companion Descriptor' followed.
Currently in the uac2 driver code:
1. ss_epout_desc_comp follows ss_epout_desc;
2. ss_epin_fback_desc_comp follows ss_epin_fback_desc;
3. ss_epin_desc_comp follows ss_epin_desc;
4. Only ss_ep_int_desc endpoint doesn't have 'SuperSpeed Endpoint
Companion Descriptor' followed, so we should add it.
Fixes: eaf6cbe099 ("usb: gadget: f_uac2: add volume and mute support")
Signed-off-by: Jing Leng <jleng@ambarella.com>
Link: https://lore.kernel.org/all/20220218095948.4077-1-3090101217@zju.edu.cn/
Change-Id: Iceb69749909795632a1620cd5c6f70756c2bf023
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Currently the f_uac1 driver only supports UAC_SET_CUR request.
But when uac1 device is plugged to Ubuntu 20.04 PC, at the stage
of setup, the PC will send UAC_SET_RES request, If the device
doesn't respond to the request, the PC will abort the setup process
and uac1 device can't be recognized on Ubuntu 20.04 PC.
So f_uac1 driver should handle other set requests.
Fixes: 0356e6283c ("usb: gadget: f_uac1: add volume and mute support")
Signed-off-by: Jing Leng <jleng@ambarella.com>
Link: https://lore.kernel.org/all/20220218094947.3835-1-3090101217@zju.edu.cn/
Change-Id: I733f2fdab6256fe29094a15b31e3490f59e6498b
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
On page 61 of the UAC1 specification (
https://www.usb.org/sites/default/files/audio10.pdf),
bInterval is interval for polling endpoint for data transfers
expressed in milliseconds, must be set to 1.
On page 47 of the USB2.0 specification (
https://www.usb.org/sites/default/files/usb_20_20211008.zip),
An isochronous endpoint must specify its required bus access period.
Full-/high-speed endpoints must specify a desired period as
(2^(bInterval-1)) x F, where bInterval is in the range one to
(and including) 16 and F is 125 μs for high-speed and 1ms for full-speed.
On page 362 of the USB3.2 specification (
https://usb.org/sites/default/files/usb_32_20210125.zip),
The 'SuperSpeed Endpoint Companion Descriptor' shall only be
returned by Enhanced SuperSpeed devices that are operating at Gen X speed.
Each endpoint described in an interface is followed by a 'SuperSpeed
Endpoint Companion Descriptor'.
Currently uac1 driver doesn't set bInterval to 1 in full speed transfer
and doesn't have a 'SuperSpeed Endpoint Companion Descriptor' behind
'Standard Endpoint Descriptor'.
So we should set bInterval to 1 in full speed transfer and set it to 4
in other speed transfers, and we should add 'SuperSpeed Endpoint Companion
Descriptor' behind 'Standard Endpoint Descriptor' for superspeed transfer.
Signed-off-by: Jing Leng <jleng@ambarella.com>
Link: https://lore.kernel.org/all/20220217051951.7466-1-3090101217@zju.edu.cn/
Change-Id: I53205c1850a0239d1f39f4c44cea77bfb1c00e81
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
bay3d support 8x8 write to ddr for full resolution
drc gas_t 13bit
Change-Id: Ifb58985858a66257be0f8811e94e089f75ef19ff
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
The default clock is not necessarily the normal operating
frequency, so the frequency must be specified explicitly.
CORE_CRYPTO: 300M
PKA_CRYPTO : 300M
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ic65db79365c0b21678d04bb0a09cc813d84c1eb7
