Power down feature of DWC2 module integrated in Rockchip SoCs doesn't work
properly or needs some additional handling in PHY or SoC glue layer, so
disable it for now. Without disabling power down, DWC2 sporadically cannot
detect USB disconnect.
Change-Id: Ic46fdb7a000b9029727a6a46e4ca5399b98285e8
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
The dwc2 programming guide section 3.5 'Halting a Channel'
says that the application can disable any channel by
programming the HCCHARn register with the HCCHARn.ChDis
and HCCHARn.ChEna bits set to 1'b1. This enables the
dwc_otg host to flush the posted requests (if any) and
generates a Channel Halted interrupt.
But it also requires that channel disable must not be
programmed for non-split periodic channels. At the end
of the next uframe/frame (in the worst case), the core
generates a channel halted and disables the channel
automatically.
If we disable non-spilt periodic channels to halt the
channels, it will easily to cause data transfer fail.
A typical case is take photo with usb camera or close
usb camera, Specifically, the observed order is:
1. uvc driver calls usb_kill_urb
2. usb_kill_urb calls urb_dequeue to cancel urb
3. urb_dequeue call dwc_otg_hc_halt to disable
non-spilt periodic channels
4. usb core doesn't halt the non-spilt periodic
channels immediately, and the application
reallocates the channels for other transactions
without waiting for the HCINTn.ChHltd interrupt.
5. uvc driver calls usb_set_interface to start
control transfer, and gets a channel which used
for non-spilt periodic transfer before. The core
generates a channel halted and disables the channel
automatically. This cause control transfer fail.
Change-Id: I95424a99b77b552396a9fb95a5058258270ed4c2
Signed-off-by: William Wu <william.wu@rock-chips.com>
The commit e6f2f6d63e ("usb: dwc2: power on/off phy for
otg mode") aimed to control phy power for otg mode, but
it also introduced a new problem, so we fix it.
This patch keep phy power on for otg if current mode is
host during dwc2 probe, otherwise the enumeration will
fail with the following error log:
Cannot enable. Maybe the USB cable is bad?
Cannot enable. Maybe the USB cable is bad?
attempt power cycle
Cannot enable. Maybe the USB cable is bad?
Cannot enable. Maybe the USB cable is bad?
unable to enumerate USB device
Fixes: e6f2f6d63e ("usb: dwc2: power on/off phy for otg mode")
Change-Id: I17a4cab6f0337fdc0923989aea8613bfbe1a9e9b
Signed-off-by: Feng Mingli <fml@rock-chips.com>
The frame_overrun flag is used to indicates
SOF number (current_frame) overrun in DSTS
and the target_frame over DSTS_SOFFN_LIMIT.
Clear the frame_overrun flag only if target_frame
below DSTS_SOFFN_LIMIT and current_frame less
than target_frame.
Change-Id: I91cf9001324a9bbbcc4bc28b335695d607fb69d4
Signed-off-by: William Wu <william.wu@rock-chips.com>
Adds pm_runtime support for dwc2, so that power domain is
enabled only when there is a transaction going on to help
save power.
Change-Id: I318552774d20eeaed521ff179f99b2551ee24183
Signed-off-by: William Wu <william.wu@rock-chips.com>
When a usb device disconnects in a certain way, dwc2_queue_transaction
still gets called after dwc2_hcd_cleanup_channels.
dwc2_hcd_cleanup_channels does "channel->qh = NULL;" but
dwc2_queue_transaction still wants to dereference qh.
This adds a check for a null qh.
(am from https://patchwork.kernel.org/patch/7245251/)
Change-Id: Ia9c7f5febe0bb6f0123cfc85c90beb9fc1d80bdd
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
The operation mode of controller will change to peripheral when
resume if PD is power off during suspend, current code disconnect
hcd and set lx state to L3 in this case to make sure the controller
will be reinit in device mode, but that's not enough, the op_state
is still host which is change when init or ID change interrupt
occur. If the ID change happened after suspend the driver would
miss the interrupt, so when the application call the pullup function
to stop gadget and start again to change to another function, the
disconnect gadget operation can't be done and the gadget restart
directly. This will result in NULL point when gadget work. This
patch set op_state to OTG_STATE_B_PERIPHERAL when resume in this
case.
Change-Id: Ifbafb7fae43d634cfa879c9a066d1e114db4196e
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
The controller will reset and run into error state if turn
off power when suspend in host mode. This patch stop hcd to
make the controller into L3 state to make sure that the
controller and driver state will reset when resume.
Change-Id: If66bc1a249e919f440ecde0c66f18dabde0b2e62
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
The commit dc71e51944 ("usb: dwc2: make otg manage lowlevel
hw on its own") aimed to control the clk and phy power for
otg mode, but it also introduced lost of new problems, so we
revert it.
This patch only controls phy power for otg mode, it can fix
the dwc2 udc start fail issue with the following error log:
dwc2_hsotg_init_fifo: timeout flushing fifos (GRSTCTL=80000430)
dwc2_core_reset() HANG! Soft Reset GRSTCTL=80000001
bound driver configfs-gadget
dwc2_core_reset() HANG! Soft Reset GRSTCTL=80000001
Change-Id: Id6996aecab7f0aaaf12530b7a377144e23ef1667
Signed-off-by: William Wu <william.wu@rock-chips.com>
When handle disconnect of the hcd during bus_suspend, hcd
needs to resume its root hub, otherwise the root hub will
not disconnect the existing devices under its port.
This issue always happens when connecting with usb devices
which support auto-suspend function (e.g. usb hub).
(am from https://patchwork.kernel.org/patch/9751469/)
Change-Id: I663fdea73f36e89130d9a250612363968cbff941
Signed-off-by: William Wu <william.wu@rock-chips.com>
Originally, dwc2 just handle one clock named otg, however, it may have
two or more clock need to manage for some new SoCs, so this adds
change clk to clk's array of dwc2_hsotg to handle more clocks operation.
Change-Id: I661297ef908d9eace2215205018fa94d12cea128
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).
We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.
We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit) in chip, which does a more full
reset. The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).
It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.
Change-Id: I3120a38a7f646a9d244f04bd2dcfef7474a4a6d1
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
(am from https://mail-archive.com/linux-kernel@vger.kernel.org/msg1254059.html)
/tmp/rtl8703b_phycfg-53954c.s: Assembler messages:
/tmp/rtl8703b_phycfg-53954c.s:3071: Error: selected processor does not support `bfc w0,#4,#4'
Change-Id: I9a2cf7ea8b4da82ab6148043983ad57b68b93562
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
drivers/net/wireless/rockchip_wlan/rtl8723cs/core/rtw_debug.c:45:44: error: expansion of date or time macro is not reproducible [-Werror,-Wdate-time]
RTW_PRINT_SEL(sel, "build time: %s %s\n", __DATE__, __TIME__);
Change-Id: I07e50007edc508ec684eb421cfe5fd4378c96553
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
This is a HACK patch setting dwc3 dr-mode from otg to peripheral.
Change-Id: I4a6ba065e0369315e95f6ad251b58cc16b1c4e81
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
1 add mclk control
2 add speaker amplifier control
Change-Id: Ib3c03cd281f1ebf4d6d583076bd3930bbe3b3fe0
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
The driver does not match the dts, pmic driver is update to 4.19 kernel,
but the dts node is not update,make the vcc_ddr regulator init failed:
[ 2.126351] rk808 0-001a: chip id: 0x8160
[ 2.134083] rk808-regulator rk808-regulator: there is no dvs0 gpio
[ 2.134229] rk808-regulator rk808-regulator: there is no dvs1 gpio
[ 2.134347] DCDC_REG1: supplied by vcc_sys
[ 2.136769] DCDC_REG2: supplied by vcc_sys
[ 2.138759] DCDC_REG3: supplied by vcc_sys
[ 2.139064] vcc_ddr: no set_mode operation
[ 2.139110] rk808 0-001a: failed to register 2 regulator
[ 2.140110] rk808-regulator: probe of rk808-regulator failed with error -22
Change-Id: Ieecd8678345202db0be5ac4c669c890283793d42
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
OV13850 Camera Module used by rk3399 & rk3399pro excavator board
Change-Id: Ieb06cc519609392475db1d4f0103a89d22110fd4
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
When PCIe link broken, remove pcie dev and reprobe may repair the link,
also need to remove the dma_trx_obj
Change-Id: If0a243d7c39bef5763c22fa53d5e7a6d515412f5
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Delete SRST_PCIEPHY_POR, SRST_PCIEPHY_P, SRST_PCIEPHY_PIPE from PCIe
node, combo phy node already include these softreset
Change-Id: I7f1c739fbbb9b8c43ecb620b5d0655d0e1d221cb
Signed-off-by: Simon Xue <xxm@rock-chips.com>
rng node is compflict with crypto node, so default disable
rng node and crypto node.
Change-Id: I9a28108a5667f88c15d5cc9916d927115cdb8918
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
As the device name has been changed to devfreq(X), but user should find
devfreq driver with their parent device name, so add a new link named
with parent name.
Change-Id: I5077ddecbcc8db8d59cb6f16f2be5107b391677d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
There are several SoCs (e.g. rk3228h and rk3328) that integrated
with Inno USB3 PHY, they can't toggle CP test pattern when do
USB3 compliance test by default.
This patch add a cp_test callback for USB3 controller to enable
the special USB3 PHY to toggle the CP test pattern.
Change-Id: I2d603202723a4c044d4231af10cfe2c60ec0e988
Signed-off-by: William Wu <wulf@rock-chips.com>
1. Add support for DW PCIe controller found on RK1808 SoC platform
2. Add support PCIe udma transfer
Change-Id: Ic6d638782d1f55f965d663f73eee14bafa392740
Signed-off-by: Simon Xue <xxm@rock-chips.com>
On some platform, external MSI domain is using instead of the one
created by designware driver. For instance, if using GIC-V3-ITS
as a MSI domain, we only need set msi-map in the devicetree but
never need any bit in the designware driver to handle MSI stuff.
So skip allocating its own MSI domain for that case.
Change-Id: Ic4f5f0a1a1833c778c4e4750cb88f34a5b37a198
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Innosilicon combophy for PCIe still need different
configuration between EP and RC mode.
Change-Id: Ie1f14e63785f44d84a2b3a154990c6a54eb1156e
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
drivers/power/supply/rk818_charger.c: In function 'rk818_cg_usb_get_property':
drivers/power/supply/rk818_charger.c:448:11: warning: 'fake_offline' may be used uninitialized in this function [-Wmaybe-uninitialized]
else if (fake_offline)
^
Change-Id: I07ccf6e136d47c75db56004de1c78436e570a356
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
drivers/power/supply/rk818_battery.c: In function 'rk818_bat_calc_zero_linek':
drivers/power/supply/rk818_battery.c:1582:6: warning: 'cnt' may be used uninitialized in this function [-Wmaybe-uninitialized]
cnt++;
~~~^~
drivers/power/supply/rk818_battery.c: In function 'rk818_battery_resume':
drivers/power/supply/rk818_battery.c:3465:20: warning: 'time_step' may be used uninitialized in this function [-Wmaybe-uninitialized]
int interval_sec, time_step, pwroff_vol;
^~~~~~~~~
Change-Id: I405e7c1b3a3b567693244b40acdf8ed924331cf7
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
drivers/power/supply/rk817_battery.c: In function 'rk817_bat_pm_resume':
drivers/power/supply/rk817_battery.c:3290:34: warning: 'time_step' may be used uninitialized in this function [-Wmaybe-uninitialized]
(battery->sleep_dischrg_sec > time_step)) {
~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~
Change-Id: I5ca86f00471e467448145bcb001d17b0ed242c49
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc.c: In function 'sdioh_request_packet_chain':
drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc.c:1291:77: warning: '*((void *)&before+8)' may be used uninitialized in this function [-Wmaybe-uninitialized]
write, ttl_len, now.tv_sec-before.tv_sec, now.tv_nsec/1000-before.tv_nsec/1000));
^
drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc.c:1107:23: note: 'before' was declared here
struct timespec now, before;
^~~~~~
Change-Id: I34e1b7132ad2771932e53475788dd4f3607f0233
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
drivers/input/sensors/accel/mc3230.c: In function 'sensor_report_value':
drivers/input/sensors/accel/mc3230.c:602:4: warning: 'result' may be used uninitialized in this function [-Wmaybe-uninitialized]
x = mc3230_convert_to_int(buffer[0]) * g_value;
~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/input/sensors/accel/mc3230.c:521:6: note: 'result' was declared here
int result;
^~~~~~
Change-Id: I817bbd56a2a194388bde705cbfa350f8d33b6efa
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
drivers/thermal/rk3368_thermal.c: In function 'rk3368_thermal_get_temp':
drivers/thermal/rk3368_thermal.c:580:12: warning: 'val_cpu' may be used uninitialized in this function [-Wmaybe-uninitialized]
old_data = tsadc_data;
~~~~~~~~~^~~~~~~~~~~~
drivers/thermal/rk3368_thermal.c:529:6: note: 'val_cpu' was declared here
int val_cpu;
^~~~~~~
Change-Id: I365441507082cbbd0f7be01e5f0a09674af6230d
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
