Retain the remainder of the smoothing coefficient calculation
for use in the next iteration to ensure continuity.
Change-Id: Iea5769149a9df4d294a721e43df7c2e6583a8e4f
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>
Data overflow during fast-charging may cause the battery
percentage to freeze near full capacity.
Change-Id: I1c9d8108196c7a102e1fd251cbda86cbfbaeffe8
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>
Added automatic stage switching functionality for the TS crossflow
current source. To mitigate the impact of contact resistance and
enhance the sampling accuracy of the thermistor voltage, the current
strategy prioritizes using higher current ranges of the TS constant
current source while remaining within the ADC's sampling range. The
system now employs software-based monitoring of the thermistor's
voltage to dynamically adjust the current source's output stage.
Change-Id: I92e9165280c932b987b85530a9b6792c6b817187
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>
Incorporate calculations for negative terminal contact resistance
to minimize errors in thermistor resistance measurements, particularly
deviations in high-temperature regions caused by voltage drops across
the contact resistance.
Change-Id: Iaae24e44649a31c3f81fd4f7e96293d6d14204f3
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>
This is the 6.1.141 stable release
* tag 'v6.1.141': (3704 commits)
Linux 6.1.141
net: ethernet: ti: am65-cpsw: Lower random mac address error print to info
platform/x86: thinkpad_acpi: Ignore battery threshold change event notification
platform/x86: fujitsu-laptop: Support Lifebook S2110 hotkeys
NFS: Avoid flushing data while holding directory locks in nfs_rename()
nvme-pci: add NVME_QUIRK_NO_DEEPEST_PS quirk for SOLIDIGM P44 Pro
spi: spi-sun4i: fix early activation
um: let 'make clean' properly clean underlying SUBARCH as well
platform/x86: thinkpad_acpi: Support also NEC Lavie X1475JAS
nfs: don't share pNFS DS connections between net namespaces
HID: quirks: Add ADATA XPG alpha wireless mouse support
coredump: hand a pidfd to the usermode coredump helper
fork: use pidfd_prepare()
pid: add pidfd_prepare()
coredump: fix error handling for replace_fd()
perf/arm-cmn: Initialise cmn->cpu earlier
perf/arm-cmn: Fix REQ2/SNP2 mixup
net_sched: hfsc: Address reentrant enqueue adding class to eltree twice
arm64: dts: qcom: sm8350: Fix typo in pil_camera_mem node
af_unix: Fix uninit-value in __unix_walk_scc()
...
Change-Id: I80c048bb313ef26f13f7809a84c21cee17f220e2
Hardware suggests adjusting the 800mV voltage to 900mV.
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>
Change-Id: Ice645a47138b4905053e8bf6d1a903c616a1c719
The user can update the dimming data via "DIMMING_DATA" property, and
it will be sent to the panel supported local dimming function in the
rockchip dimming panel driver.
Change-Id: I7dba541450fce86be064d0205af0f595b1712aea
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
In order to support the loader protect function of more panel
drivers, we add the DRM panel as part of Rockchip DRM sub devices.
The panel-simple driver always is regarded as a panel driver demo of
Rockchip platforms, so we first add the Rockchip DRM sub_dev for it.
The panel drivers that adapt to Rockchip DRM drivers can call
rockchip_drm_register_sub_dev()/rockchip_drm_unregister_sub_dev() to
register/unregister DRM sub_dev, and then invoke
rockchip_drm_panel_loader_protect() to achieve the panel loader
protect function.
Change-Id: Ibc302c3f3677e0c55545e90af29d7a87444c2e21
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
In order to enhance the flexibility of loader protect callback
&rockchip_drm_sub_dev.loader_protect(), we replace the parameter
'struct drm_encoder *encoder' by 'struct rockchip_drm_sub_dev'so that
the panel or bridge drivers can apply it to achieve the loader
protect function.
Change-Id: Ic26110583245c1a0807fee35f4dd889ee8f1f845
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
In the past, the flag &rockchip_pwm_chip.oneshot_en may not represent
the accurate enabled status for oneshot mode, because the oneshot mode
should be active after setting the 'pwm_en' bit. Therefore, we add the
&rockchip_pwm_chip.oneshot_valid to represent the validity of oneshot
configurations, and &rockchip_pwm_chip.oneshot_en does what it should
do.
In addition, the disabling of oneshot mode does not need to delay one
period(related commit 42e759004f ("pwm: rockchip: add one period
delay before disabling the dclk")). It will end after the last period
sent.
What's more serious, the disabling process may be done in interrupt
handler for oneshot mode(The handler is flexible for user as designed),
so it is unreasonable to call fsleep() in the interrupt handler, which
may cause the following error with 100000ns period:
[ 6.517981] BUG: scheduling while atomic: swapper/0/0/0x00010000
[ 6.518045] Modules linked in:
[ 6.518060] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 6.1.118 #944
[ 6.518069] Hardware name: Rockchip RK3576 EVB1 V10 Board (DT)
[ 6.518078] Call trace:
[ 6.518085] dump_backtrace+0xd8/0x130
[ 6.518108] show_stack+0x1c/0x30
[ 6.518118] dump_stack_lvl+0x64/0x7c
[ 6.518132] dump_stack+0x14/0x2c
[ 6.518141] __schedule_bug+0x58/0x70
[ 6.518155] __schedule+0x6f0/0x7c0
[ 6.518164] schedule+0x54/0xe0
[ 6.518172] schedule_hrtimeout_range_clock+0xa8/0x144
[ 6.518184] schedule_hrtimeout_range+0x18/0x20
[ 6.518193] usleep_range_state+0x7c/0xb0
[ 6.518204] rockchip_pwm_enable_v4+0xc8/0x104
[ 6.518219] rockchip_pwm_apply+0x80/0x190
[ 6.518229] pwm_apply_state+0x68/0x190
[ 6.518239] rockchip_pwm_irq_v4+0x7c/0x1b0
[ 6.518250] __handle_irq_event_percpu+0x58/0x1d0
[ 6.518265] handle_irq_event+0x4c/0x110
[ 6.518276] handle_fasteoi_irq+0xc0/0x24c
[ 6.518290] generic_handle_domain_irq+0x30/0x44
[ 6.518302] gic_handle_irq+0x60/0x90
[ 6.518312] call_on_irq_stack+0x24/0x34
[ 6.518323] do_interrupt_handler+0x80/0x94
[ 6.518333] el1_interrupt+0x44/0xa0
[ 6.518345] el1h_64_irq_handler+0x14/0x20
[ 6.518357] el1h_64_irq+0x74/0x78
[ 6.518366] cpuidle_enter_state+0xbc/0x434
[ 6.518382] cpuidle_enter+0x3c/0x50
[ 6.518393] do_idle+0x228/0x2b0
[ 6.518405] cpu_startup_entry+0x38/0x40
[ 6.518416] kernel_init+0x0/0x12c
[ 6.518425] arch_post_acpi_subsys_init+0x0/0x18
[ 6.518439] start_kernel+0x6b0/0x6ec
[ 6.518450] __primary_switched+0xb4/0xbc
This patch will also help to avoid the above abnormal situation.
Change-Id: I0df715921d79803f06329a71b966a4ae40876f33
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Fixes: 42e759004f ("pwm: rockchip: add one period delay before disabling the dclk")
Change-Id: I612fde2adf60940e17146a115a104caf302109b2
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Disable async probe if CONFIG_TOUCHSCREEN_HYN is enabled, since the EVB
requires sequential probing of both gt1x and hyn touchscreen drivers.
Type: Function
Redmine ID: #N/A
Associated modifications: N/A
Test: N/A
Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com>
Change-Id: I4610e82d478aa328c0459bec8e9ce270644e3a1b
When uboot logo is enabled, we think it has completed the link training
in the uboot stage. so the cr done and eq done flag should be config.
And the retraining will not be filter.
Change-Id: Ibb68c3c6f42837568143f856c9f68fb8f882969a
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
In some case, the color depth will be 8bit when output
hdr content. So it need limit coor depth as 8bit for
hdr.
Change-Id: I7415230d4e0c4c08097ea5912aff791875db6176
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
The cif/isp depend on iommu, it's appropriate to set the one grader lower level.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ie25e1ecafffff342b2a726cdc770ea6a90c10736
The csi2-dphy depends on csi2-dphy-hw, assign different levels to them.
No need to pay attention to INITCALL_ASYNC.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ieda3c7737c4e07af3d9664ceee8868ba55dbefbe
