If sensor linked to rk1608, driver will use
sensor fmt/interval/fps and timing information.
Signed-off-by: Sach Lin <sach.lin@rock-chips.com>
Change-Id: Ie004e1fb7970c15254f3e7c866f367dccfa9dec3
When a extend clk is used before enter kernel, it need set the vp
mask to mark that it have been used by a video port
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ie6f0419621e8b250adca1783355318d4a9a2412d
* Add SRAM memory allocation and manager support
* Improve job submit stability
* Add reset and mm node for debugging
Signed-off-by: Felix Zeng <felix.zeng@rock-chips.com>
Change-Id: I893e732baf54ba59ace8139964cee6985a0e3b34
Fix the following smatch warnings:
drivers/media/platform/rockchip/cif/dev.c:610 rkcif_write_register() warn: we tested 'index' before and it was 'true'
drivers/media/platform/rockchip/cif/dev.c:638 rkcif_write_register_or() warn: we tested 'index' before and it was 'true'
drivers/media/platform/rockchip/cif/dev.c:669 rkcif_write_register_and() warn: we tested 'index' before and it was 'true'
drivers/media/platform/rockchip/cif/dev.c:700 rkcif_read_register() warn: we tested 'index' before and it was 'true'
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I03baf193ffb51e2c23d3e115dbc44cc564e57dca
The %.s object generate by -fverbose-asm default,
now we can enable -fno-verbose-asm by c_flags.
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I40a832b4704740dd2a5199514528bb2d8f6db45e
In actual test, the min hsync value is 9, So it just need filter
the display mode whose hsync value is less than 9.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I06bc52c1f8b45894ee9813c8d014e6a9e3f48df6
The xHCI specification 1.1 does not require xHCI-compliant
controllers to always enable hardware USB2 LPM. However,
the current xHCI driver always enable it when seeing HLC=1.
On rk3566 platforms, the xHCI USB2 LPM is enabled by default.
And we found that a lot of USB Disks have USB2 HW LPM broken
issue when connected to rk3566 USB2 OTG interface.
Here are a part of special USB Disks with USB2 HW LPM broken:
1. idVendor=325d, idProduct=6410, Manufacturer: aigo
2. idVendor=21c4, idProduct=0cd1, Manufacturer: Lexar
3. idVendor=0951, idProduct=1666, Manufacturer: Kingston
When use dd command to write to these USB Disks, it may fail
with the following log:
[ 2844.700148] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
[ 2889.072272] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
[ 2921.498045] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
......
[ 2953.923773] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
Theoretically, we can add USB_QUIRK_NO_LPM individually for
these special USB Disks, however, it's diffcult to cover all
USB Disks. So it's better to disable the USB2 LPM for xHCI
on rk3566 platforms.
Change-Id: I2c180b68f41a4d25a4c860c32550f3a406eb2028
Signed-off-by: William Wu <william.wu@rock-chips.com>
The xHCI specification 1.1 does not require xHCI-compliant
controllers to always enable hardware USB2 LPM. However,
the current xHCI driver always enable it when seeing HLC=1.
On rv1106 platforms, the xHCI USB2 LPM is enabled by default.
And we found that a lot of USB Disks have USB2 HW LPM broken
issue when connected to rv1106 USB2 OTG interface.
Here are a part of special USB Disks with USB2 HW LPM broken:
1. idVendor=325d, idProduct=6410, Manufacturer: aigo
2. idVendor=21c4, idProduct=0cd1, Manufacturer: Lexar
3. idVendor=0951, idProduct=1666, Manufacturer: Kingston
When use dd command to write to these USB Disks, it may fail
with the following log:
[ 2844.700148] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
[ 2889.072272] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
[ 2921.498045] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
......
[ 2953.923773] usb 7-1: reset high-speed USB device number 4 using xhci-hcd
Theoretically, we can add USB_QUIRK_NO_LPM individually for
these special USB Disks, however, it's diffcult to cover all
USB Disks. So it's better to disable the USB2 LPM for xHCI
on rv1106 platforms.
Change-Id: Ie058b65b963ce9a8aa72ae1a55a38f0c78d3a095
Signed-off-by: William Wu <william.wu@rock-chips.com>
If wl2868c power off in suspend, then the registers
will be reset, so we need to restored them after resume.
Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: Id7170a27f18fd9a640df358e0b13244036121d9f
In common case, the 500MHz vop aclk rate can satisfy the vop request.
For some high pixel clock case(8K@60Hz, 4K@120Hz, etc),the vop aclk
should enhance to 800MHz to avoid abnormal display issue.
When display a high pxel clock timing from bootloader to kernel, the
bootloader will set the vop aclk rate to 800MHz. The vop driver in
kernel will also set the vop aclk rate to 800MHz. But the clock driver
will set the vop aclk rate to 800MHz before the vop driver. The vop
aclk rate will change as: 800MHz->500MHz->800MHz, which will cause
a flicker.
To fix this issue, remove the vop aclk rate assign in clock controller
node, and define it in vop node.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I785fe464bba79bb2bcd63a8588d847edecef5a17
The hsync of some timings maybe bigger than 300.
If get hsync error, it could be very large, so we
think that is error if it's bigger than 500.
Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: I57e8b462c3a224ba402d8ab1c20fd2c4c0f77a2c
Update all 64bit rockchip devicetree files to use SPDX-License-Identifiers.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Ie983cca0d54cae8b5ad6d322d51eb7bbd265aa0a
HDMIRX and HDMITX cec cannot enable at the same time.
Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: I825c552a57dd795d358108f95a1dc24391aa3f93
