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Author SHA1 Message Date
xxx
ddcdb8e5f8 rk3368-p9_818.dts: add suspend config 2015-08-17 17:34:38 +08:00
zxl
a51137cdc7 RK3368 GPU version: Rogue L 0.22 
merge 1.4_ED3632227 DDK code.
 2015-08-17 14:12:00 +08:00
Zheng Yang
3ff30ce4d2 hdmi:cec: delete maroc DEBUG definaion. 
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-08-14 13:59:13 +08:00
Zheng Yang
4107ab806e hdmi:fix edid parse 4096x2160@24Hz error. 
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-08-14 13:57:29 +08:00
chenzhen
1075a28e36 rk3288_mali_t760_driver_r6p0-02rel0_13_x@0 2015-08-12 17:56:34 +08:00
David Wu
593f6699e6 rk-keys: make input registered before key isr and key timer. 
fix get pdata NULL pointer error.

Signed-off-by: David Wu <wdc@rock-chips.com>
 2015-08-12 02:50:46 +08:00
Tang Yun ping
5f41543edd RK3368 DDR: fix HDMI display abnormal when ddr change freq 
add parameter of lcdc type for mcu to fix HDMI display abnormal when do ddr
change freq. it must update bl30 to rk3368bl30_v2.09.bin at the same time.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2015-08-12 10:15:59 +08:00
Zheng Yang
16a94e1eef hdmi:cec: Define cec send frame return value. 
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-08-12 09:35:53 +08:00
Zheng Yang
06809f0306 hdmi:cec:update driver to match android HDMI CEC HAL. 
Android 5.x introduce HDMI CEC, so we need to porting
cec hal and driver to make it work.

Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-08-12 09:10:54 +08:00
Alpha Lin
b2d4b94875 RK312x, VPU: add Reset resource. 
support vpu combo cru reset for rk312x.

Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
 2015-08-11 16:13:14 +08:00
Alpha Lin
7f242a51f6 VCODEC: detect hevc resolution to determine the running frequency. 
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
 2015-08-11 16:13:14 +08:00
Mark Yao
2a5ef267a1 rk32: lvds/rgb: fix rgb output when have no lvds_format 
If we don't add lvds_format on the display timing, the lvds_format
value may be -1, means 0xffffffff when do register write, that is
wrong and display not works.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
 2015-08-10 16:25:45 +08:00
Xiao Feng
4087b86c47 dvfs: rockchip: add pvtm_get_temp for pvtm_set_dvfs_table 
Signed-off-by: Xiao Feng <xf@rock-chips.com>
 2015-08-07 21:03:58 +08:00
chenzhen
71d4fbd8cc rk3288_mali_t760_driver_r6p0-02rel0_12_x@0 2015-08-05 17:55:59 +08:00
Xiao Feng
607b4fdb2c dvfs: rockchip: arm pvtm add RK3368_PROCESS_V0 
Signed-off-by: Xiao Feng <xf@rock-chips.com>
 2015-08-05 15:53:03 +08:00
Xiao Feng
d004fdb461 arm64: rockchip: rk3368: tb-dts: add arm pvtm support 
Signed-off-by: Xiao Feng <xf@rock-chips.com>
 2015-08-05 15:52:12 +08:00
David Wu
cbd8dcfb90 rk3368: tsadc: set saradc_clk cycle to mcu 
Signed-off-by: David Wu <wdc@rock-chips.com>
 2015-08-04 18:46:20 +08:00
David Wu
e1ca460462 rk3368: scpi: add interface set cycle for tsadc 
Signed-off-by: David Wu <wdc@rock-chips.com>
 2015-08-04 18:46:20 +08:00
Zheng Yang
af460bd8b0 hdmi:rk3288/rk3368: Reset tmdsclk after configure frame composer regiseter. 
It is required to perform a reset tmdsclk action on one of the frame composer
registers changed. Or transport video and audio sample may mistake.

Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-08-04 18:07:54 +08:00
Xiao Feng
b10cb514cc arm64: rockchip: rk3368: dts: modify the regulator-name of rk818_ldo2 
Signed-off-by: Xiao Feng <xf@rock-chips.com>
 2015-08-03 17:50:59 +08:00
chenzhen
9dbd05314c rk312x, mali_400_driver : modify build_log, upgrade rk_ko_ver to 4. 2015-08-03 13:52:19 +08:00
chenzhen
57d64268ab rk312x, mali_400_driver : fix bug that gpu_clk could not jump to he highest level. 2015-08-03 13:52:11 +08:00
huang zhibao
083dcbe0f5 dts: set wifi type and enable pwm1 in rk3288-p977_8846.dts 
Signed-off-by: huang zhibao <hzb@rock-chips.com>
 2015-07-31 17:55:56 +08:00
Zheng Yang
fcad39d771 hdmi:rk3036/rk3128: support 3D type Frame packing. 
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-30 16:53:26 +08:00
Zheng Yang
97b1b43aa1 hdmi: reconfigure audio when enable/disable 3D Frame packing mode. 
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-30 10:56:21 +08:00
Zheng Yang
96b23c94c6 hdmi:rk3288/rk3368: support 3D type Frame packing. 
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-30 10:43:04 +08:00
dalon.zhang
7c72e159ab camsys_drv: v0.0x21.0 2015-07-29 15:49:34 +08:00
Jianhong Chen
3f8d8450e1 dts: rk3368-p9: battery add and enable power_dc2otg 
enable: otg device get power from dc adapter

Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
Signed-off-by: xushengfei <xsf@rock-chips.com>
 2015-07-27 17:27:20 +08:00
Jianhong Chen
5f976d7e3f power: rk81x-battery: support otg device get power from dc 
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
Signed-off-by: xushengfei <xsf@rock-chips.com>
 2015-07-27 17:27:20 +08:00
Jianhong Chen
5ca10b99df power: rk81x-battery: fix power on sec base error 
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
Signed-off-by: xushengfei <xsf@rock-chips.com>
 2015-07-27 17:27:20 +08:00
Xiao Feng
8529d554c3 dvfs: rockchip: print error when clk is disable 
Signed-off-by: Xiao Feng <xf@rock-chips.com>
 2015-07-27 14:55:11 +08:00
Sugar Zhang
26ea8b87f0 ASoC: rockchip: i2s: add pcm transfer mode support. 
usage: add i2s dts property "rockchip,xfer-mode"

rockchip,xfer-mode = <0>: i2s transfer mode.
rockchip,xfer-mode = <1>: pcm transfer mode.

if not define, use i2s transfer mode default.
pcm transfer mode is usually used for bt/modem voice.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
 2015-07-24 18:04:31 +08:00
Zheng Yang
b245ea6eb5 hdmi:rk3288:enable supporting 10bit output. 
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-24 16:31:28 +08:00
Zheng Yang
f5118000d9 hdmi:use 30bit lcdc interface when output 10bit mode. 
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-24 16:30:44 +08:00
hjc
0850cb04bd rk fb: add YUV420 10bit output mode for next soc 
Signed-off-by: hjc <hjc@rock-chips.com>
 2015-07-24 15:27:28 +08:00
Zheng Yang
71a461a764 hdmi: hdmi_submit_work function support synchronous operation. 
If hdmi_submit_work work in synchronous mode, the malloced delayed_work
is free by caller, not by hdmi_work_queue, to prevent delayed_work is
free before flush_delayed_work fucntion is executed.

Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-24 11:05:37 +08:00
Zheng Yang
cdb8423130 dts:arm:rk3288-box: ddr frequency set to 533 when playing 4K video. 
If we playing 4K60Hz video, and there are more than two ui layer which
is continuously refreshing, bandwith will be not enougth under ddr 456MHz.

Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-23 17:04:57 +08:00
Zheng Yang
80424e04b3 hdmi:rk3288/rk3368: enable PHY SVSRET mode while in power-down mode. 
While in power-down mode, the HDMI Tx PHY can be additionally set in
a lower mode of consumption by enabling the SVSRET mode, achieved by
asserting the SVSRET_MODEZ signal low.

Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-23 09:21:03 +08:00
Zheng Yang
b93429044a hdmi:rk3288/rk3368: set controller register in uboot logo mode. 
EDID data readed in uboot and kernel may be different, and hdmi
output color mode is different in uboot and kernel: uboot output
RGB when EDID is wrong and kernel output YCbCr with right EDID.
But avi infomation and controller register is not set in kernel,
so the picture is wrong. Now fix this bug.

Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-23 09:05:37 +08:00
zhangqing
c16809fe47 rk3288: clk: support clk_ddr round rate. 
support clk_ddr round and set rate.
slove the develop-3.10-next merge missing some function.

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
 2015-07-21 09:33:11 -07:00
Shengqin.Zhang
7b57aa1ef9 fix rga_ioctl return error 
Signed-off-by: Shengqin.Zhang <zsq@rock-chips.com>
 2015-07-21 14:44:46 +08:00
Zheng Yang
54ee81fa6d hdmi: use dps->lock replace of hdmi->lock. 
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-20 14:52:13 +08:00
linwei
27a0c1c3be EDP:RK3288: add debugfs node for psr function. 
enter the drectory:debugfs/edp.
    command as follows:
    echo 0 > psr : disable psr
    echo 1 > psr : config and enable psr
    echo 2 > psr : sink get in  psr inactive
    echo 3 > psr : sink get in  psr state2
    echo 4 > psr : sink get in  psr state3
    echo 5 > psr : open phy 4 lanes
    echo 6 > psr : close phy 4 lanes
Signed-off-by: linwei <buluo.lin@rock-chips.com>
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-20 11:35:49 +08:00
Mark Yao
0aa5740609 rk_fb: rk3288: fix win2 disable iommu crash. 2015-07-17 16:03:21 +08:00
dalon.zhang
809bc041c8 uvc: support the query of iommu_enabled 2015-07-17 15:46:35 +08:00
hwg
ff8dfccbb0 bcmdhd wifi: support ap6356 nvram auto recognize 2015-07-16 20:32:53 +08:00
Zheng Yang
6a9f5a9abe eDP:rk3288:ignore grf probe error when probe. 
rockhip,grf node is not exist on rk3288,  we
need to ignore grf probe error.

Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-16 17:45:14 +08:00
linwei
858c057af9 eDP:RK3288 check format for rk32_dp.c rk32_dp.h 
Signed-off-by: linwei <buluo.lin@rock-chips.com>
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
 2015-07-16 12:41:44 +08:00
zhangqing
4a8a2ed2a7 rk3288: clk: slove make warning for clk-ops.c 
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
 2015-07-16 04:49:42 -07:00
zhangqing
e6240182f3 rk3288: clk: support clk_vop set 594M. 
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
 2015-07-16 04:11:36 -07:00