Commit Graph

1274595 Commits

Author SHA1 Message Date
Tao Huang
df0794fc58 spi: rockchip-flexbus-spi: Fix build warning for !PM_SLEEP
drivers/spi/spi-rockchip-flexbus-spi.c:367:12: error: 'rk_flexbus_spi_resume' defined but not used [-Werror=unused-function]

Change-Id: I1a8cf00bc51260501847f9797001bf4e10243240
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-10-16 19:50:13 +08:00
Algea Cao
bf1992513c drm/rockchip: Fix post csc rgb2rgb matrix
Fixes: 9ce43aae96 ("drm/rockchip: fix some csc parameters error")

Change-Id: I2baaff2c3f9acda2e48c8c6a1cc9cfae1ed232b4
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-10-16 19:48:05 +08:00
Elaine Zhang
42f75109e5 arm64: dts: rockchip: add can nodes for rk3562
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I5cf2df3256e6d3140017766feeacc212930b0f97
2024-10-16 17:47:20 +08:00
Elaine Zhang
ee262b3382 net: can: rockchip: add rk3562 can driver
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Ib65f067992701eb73608cc2964b4fc62d792d3f7
2024-10-16 17:47:20 +08:00
Tao Huang
72bf53173b input: touchscreen: parade: Fix build error for !PM_SLEEP
drivers/input/touchscreen/parade/pt_core.c:10591:28: error: 'pt_core_rt_suspend' undeclared here (not in a function)
drivers/input/touchscreen/parade/pt_core.c:10591:48: error: 'pt_core_rt_resume' undeclared here (not in a function)
drivers/input/touchscreen/parade/pt_core.c:17046:28: error: 'pt_core_ebc_resume' undeclared (first use in this function)
drivers/input/touchscreen/parade/pt_core.c:17047:29: error: 'pt_core_ebc_suspend' undeclared (first use in this function); did you mean 'pt_early_suspend'?

Change-Id: Id9594b26941f80d16d13195cf0d8c0e9d5187f9b
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-10-16 11:38:37 +08:00
Tao Huang
0dc19d1b5f input: touchscreen: ft5726: Fix build warning for !PM_SLEEP
drivers/input/touchscreen/focaltech_touch_ft5726/focaltech_core.c:2096:12: error: 'fts_core_pm_resume' defined but not used [-Werror=unused-function]
drivers/input/touchscreen/focaltech_touch_ft5726/focaltech_core.c:2081:12: error: 'fts_core_pm_suspend' defined but not used [-Werror=unused-function]

Change-Id: Iad119c9a603205e7fd393e28a5c4aff512f57603
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-10-16 11:38:33 +08:00
Tao Huang
d93b6deaf2 input: touchscreen: cyttsp5: Fix build error for !PM_SLEEP
drivers/input/touchscreen/cyttsp5/cyttsp5_core.c:6212:28: error: 'cyttsp5_core_late_resume' undeclared (first use in this function); did you mean 'cyttsp5_core_rt_resume'?
drivers/input/touchscreen/cyttsp5/cyttsp5_core.c:6213:29: error: 'cyttsp5_core_early_suspend' undeclared (first use in this function); did you mean 'cyttsp5_core_rt_suspend'?

Change-Id: I820b2bd29f8e3db7c7e8b4af81943b5a6d879a47
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-10-16 11:38:29 +08:00
Tao Huang
e6a2a95fb8 drm/rockchip: dw-dp: Fix build warning for !PM_SLEEP
drivers/gpu/drm/rockchip/dw-dp.c:5980:12: error: 'dw_dp_resume' defined but not used [-Werror=unused-function]
drivers/gpu/drm/rockchip/dw-dp.c:5970:12: error: 'dw_dp_suspend' defined but not used [-Werror=unused-function]
drivers/gpu/drm/rockchip/dw-dp.c:5959:12: error: 'dw_dp_resume_noirq' defined but not used [-Werror=unused-function]
drivers/gpu/drm/rockchip/dw-dp.c:5948:12: error: 'dw_dp_suspend_noirq' defined but not used [-Werror=unused-function]

Change-Id: Id49b85c3aaee3da324753b089f5c9617cc581113
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-10-16 11:38:19 +08:00
Tao Huang
443adc0c67 drm/rockchip: dw_hdmi: Fix build warning for !PM_SLEEP
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c:4592:12: error: 'dw_hdmi_rockchip_resume' defined but not used [-Werror=unused-function]
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c:4574:12: error: 'dw_hdmi_rockchip_suspend' defined but not used [-Werror=unused-function]

Change-Id: I664da3e2e0df5991aa7f8ffe20487a04dded9e82
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-10-16 11:38:07 +08:00
Tao Huang
41fd8bec7d mmc: sdhci-of-dwcmshc: Fix build warning for !PM_SLEEP
drivers/mmc/host/sdhci-of-dwcmshc.c:1115:28: error: 'dwcmshc_runtime_suspend' undeclared here (not in a function); did you mean 'pm_runtime_suspend'?
drivers/mmc/host/sdhci-of-dwcmshc.c:1115:53: error: 'dwcmshc_runtime_resume' undeclared here (not in a function); did you mean 'pm_runtime_resume'?

Change-Id: Icb0b18860e3c0bda2a22645cf98bf4bfbbade426
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-10-16 11:37:48 +08:00
Tao Huang
10226e07a5 power: supply: rk817_battery: Fix build warning for !PM_SLEEP
drivers/power/supply/rk817_battery.c:630:13: error: 'rk817_bat_resume_work' used but never defined [-Werror]
drivers/power/supply/rk817_battery.c:3090:17: error: 'rk817_get_rtc_sec' defined but not used [-Werror=unused-function]

Change-Id: Ief6fdc006d8489e6452de762c1f8be989ecd45d1
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-10-16 11:37:30 +08:00
Tao Huang
f3f27d30ba soc: rockchip: pm_config: ROCKCHIP_SUSPEND_MODE depends on SUSPEND
Fixes the following warning when !SUSPEND:
drivers/soc/rockchip/rockchip_pm_config.c:258:34: error: use of undeclared identifier 'mem_sleep_current'
drivers/soc/rockchip/rockchip_pm_config.c:551:34: error: use of undeclared identifier 'mem_sleep_current'

Change-Id: I9c6c215094444937d58fc877d8841669b54ee63d
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-10-16 11:37:10 +08:00
Algea Cao
6843b32862 drm/bridge: synopsys: dw-hdmi-qp: Get max ffe level from dts
RK3588/RK3576 support max ffe level up to 3, but some TVS
such as samsung Q700T only support level 0. The max ffe
level is optional according to the hdmi specification.
Therefore, the default max ffe level is set to 0 and can
be configured via dts.

Change-Id: I94d56559c2fe38f8dade63c24c7bcdd13a9aefc9
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-10-15 19:34:01 +08:00
Zhen Chen
67ecb97a3b MALI: bifrost: Enlarge csffw_gpu_metrics_buf to 32 pages
To eliminate the following err log when running test_offscreen_glmark2.sh on the 3588 Linux device:
[  157.846768] mali fb000000.gpu: Invalid activity state transition. (prev_act = 1, cur_act = 1)

This change originally comes from ARM's suggested modifications_from_SP_241012.

Change-Id: I5f70d9deaca76cd14dda073160f2836c6dc83c47
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2024-10-15 19:31:53 +08:00
Chris Zhong
1428e6bc5a ARM: configs: add rk3502-robot.config
Base on rk3506_defconfig, the rk3502-robot.config difference are
- remove display/ethernet
- add media/v4l2 subsystem and gc2145 sensor
- enable zram swap
- remove no-in-use configs to shrink Image size, about 4.4MB

The other rk3502 boards can use rk3506_defconfig and it's fragments.

Change-Id: I3517aec9c5c4f5368724e648615a5553cc7ac19b
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
2024-10-15 17:59:11 +08:00
Xu Xuehui
ffbb4c027a net: phy: motorcomm: YT8011AN VDDIO voltage init from DTS
motorcomm 8011AN PHY is not capable of automatically detecting
the VDDIO voltage; therefore, it necessitates initialization
configurations that correspond to actual VDDIO voltage levels.

vddio property designates the PHY's IO voltage.

If the vddio property is not specified in the DTS,
the default 3V3 IO hardware initialization settings will be applied.

Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
Change-Id: Iea056f30d8ad47e5970101b4543cfda6f5c843a9
2024-10-15 17:07:26 +08:00
Xu Xuehui
2351410fd8 arm64: dts: rockchip: rk3588-vehicle-evb-v23: change phy property name
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
Change-Id: I63a43b26afffb59f552e93ab46a90c9e9a53db4f
2024-10-15 16:39:01 +08:00
Shawn Lin
10cf4c97fd PCI: dw: rockchip: Fix rk_pcie_init_dma_trx
If dma_object is not used, NULL pointer dereference was found.

Fixes: 52729bfaff ("PCI: rockchip: dw: Move dma_obj initialization into rk_pcie_init_dma_trx()")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I5fe8ec539af1188b5da806026f164a493a577c46
2024-10-15 09:37:26 +08:00
Shawn Lin
5ef6efa7e5 mmc: sdhci-of-dwcmshc: Fix unblanced runtime calls
echo 2a330000.mmc > /sys/bus/platform/drivers/sdhci-dwcmshc/unbind
echo 2a330000.mmc > /sys/bus/platform/drivers/sdhci-dwcmshc/bind

[  386.150651] mmc2: CQHCI version 5.10
[  386.183313] mmc2: SDHCI controller on 2a330000.mmc [2a330000.mmc] using ADMA 64-bit
[  386.183385] sdhci-dwcmshc 2a330000.mmc: Unbalanced pm_runtime_enable!

Change-Id: I8926029274656f5f9820658325edec0449c8ac5f
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2024-10-14 18:55:24 +08:00
Zhibin Huang
04db30fe21 misc: rk628: rgb/bt1120: modify decoder dclk delay
The original configuration will lead to some screen display screen offset,
adjust the dclk delay again to make the compatibility higher

Type: Fix
Redmine ID: N/A
Associated modifications: N/A
Test: N/A

Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com>
Change-Id: I732556b429b49418123fd889b67e26885e9b25f8
2024-10-14 18:55:07 +08:00
Yandong Lin
0308f07933 video: rockchip: mpp: iep2: fix err log false print
Change-Id: I032a7a038839b6b5ff83d79f5880955608f90a62
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
2024-10-14 18:54:50 +08:00
Chris Zhong
5aca25fd6f ARM: dts: rockchip: add evb1 dts for rk3502
Change-Id: Ib1b2d3be3914960c5e17d0195cf67be696074755
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
2024-10-14 18:21:51 +08:00
Huibin Hong
e208817780 ARM: dts: rockchip: add dtsi for rk3502
Change-Id: Icf8d08d7154ec21d4a0852aed7fe99826fd3091f
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2024-10-14 16:05:59 +08:00
Tao Huang
838172a6b2 ARM: keep .vectors on CONFIG_LD_DEAD_CODE_DATA_ELIMINATION
When CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y and
CONFIG_VMAP_STACK=n, .vectors sections will disappear.
Use KEEP to keep.

Fixes: cf50c9c2e4 ("BACKPORT: ARM: 9404/1: arm32: enable HAVE_LD_DEAD_CODE_DATA_ELIMINATION")
Link: https://lore.kernel.org/all/20240307151231.654025-1-liuyuntao12@huawei.com/
Change-Id: I6c7e90a3e035980e6cdbd7b830fbd30abea5b157
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-10-14 14:55:10 +08:00
Shawn Lin
53ee20ccf2 scsi: ufs: rockchip: Fix compile error if not define CONFIG_PM
Change-Id: Ic2c6dc5fed2aa8daca375eb8884ec809c0e89193
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2024-10-14 11:16:25 +08:00
Finley Xiao
29918d51d6 clk: rockchip: rk3506: Add ROCKCHIP_PLL_ALLOW_POWER_DOWN flag for v1pll
Change-Id: Ieb991acf5497aefd4ad041f415bd27f19af4b10d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2024-10-12 14:27:00 +08:00
Finley Xiao
c4c905472f clk: rockchip: rk3506: Add 750MHz for cpu
Change-Id: Id0b93c64aa51376bf16ea5604f356a7509e337d0
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2024-10-12 14:27:00 +08:00
Algea Cao
36f4f47e78 drm/bridge: synopsys: dw-hdmi-qp: Fixed ddc write heap corruption
Change-Id: Ief41e4e71be8ccc0cb5cb4f9b1e7d0a496a60704
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-10-12 14:26:41 +08:00
Damon Ding
9e3dd92878 drm/rockchip: vop2: enable rb swap for MEDIA_BUS_FMT_BGR888_1X24
It is needed to enable rb swap to support MEDIA_BUS_FMT_BGR888_1X24,
because the default 24bpp rgb output is MEDIA_BUS_FMT_RGB888_1X24.

Change-Id: Ifb55f0e97f3a914b9f66b6de49e85697fdc7aeae
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2024-10-11 16:50:57 +08:00
Damon Ding
c715781b9e drm/rockchip: vop: set dclk inverted by default for bt1120/bt656/rgb on rk3506
According to rk3506 SI report, dclk of bt1120/bt656/rgb need to
be inverted by default, in order to ensure that the data is sampled
along the rising edge.

Change-Id: I734f146b5cb33ac6f7f069509a8bb16adefe12d4
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2024-10-11 16:50:25 +08:00
Algea Cao
7244492f8f drm/rockchip: vop2: Support enable both hdr and dci
When enable dci, dci output color format is yuv full
range. So plane csc input is full range.
If hdr is enable plane overlay is rgb so post-csc
input is full range.

Change-Id: I7f98f48ff1ce129aecefb03c587d629b4aca1a0d
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-10-11 14:44:30 +08:00
Binyuan Lan
d888a2b066 arm64: dts: rockchip: add Tablet Board devicetree for RK3576S SoC
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
Change-Id: I3c7edd40253df8629f12ce93e8f014bc0cd0807c
2024-10-11 09:10:58 +08:00
Cody Xie
3175f92f5e arm64: dts: rockchip: rk3588-vehicle-evb-v23: Modify the vehicle-dummy to fit the new hardware.
Change-Id: I89497a0c5fe715e12e2917d54a8546e7d9383e36
Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
2024-10-10 16:33:12 +08:00
Yandong Lin
42ce77d846 video: rockchip: mpp: fix enc crash when reset
rootcause:
Access NULL rkvenc_ccu in some no ccu platform.

[ 1591.262830][ T105] CPU: 2 PID: 105 Comm: mpp_worker_1 Tainted: G OE 6.1.90-android14-11-g0a5333c8b527-ab12287675 #1
[ 1591.264400][ T105] Hardware name: Rockchip RK3562 EVB2 DDR4 V10 Board (DT)
[ 1591.265037][ T105] pstate: 604000c5 (nZCv daIF +PAN UAO -TCO -DIT -SSBS BTYPE=-)
[ 1591.265732][ T105] pc : _raw_spin_lock_irqsave+0x80/0xb0
[ 1591.266299][ T105] lr : rkvenc_reset+0x17c/0x3bc [rk_vcodec]
[ 1591.267258][ T105] sp : ffffffc00a96bc50
[ 1591.267629][ T105] x29: ffffffc00a96bc50 x28: 0000000000000000 x27: ffffffc001b89000
[ 1591.268366][ T105] x26: 0000000000000100 x25: ffffffc001b89000 x24: ffffffc001baafb0
[ 1591.269085][ T105] x23: 0000000000000000 x22: ffffff800b436c40 x21: ffffffc001b89000
[ 1591.269795][ T105] x20: 000000000000002c x19: 0000000000000000 x18: ffffffc00a88d040
[ 1591.270511][ T105] x17: 00000000a488ebfc x16: 00000000a488ebfc x15: 0000000000000004
[ 1591.271230][ T105] x14: ffffffc009fefd88 x13: 00000000000890f2 x12: 0000000029aaaaab
[ 1591.271951][ T105] x11: 0000000000000000 x10: 0000000000000001 x9 : 0000000000000000
[ 1591.272669][ T105] x8 : 0000000000000050 x7 : 205b5d3830333431 x6 : 322e31393531205b
[ 1591.273395][ T105] x5 : 0000000000000024 x4 : 0000000000000000 x3 : ffffffc0088f9b58
[ 1591.274116][ T105] x2 : ffffffc00a6a1128 x1 : 0000000000000000 x0 : 0000000000000050
[ 1591.274837][ T105] Call trace:
[ 1591.275147][ T105] _raw_spin_lock_irqsave+0x80/0xb0
[ 1591.275794][ T105] rkvenc_reset+0x17c/0x3bc [rk_vcodec]
[ 1591.280105][ T105] mpp_dev_reset+0x120/0x19c [rk_vcodec]
[ 1591.280811][ T105] mpp_task_finish+0x84/0x1c4 [rk_vcodec]
[ 1591.281461][ T105] rkvenc_isr+0xdc/0x2c0 [rk_vcodec]
[ 1591.282112][ T105] mpp_task_worker_default+0x128/0x5bc [rk_vcodec]
[ 1591.282945][ T105] kthread_worker_fn+0x10c/0x244
[ 1591.283472][ T105] kthread+0x104/0x1d4
[ 1591.283886][ T105] ret_from_fork+0x10/0x20
[ 1591.284319][ T105] Code: d65f03c0 aa1f03e9 5280002a f9800111 (885ffd01)
[ 1591.284950][ T105] ---[ end trace 0000000000000000 ]---

Change-Id: Ia8c5c66c1e07a3181210e7428889f6428c33f546
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
2024-10-10 16:31:22 +08:00
Luo Wei
c1558a5266 arm64: dts: rockchip: rk3576-vehicle-evb: close usb auto suspend
Change-Id: I843d64f4f412872b34d722e55547af6ca46e8854
Signed-off-by: Luo Wei <lw@rock-chips.com>
2024-10-10 16:29:04 +08:00
Weixin Zhou
c8065b1f95 arm64: dts: rockchip: add rockchip,s2r-perst-inactive-ms for rk3576-ebook
In the case of devices like Wi-Fi keep on during the sleep, need to
speed up the PCIe wake-up speed when exiting the lite mode sleep avoid
input event drop.

Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: I91fc2f9cc79bef0f9ee28b9ed929bfbc19e8a5fd
2024-10-10 09:52:22 +08:00
Jon Lin
d8b65faa22 PCI: dw: rockchip: Modify the initialization timing of phy
1.controller aasert
2.phy initial
3.controller deassert for fully release
4.wait for phy lock

Change-Id: Id7d760825936ecf1c721aa18735e49f644150341
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-10-09 19:37:39 +08:00
Jon Lin
9b20bd8277 phy: rockchip-snps-pcie3: Support phy_calibrate
Change-Id: I603890244c9dda646bad5879dc50d418fe9f1571
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-10-09 19:37:32 +08:00
Cai YiWei
efc5c4ca8f media: rockchip: isp: fix buf config for isp20 and isp21
Change-Id: Ide1a32188009c4506f47648fc00f6430178851d6
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2024-10-09 16:07:45 +08:00
Shawn Lin
0dd32e1030 PCI: rockchip: dw: Add rockchip,s2r-perst-inactive-ms support
This property is designed for devices like Wi-Fi which keep power
on and keep #PERST low during sleep. So there is no need to wait
long perst inactive time when doing resume.

Add rockchip,s2r-perst-inactive-ms for developers to assign any
value they need.

Change-Id: I373e4b2078958bbadfbc6451b02a93d5a0e60f3c
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2024-10-09 11:40:10 +08:00
Jon Lin
eded448552 ARM: dts: rockchip: rk3506: Add flexbus_spi
Change-Id: I2085b14d94f1dd22f4cc0cf59455c4fcf242e5b1
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-10-09 11:37:38 +08:00
Sandy Huang
fd59bc9095 drm/rockchip: vop2: move win phy id define to rockchip_vop.h
The win phy id can be used by dts and vop2 driver, so move them together
at rockchip_vop.h

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I0d6c8d48ba42425ff73d65aef843011d7112d981
2024-10-09 11:32:24 +08:00
Sandy Huang
ce3a290278 drm/rockchip: vop2: fix formats for rk356x esmart
RK356x can't support uv swap, so only can support YVYU and VYUY.

Fixes: cf58ab4406 ("drm/rockchip: vop2: rename and correct supported format")
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iea986580194b4a2aa6ce9943b27b8b3766285502
2024-10-09 10:50:42 +08:00
Shawn Lin
fe835d5fd3 PCI: rockchip: dw: Add fault injection support
(1) enable err_event:
root@rk3576-buildroot:/sys/kernel/debug/2a200000.pcie# echo enable > /sys/kernel/debug/2a200000.pcie/err_event
root@rk3576-buildroot:/sys/kernel/debug/2a200000.pcie# cat err_event
Common event signal status: 0xL1
EBUF Overflow: 0x0
EBUF Under-run: 0x0
Decode Error: 0x0
Running Disparity Error: 0x0
SKP OS Parity Error: 0x0
SYNC Header Error: 0x0
CTL SKP OS Parity Error: 0x0
Detect EI Infer: 0x0
Receiver Error: 0x0
Rx Recovery Request: 0x0
N_FTS Timeout: 0x0
Framing Error: 0x0
Deskew Error: 0x0
BAD TLP: 0x0
LCRC Error: 0x0
BAD DLLP: 0x0
Replay Number Rollover: 0x0
Replay Timeout: 0x0
Rx Nak DLLP: 0x0
Tx Nak DLLP: 0x0
Retry TLP: 0x0
FC Timeout: 0x0
Poisoned TLP: 0x0
ECRC Error: 0x0
Unsupported Request: 0x0
Completer Abort: 0x0
Completion Timeout: 0x0

(2) enable fault injection, for example, add 128 bad DLLP to EINJ2
root@rk3576-buildroot:/sys/kernel/debug/2a200000.pcie# echo "2 1 2 128" > fault_injection
root@rk3576-buildroot:/sys/kernel/debug/2a200000.pcie# cat fault_injection
ERROR_INJECTION0_ENABLE: 0x0
ERROR_INJECTION1_ENABLE: 0x0
ERROR_INJECTION2_ENABLE: 0x1 // enabled
ERROR_INJECTION3_ENABLE: 0x0
ERROR_INJECTION4_ENABLE: 0x0
ERROR_INJECTION5_ENABLE: 0x0
ERROR_INJECTION6_ENABLE: 0x0
EINJ0_CRC_TYPE: 0x0
EINJ0_COUNT: 0x0
EINJ1_BAD_SEQNUM: 0x0
EINJ1_SEQNUM_TYPE: 0x0
EINJ1_COUNT: 0x0
EINJ2_DLLP_TYPE: 0x2  // NAK DLLP
EINJ2_COUNT: 0x80     // number 128
EINJ3_SYMBOL_TYPE: 0x0
EINJ3_COUNT: 0x0
EINJ4_BAD_UPDFC_VALUE: 0x0
EINJ4_VC_NUMBER: 0x0
EINJ4_UPDFC_TYPE: 0x0
EINJ4_COUNT: 0x0
EINJ5_SPECIFIED_TLP: 0x0
EINJ5_COUNT: 0x0
EINJ6_PACKET_TYPE: 0x0
EINJ6_INVERTED_CONTROL: 0x0
EINJ6_COUNT: 0x0

(3) start transfer and see EINJ2_COUNT decreased to zero
root@rk3576-buildroot:/# dd if=/dev/nvme0n1 of=/dev/null bs=1M count=5000
...
root@rk3576-buildroot:/sys/kernel/debug/2a200000.pcie# cat fault_injection
ERROR_INJECTION0_ENABLE: 0x0
ERROR_INJECTION1_ENABLE: 0x0
ERROR_INJECTION2_ENABLE: 0x0 // auto disabled
ERROR_INJECTION3_ENABLE: 0x0
ERROR_INJECTION4_ENABLE: 0x0
ERROR_INJECTION5_ENABLE: 0x0
ERROR_INJECTION6_ENABLE: 0x0
EINJ0_CRC_TYPE: 0x0
EINJ0_COUNT: 0x0
EINJ1_BAD_SEQNUM: 0x0
EINJ1_SEQNUM_TYPE: 0x0
EINJ1_COUNT: 0x0
EINJ2_DLLP_TYPE: 0x2
EINJ2_COUNT: 0x0        // auto decreased to zero
EINJ3_SYMBOL_TYPE: 0x0
EINJ3_COUNT: 0x0
EINJ4_BAD_UPDFC_VALUE: 0x0
EINJ4_VC_NUMBER: 0x0
EINJ4_UPDFC_TYPE: 0x0
EINJ4_COUNT: 0x0
EINJ5_SPECIFIED_TLP: 0x0
EINJ5_COUNT: 0x0
EINJ6_PACKET_TYPE: 0x0
EINJ6_INVERTED_CONTROL: 0x0
EINJ6_COUNT: 0x0

(4) check err_event again
root@rk3576-buildroot:/sys/kernel/debug/2a200000.pcie# cat err_event
Common event signal status: 0xL1
EBUF Overflow: 0x0
EBUF Under-run: 0x0
Decode Error: 0x0
Running Disparity Error: 0x0
SKP OS Parity Error: 0x0
SYNC Header Error: 0x0
CTL SKP OS Parity Error: 0x0
Detect EI Infer: 0x0
Receiver Error: 0x0
Rx Recovery Request: 0x1f // we get 31 reoocvery due to error
N_FTS Timeout: 0x0
Framing Error: 0x0
Deskew Error: 0x0
BAD TLP: 0x0
LCRC Error: 0x0
BAD DLLP: 0x0
Replay Number Rollover: 0x0
Replay Timeout: 0x0
Rx Nak DLLP: 0x0
Tx Nak DLLP: 0x80      // We get 128 NAK DLLP
Retry TLP: 0x0
FC Timeout: 0x0
Poisoned TLP: 0x0
ECRC Error: 0x0
Unsupported Request: 0x0
Completer Abort: 0x0
Completion Timeout: 0x0

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ib214cc1be565bf16bafb6a847215572f35c43753
2024-10-08 16:40:52 +08:00
Hongming Zou
630f12e0d5 ARM: dts: rockchip: rk3506g-evb1: update dsi panel configuration
solved the problem that the fast startup probability is not displayed

Change-Id: Ib65866467dea93955d1b75389d7ef5790c9bc65d
Signed-off-by: Hongming Zou <hongming.zou@rock-chips.com>
2024-10-08 16:21:54 +08:00
Jon Lin
64e6f91eda arm64: dts: rockchip: rk3576: Add flexbus_spi
Change-Id: Id305708fe04d892f191f4d91deb34f86ca207261
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-10-08 16:17:17 +08:00
Jon Lin
f85717c0e8 spi: rockchip-flexbus-spi: Add code
Change-Id: Id78ea8ed2f1730377f5e4afd82c9ab890d8c6fd5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-10-08 16:17:17 +08:00
Jon Lin
07e77f0993 dt-bindings: spi: Bindings for Rockchip Flexbus controller under SPI transmission protocol
Add bindings for the Rockchip Flexbus controller under SPI mode.

Change-Id: I894bc3f6bcfe62cbe593be2e932bf982aad758fd
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-10-08 16:17:15 +08:00
Jon Lin
663d0d8f44 mfd: rockchip-flexbus: Add CPHA_SHIFT macro
Change-Id: I2fe8d48b3f669bcee1a47991a1f847d1e873a1ff
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-10-08 16:10:01 +08:00
Shawn Lin
4e89810905 perf/dwc_pcie: Fix lane event support for Rockchip
Lane event counter usage in Rockchip is slightly different with
T-Head. Fix it by checking vendor ID.

Fixes: 6cb6a00862 ("perf/dwc_pcie: Add support for Rockchip vendor devices")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Iccc25bb7b352f73bae963d827f14b2f7405608b2
2024-10-08 16:02:41 +08:00