RKPM_DBG_FSM_SOUT enables PMU FSM state signal output through
GPIO4_D5/SDMMC_CLK during sleep, mainly for debug PMU FSM flow.
Some one may use this pin as LED light, it's fine to drop it
to avoid influence on LED.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I54705292226d82829bc37db0758aa0d9a9995658
RKPM_DBG_FSM_SOUT enables PMU FSM state signal output through
GPIO4_D5/SDMMC_CLK during sleep, mainly for debug PMU FSM flow.
Some one may use this pin as LED light, it's fine to drop it
to avoid influence on LED.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I82af5fa676d6db8b81e877729c44b976bbfa9ea5
From test, sram_init_done can be used as a indicator to
see if phy power and input clock work find. Let's yell out
error is anything wrong with phy.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I5493e32ec5a9a6a8f6fc45e95618a657d9a21a67
We have some plane not registered to drm core(Such as cluster
plane on some linux system), so they don't have pstate.
And also we don't need to check plane state for oetf for
a inactived plane(has no fb).
Change-Id: I909b665397c3df530ff0f466e0d654dcbb3f1a40
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Clean up the buffer pool if start streaming failed.
BUG=redmine:#301918
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Change-Id: I4abcf17ef0c66dabcddcfac7395c7efabbfe6e47
keep sdr2hdr result consistent between VOP and GPU
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I3ef6b289978d4b0c083d99e93d97a95b2e7f0b25
reason: In rk356x, due to the hardware, vepu and jpegd should
disable auto freqence.
Change-Id: I2da5b5a7fc3b86180aef28b378a7b651e31a6b7a
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
On XferInProgress events, if the endpoint is isochronous
type, do not kick transfer directly even if the pending_list
isn't empty. Because it needs to wait for XferNotReady
event to start isoc transfer. Without this patch, it will
trigger a large number of unuseful XferInProgress events,
and easily cause loss of synchronization data if the cpu
core unable to handle the dwc3 thread interrupt in time.
Fixes: b77df21107 ("usb: dwc3: gadget: Continue to process pending requests")
Change-Id: I14d16240a6e10db466fd9822b4fdc35d79817508
Signed-off-by: William Wu <william.wu@rock-chips.com>
Add a BACKGROUND property for each crtc.
8 bit for every color channel(r/g/b/y/u/v).
Change-Id: I9439bf16a8142e936508e843cc25b6263e2f661d
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
It is not necessary to send rescheduling IPI when target cpu is not
idle for non-preempt kernel, because the target cpu will pick all the
tasks on the run-queue before enter idle.
Test this patch on RK3568-NVR, make cpu load to 100% with command:
taskset 01 yes > /dev/null &
taskset 02 yes > /dev/null &
taskset 04 yes > /dev/null &
taskset 08 yes > /dev/null &
So that the cpu will not enter idle.
without the patch, 32 channel video@25fps:
[root@RK356X:/]# cat /proc/interrupts | grep IPI0; sleep 10; cat /proc/interrupts | grep IPI0
IPI0: 74204 58815 99596 81177 Rescheduling interrupts
IPI0: 79503 76143 106149 87676 Rescheduling interrupts
with the patch, 32 channel video@25fps:
[root@RK356X:/]# cat /proc/interrupts | grep IPI0; sleep 10; cat /proc/interrupts | grep IPI0
IPI0: 28814 59314 60173 56759 Rescheduling interrupts
IPI0: 28814 59314 60173 56759 Rescheduling interrupts
Change-Id: I0d45a3d999696503124e693e7d6e145df719174a
Signed-off-by: Liang Chen <cl@rock-chips.com>
Enable bus_npu so that we can enable npu@1.0G safely when necessary.
Change-Id: I1a6ce1652aba7bafe91135bc79881cad0d5980ce
Signed-off-by: Liang Chen <cl@rock-chips.com>
RK3568 has 3 pmu io-domain, pmuio0/1/2, but the pmuio0 is 1.8v only, and
pmuio1 is 3.3v only, only pmuio2 support to select 1.8v or 3.3v.
RK3568 also has 7 io-domain, vccio1/2/3/4/5/6/7, but the vccio2
defaultly selected by the FLASH_VOL_SEL(GPIO0_A7).
Change-Id: I55ea1263c641112705b1443ff919c508cb3be2f0
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
We finally decide to set 16 for tx delay in driver, so no need for
dts to set it now.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I642ed3039db5410ca478b255166d07a035e971aa
According to the new test result, set tx delay to 16
by default.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I8e0bacfbf14f8c5db60a4d56a624d63c49e23051
Do sync reset only for PX30/RK1808/RK3308, because the BUG 'fsync
is out of sync' had been fixed on the latest version controller.
Change-Id: Ia4cd711a213cc03221726f7b6e89de3c317dc965
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
rkisp-isp-subdev pad2 to change colorspace and quantization
Change-Id: I077eb9482cd09119c11f2515e848dca203c42357
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
It isn't sticky when link goes down for whatever reason.
If devices want to reset the modules by puting link into D3
state or whatever, we should restore it the. Otherwise devices
cannot access RC's resource even if the link is recovered.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ie5b5a0b7f6ab03961658b4217c9db2cada0edb93
we find sometimes hdmi will trigger a plugout irq when system
shutdown, but actually it is connected, so when drm core run
a connect->detect callback it will find the hdmi is on connected
state, than run drm_fb_helper_hotplug_event, this drive all
the drm system run again.
But we are on the system shutdwon process, the running
drm core may cause many problem.
So we disable output poll to prevent drm_fb_helper_hotplug_event
when system shutdown.
And also the we should figure out why hdmi driver trigger the
wrong plugout irq at shutdown process.
Requesting system reboot
[ 26.466261] cpu cpu0: min=816000, max=816000
[ 26.476177] dwhdmi-rockchip fe0a0000.hdmi: dw hdmi plug out
[ 26.492452] rockchip_drm_platform_shutdown
[ 26.579331] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_transfer] *ERROR* generic write fifo is full
[ 26.580141] panel-simple-dsi fe060000.dsi.0: failed to write dcs cmd: -110
[ 26.581771] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_transfer] *ERROR* generic write fifo is full
[ 26.582577] panel-simple-dsi fe060000.dsi.0: failed to write dcs cmd: -110
[ 26.667890] rkisp_hw fdff0000.rkisp: rkisp_hw_shutdown
[ 26.675465] fan53555-regulator 0-001c: fan53555..... reset
[ 26.676891] fan53555-regulator 0-001c: reset: force fan53555_reset ok!
[ 26.677867] mpp_rkvdec2 fdf80200.rkvdec: shutdown device
[ 26.678381] mpp_jpgdec fded0000.jpegd: shutdown device
[ 26.678853] mpp-iep2 fdef0000.iep: shutdown device
[ 26.679288] mpp_vepu2 fdee0000.vepu: shutdown device
[ 26.679745] mpp_vdpu2 fdea0400.vdpu: shutdown device
[ 26.680201] mpp_rkvenc fdf40000.rkvenc: shutdown device
[ 26.680664] mpp_rkvenc fdf40000.rkvenc: shutdown success
[ 26.777723] rockchip_drm_output_poll_changed
[ 26.890773] rockchip-vop2 fe040000.vop: [drm:vop2_crtc_atomic_enable] Update mode to 1080x1920p60, type: 16 for vp1
[ 27.392083] rockchip-vop2 fe040000.vop: [drm:vop2_disable_all_planes_for_crtc] *ERROR* wait win close timeout
[ 27.393012] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_encoder_enable] final DSI-Link bandwidth: 880 x 4 Mbps
Change-Id: Ib1454636b1b35bf310252ab9469a107fcbf7e37c
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Fixes: 8c59d20b75 ("drm/rockchip: vop2: Add color key support")
Change-Id: I449f32eb9e69297b2c37feb85611a550310f2304
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
tips:
for rk356x, when image width less than 512, it may occur very
small probability for sram read and write.
Change-Id: I57bdfeb776dc0762870f3d7a3a6d81a1c146240d
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
