Open CONFIG_ROCKCHIP_THUNDER_BOOT_CRYPTO to enable it.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: If87598ae61c4490bd2dd23cf33ab30827bdc2d27
Open CONFIG_ROCKCHIP_THUNDER_BOOT_CRYPTO to enable it.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I0ff9889417377b9e4f72c12356bf3e86e927f137
Some times we only want use some of the module
of rockchip vop driver(et: rkmpp some times only
wat to use rockchip drm gem),
the real vop drivers is not needed to load.
Add a virtual vop driver let the rockchip drm launch.
Change-Id: Id6cd14a735eabaf8b4949330d56f77354e50c51c
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Add rk_tb_sha256 for thunderboot.
Change-Id: Iff9aba9c1d4c8188e618914bc16a3faefa1b3abd
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
This patch prints the reset/disconnect/suspend/wakeup event
for USB developer to check if the USB is reset/disconnted/
suspended/waked from USB PHY.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I889867edc6fd4b4d2fb2927c80d55a850556a8ad
This patch add new uvc trace for setup request processing.
1. enable trace
echo 4 > /sys/module/usb_f_uvc/parameters/trace
2. dump trace
dmesg
Test on RV1109 EVB with UVC function when streaming on:
[ 426.441316] uvcvideo: setup request a1 81 value 0100 index 0003 001a
[ 426.450280] uvcvideo: uvc_send_response: req len 26
[ 426.450444] uvcvideo: event_setup_out 0, data len 26
[ 426.451545] uvcvideo: setup request 21 01 value 0100 index 0003 001a
[ 426.460862] uvcvideo: uvc_send_response: req len 26
[ 426.461014] uvcvideo: event_setup_out 1, data len 26
[ 426.461173] uvcvideo: setup request a1 81 value 0100 index 0003 001a
[ 426.485791] uvcvideo: uvc_send_response: req len 26
[ 426.486672] uvcvideo: event_setup_out 0, data len 26
[ 426.487145] uvcvideo: setup request a1 83 value 0100 index 0003 001a
[ 426.496529] uvcvideo: uvc_send_response: req len 26
[ 426.496655] uvcvideo: event_setup_out 0, data len 26
[ 426.497485] uvcvideo: setup request a1 82 value 0100 index 0003 001a
[ 426.506737] uvcvideo: uvc_send_response: req len 26
[ 426.507195] uvcvideo: event_setup_out 0, data len 26
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: If882728e891d033c249e6c466b40d3e2a28bccb6
Add a new heap named "ion_protected_heap" with heap index as
(ION_HEAP_TYPE_CUSTOM + 1).
The protected heap could be used for secure memory, or memory limit.
Change-Id: I080f7d1c8e0516c1e967c3ec6d1c123d5df1867c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
sata0 is not available for rk3566 and sata2 is available.
Change-Id: I901a509d98826dd63788cde49c4a9caae7d0f6f0
Signed-off-by: Liang Chen <cl@rock-chips.com>
gmac1 access to the NIU bus depends on this clock.
Change-Id: I883e39678693f71acdc655004b59c5abc760ad86
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
If sdr2hdr_path_en is not set in sdr2hdr mode, the dly may
not match with the delay number list in TRM.
Change-Id: I989df532e42dc071ee78db79c234fa9582b8bccd
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
The vop2 default hdr2sdr tf is not good enough,
update custom hdr2sdr_tf from rk3328.
Test video: LG_BT2020_HDR10_H265_10B_2160P_60F_67M_DDR933M_Chess_HDR.mp4
Change-Id: I60b396558ede14c8b561c0403f36cf480c488edd
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
During dwc3 probe, it init the current_dr_role in drd_work,
and it must make sure that the current_dr_role is initialized
to DWC3_GCTL_PRTCAP_DEVICE or DWC3_GCTL_PRTCAP_HOST if it
support dule role mode before do async probe.
However, the drd_work and dwc3_rockchip_async_probe are handled
asynchronously, if the drd_work is handled prior to async probe,
it may fail to call dwc3_core_exit from dwc3_runtime_suspend in
async probe because of uninitialized current_dr_role. If this case
happens, the USB 2.0/3.0 PHY power on/off operations are unbalanced.
This patch get the extcon state before do runtime suspend in async
probe, and init the current_dr_role according to the extcon state.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I4d1f7683d3ef3c5580f35be52d28821c47f6457f
- It is for lite and mem mode, the ultra mode is not configurable.
- Disable sleep debug msg;
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I628aa1da19e2704b382a4a7307566a094daaa63a
The MCU reserves 10 frames raw data for 1080P sensor and about 1MB
header, it's about 32MB memory usage for 1080P on MCU.
Change-Id: I3bed8df0816af789ab4f143725c50e8e43ba12bb
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
The assigned clks take effect off-line capture on MCU, and make MCU
abnormal.
Signed-off-by: Sun ChuanHu <aaron.sun@rock-chips.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ib41b397afc7dd31a898cef9ccdef7b7c9b162f17
1.link enable ispp input video
2.set ispp input format
3.ispp output video config and stream on
4.ispp input video config and stream on
Change-Id: I742ebb71ceb87059e269628e8092177178b0ac45
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
