Commit Graph

844035 Commits

Author SHA1 Message Date
Neil Armstrong
e70565e1cb UPSTREAM: drm/bridge: dw-hdmi: disable SCDC configuration for invalid setups
This patch is an attempt to limit HDMI 2.0 SCDC setup when :
- the SoC embeds an HDMI 1.4 only controller
- the EDID supports SCDC but not scrambling
- the EDID supports SCDC scrambling but not for low TMDS bit rates,
  while only supporting low TMDS bit rates

This to avoid communicating with the SCDC DDC slave uncessary, and
setting the DW-HDMI TMDS Scrambler setup when not supported by the
underlying hardware.

Change-Id: I8ec1b7c33f49e4a63196335589d11396c8b9fe0e
Reported-by: Rob Herring <robh@kernel.org>
Fixes: 264fce6cc2 ("drm/bridge: dw-hdmi: Add SCDC and TMDS Scrambling support")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190315095414.28520-1-narmstrong@baylibre.com
(cherry picked from commit 836f90f9e2)
2019-08-26 17:34:22 +08:00
Zheng Yang
22c7219135 drm: bridge: dw-hdmi: add hdmi status debugfs node
Introduce status node in debugfs to show HDMI output status,
such as phy status, color and eotf.

Here is a sample log:

PHY enabled                     Mode: HDMI
Pixel Clk: 594000000Hz          TMDS Clk: 594000000Hz
Color Format: YUV422            Color Depth: 10 bit
Colorimetry: ITU.BT2020         EOTF: ST2084
x0: 0                           y0: 0
x1: 0                           y1: 0
x2: 0                           y2: 0
white x: 0                      white y: 0
max lum: 0                      min lum: 0
max cll: 0                      max fall: 0

Change-Id: I5d458b633dd3bd9aab67cc91f1695621937e58f5
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-26 17:30:04 +08:00
Zheng Yang
cfc01699fc drm: bridge: dw-hdmi: add switch state in dw_hdmi_connector_force
Application need to listen HDMI connector state when connector is
forced on/off, so we add switch_set_stat in dw_hdmi_connector_force.

Change-Id: I2b76a0a647eb6a4cfde7584e085f53540d0fa27f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-26 17:24:44 +08:00
Algea Cao
58d3d8412a drm/rockchip: dw_hdmi: Fix up screen flash when switching color
After switching color, hdmi output signal may be unstable.
If AVMUTE is cleared too early, tv will display err.

Change-Id: I595180bfe6e014de5231bcd75ee259d5702121e0
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2019-08-26 17:24:44 +08:00
Algea Cao
8aad83b839 drm/bridge: synopsys: dw-hdmi: Remove hpd_state judgment of atomic_begin and atomic_flush
There is no need to judge hpd status in atomic_begin and atomic_flush.
And this judgment may cause display error if TV make hpd status change
frequently.

Change-Id: I2ed87ef42b78a8faadc4bcc5b6b16d9390644903
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2019-08-26 17:24:44 +08:00
xuhuicong
7ab28c3914 drm/edid: output common tv resolution and hdmi mode if no read the correct edid
Change-Id: Ib7379340e8c1d59382553d21b60165fe5fb371e8
Signed-off-by: xuhuicong <xhc@rock-chips.com>
2019-08-26 17:24:44 +08:00
algea.cao
de13464baa drm/bridge: dw_hdmi: set vdisplay for frame packing 3d mode
This patch is only applicable to 3d frame packing
of progressive mode.
According to HDMI Specification 1.4b 8.2.3.2,
vertical toatal line is x2 of 2D vertical toatal line
and pixel clock frequency is x2 of 2D pixel clock frequency.

vdisplay += vtotal
mpixelclock *= 2

Change-Id: I097c25cd1a930635e33f0a7bc86797ad1c7ed607
Signed-off-by: algea.cao <algea.cao@rock-chips.com>
2019-08-26 17:24:44 +08:00
Nickey Yang
5eb78cfb18 drm: bridge/dw-hdmi: fix 4 block edid read error
msgs[0].addr will be 0x30 when read edid with more than 2 block.
but still a read edid operation with write DDC_ADDR to
HDMI_I2CM_SLAVE register.So fix it.

Change-Id: I5f0cd9172acd4a68d5b54eaf99f17b45385a4263
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2019-08-26 17:24:44 +08:00
Zheng Yang
b68cf86c03 drm: bridge: dw-hdmi: set ddc scl clock rate according to dts
To set dw hdmi i2c bus adapter scl clock rate, we introduce two device
tree parameter, ddc-i2c-scl-high-time-ns and ddc-i2c-scl-low-time-ns.

ddc-i2c-scl-high-time-ns: how many ns SCL hold high
ddc-i2c-scl-low-time-ns: how many ns SCL hold low

After measurement, 50KHz scl clock rate recommended configuration is:

&hdmi {
	ddc-i2c-scl-high-time-ns = <9625>;
	ddc-i2c-scl-low-time-ns = <10000>;
};

100KHz recommended configuration is:
&hdmi {
        ddc-i2c-scl-high-time-ns = <4708>;
        ddc-i2c-scl-low-time-ns = <4916>;
};

If dts parameter is not available, the default scl rate is 100KHz.

Change-Id: I6f6b0bf1694ab59e70da789ead99e15a53c93e4d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-26 17:24:44 +08:00
Zheng Yang
251f26d82e drm: bridge: dw-hdmi: support send BT.2020 colorimetry in avi
Change-Id: I130e151c4576325103e7374e7402718b93ca5da3
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-26 17:24:44 +08:00
Wyon Bi
aefda0b281 drm/rockchip: dsi: Add support for rockchip kernel logo
Change-Id: Ifb511a5db4c744448bfa02c09ee4c884b6d2a4e8
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-08-26 16:02:43 +08:00
Wyon Bi
a96ba7fcd5 drm/rockchip: dsi: Add support for PX30/RK1808/RK3128/RK3368
Change-Id: Ia9934a50c63e046e34ea694e10b0e1d17b53a6f0
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-08-26 16:02:43 +08:00
Wyon Bi
b2028b88c9 drm/rockchip: dsi: implement runtime pm to dynamically manage the clock
Change-Id: I7ac757a04b51dded41a9c3f6697bb9390e0e2e5e
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-08-26 16:02:43 +08:00
Zheng Yang
fac791be7c drm/rockchip: hdmi: add hdmi output colorimetry property
This patch add hdmi_output_colorimetry to support modify
hdmi output colorimetry. It could be following value:
	- None
	- IUT_2020
Default value is None, which means normal hdmi output
colorimetry.

Change-Id: Ib4883fd0553d9d4193c7295812d2c1433724fe63
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-23 14:24:32 +08:00
Simon Xue
9e7903733a arm: dts: rockchip: update iommu clk name from "hclk" to "iface"
Change-Id: Id472c4b7cc6161efe5c5edc5daac80a5ba19c472
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2019-08-23 14:15:30 +08:00
Simon Xue
501edcd4d6 arm64: dts: rockchip: update iommu clk name from "hclk" to "iface"
Change-Id: I145f5307814c3300c11ee4281673498c98cf6166
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2019-08-23 14:15:12 +08:00
Simon Xue
53af1d4ee1 iommu/rockchip: make compatible to iommu who use "hclk" in dts
Change-Id: If7c5c48e78cdbf189dd445980a61f4ffeb7082ce
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2019-08-23 14:14:10 +08:00
Algea Cao
1058897b3c FROMLIST: drm: Parse Colorimetry data block from EDID
CEA 861.3 spec adds colorimetry data block for HDMI.
Parsing the block to get the colorimetry data from
panel.

v2: Rebase

v3: No Change

v4: Addressed Shashank's review comments. Updated
colorimetry field to 16 bit as DCI-P3 got added
in CEA 861-G spec, as pointed out by Shashank.

v5: Fixed checkpatch warnings with --strict option.

Change-Id: Ia82d4c04edff53bd4d6c4411dd90391497140e85
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10861325/)
2019-08-23 11:01:14 +08:00
Zheng Yang
821bf1091c drm/rockchip: hdmi: disable RK3368 2160P RGB444/YCbCr444/YCbCr422 mode
Change-Id: I573db9cd41031f45cac359fc9314491ebd1ba8fc
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-23 10:54:32 +08:00
xuhuicong
ae6fbdeed9 drm/rockchip: dw-hdmi: filter color format which is no support
there are maximum TMDS clock limit, when the clock is out of range
reducing frequency by set color format to yuv420 and/or set color
depth to 8bit

Change-Id: I8b79de97329561bf0399d05c0264a5c818f844fc
Signed-off-by: xuhuicong <xhc@rock-chips.com>
2019-08-23 10:54:32 +08:00
Zheng Yang
99b329a400 drm/rockchip: dw-hdmi: set default color depth to 8 bit
If color depth is automatic, it is same as 8bit.
If tmdsclk > max_tmds_clock, fall back to 8bit.

Change-Id: Ia8cbf5206831ef99456ae59add94c6f8b5a33380
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-23 10:54:32 +08:00
Zheng Yang
18b67f935a drm/rockchip: dw-hdmi: move depth checking into dw_hdmi_rockchip_select_output
For some display device, max_tmds_clock is 0, we think
max_tmds_clock is 340MHz. If tmdsclock > max_tmds_clock,
depth should fall back to 8bit. And If display mode support
YCBCR420, output format is YCBCR420.

Because max tmds clk of RK3368 is 340MHz, hdmi output policy
is same as mentioned above.

It is need to check tmds clock rate at the last. So we move
depth checking into dw_hdmi_rockchip_select_output.

Change-Id: I27e029fc0171b175ddbfa453ed12854ab6a7432b
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-23 10:54:32 +08:00
Sandy Huang
df04e458f8 drm/rockchip: lvds: update for kernel logo display
Change-Id: Ibc24b0c20027f2d1ade2540cf69e27a8c823ba1c
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-08-23 10:45:03 +08:00
Sandy Huang
774d5ecb0e drm/rockchip: driver: some connector maybe not implement detect
Change-Id: I58b580c36f96388a37c2a2b4a02ba6ba9e46e347
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-08-23 10:44:35 +08:00
Sandy Huang
9913202a13 drm/rockchip: VOP: update VOP irq control
VOP irq is share with VOP mmu, so the irq_desc is point to the same
address, this maybe case the following bug:
vop_bind()
	devm_request_irq() -> irq_desc->depth is 0
	disable_irq()      -> irq_desc->depth is 1
	encoder/connector/panel maybe bind failed, so next step is:
vop_unbind()
……
vop_bind() again
	devm_request_irq() -> because the irq_desc is share with VOP MMU,
			      the irq_desc isn't freed.so the depth is 1
	disable_irq()      -> irq_desc->depth is 2

next step when we want to enable_irq, the irq_desc->depth is 2, the GIC
will not enable VOP irq realy.

so we update the VOP irq control, delete the GIC VOP interrupt control.
after this the VOP interrupt only control by VOP interrupt register.

maybe we can enable_irq at vop_unbind when vop_bind failed to keep irq
balance, but the enable_irq() at vop_unbind() seem not friendly.

Change-Id: I30ee0b6973e8eebb9209b10d8bbbfb6cbcfb30e8
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-08-23 10:44:31 +08:00
Sandy Huang
7c932a6cd6 arm64: dts: rockchip: px30: update rockchip-iommu clk name
Change-Id: I45b9fd681064b57efafe92d2a90486af1a77d293
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-08-23 10:44:27 +08:00
Wyon Bi
83fda806f0 phy/rockchip: Add support for INNOSILICON MIPI/LVDS/TTL Video Combo PHY
The Innosilicon Video Combo PHY not only supports MIPI DSI,
but also LVDS and TTL functions with small die size and low
pin count. Customers can choose according to their own applications.

Change-Id: I0e4a5f69af5cc967b5df0fb17a51c43cef9ea33f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-08-23 09:28:18 +08:00
Wyon Bi
7ac1f1bde0 phy: add MIPI/LVDS/TTL modes to the phy_mode enum
This patch adds more generic PHY modes to the phy_mode enum, to
allow configuring generic PHYs to the MIPI/LVDS/TTL mode by
using the set_mode callback.

Change-Id: Ib6966828011aa52f1f133449f69df46c2001a57b
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-08-23 09:06:14 +08:00
Leo Wen
3483d7ceb2 drm/rockchip: vop: use win1 for ui instead of win0 in px30 vopb.
PX30 vopb have win0, win1 and win2 layers.the formats they support below:
Win0:   XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16 NV12 NV16 NV24 NA12 NA16 NA24
Win1/2: XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16

Only the win0 layer support NV12 format(video decode format).
So change to use win0 for video overlay layer and win1 for ui layer.

Change-Id: I7ef8bda4be908188700ca4d3f1df23a6336e02b2
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
2019-08-23 09:06:14 +08:00
Nickey Yang
332d7f2a88 drm/rockchip: vop: adjust the layers in RK3399's VOBL
AFAWK, there are four layers in RK3399's VOPB, and two layers for
RK3399's VOPL.

And RK3399's VOBL has the win0 and win2 layers, the formats they support
as below.
win0:
    XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16 NV12 NV16 NV24 NA12 NA16 NA24
win2:
    XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16
So only win0 layer supports NV12 format (for video decode format),
adjust the overlay for video and primary layer for display.

It didn't care this case if some platforms had handled the display in
application (e.g android), then on the Linux platform, it's hard to handle
the all kinds of cases in Display application, perhaps the linux needn't
this patch fixes it in the future.

Depend-CL:76144
Fixes: d82f1d3e58
("arm64: dts: rockchip: reasonable alllcation of VOP on rk3399 linux")

Change-Id: Id93b315b6e3ae670bf5ea4dc0a64e140c6e37e80
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2019-08-23 09:06:14 +08:00
Nickey Yang
e3f50f3518 drm/rockchip: vop: set plane's zpos according to type
The zpos currently configure is the order in vop_win_data array,
which is related to the actual hardware plane.
But in the Linux platform, such as video hardware and camera preview,
it can only be played on the nv12 plane.
So set the order of zpos to PRIMARY < OVERLAY (if have) < CURSOR (if have).

Change-Id: Ia9ab3cb9225fd2c385703109afbfbb42a1564110
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2019-08-23 09:06:14 +08:00
Sandy Huang
47a4bf661f drm/rockchip: vop: p2i is supported from rk3399
Change-Id: I52206f36caecc01134f9ade7112c6b345e7b9834
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-08-23 08:37:28 +08:00
Sandy Huang
480670f19c drm/rockchip: rgb: init eotf and color space for tv output
Change-Id: Ieb5891dbee664c4fe283db6f075a811be1b4bd25
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-08-23 08:37:28 +08:00
Shixiang Zheng
df2c27cd76 drm/rockchip: vop: workaround a issue of px30 treat rgb888 as bgr888
Change-Id: Ica98fe1ea2d624dd7bd38a531907d6c574046d8d
Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>
2019-08-23 08:37:20 +08:00
Shixiang Zheng
262e57349d drm/rockchip: vop: initial enable vop dither up
for rgb565/666 can dither to rgb888

Change-Id: I8936714e6e9cc015f3070111662442b0243d0720
Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>
2019-08-22 17:54:27 +08:00
Wyon Bi
92a8db1509 drm/rockchip: rgb: Implement loader protect callback
Change-Id: Iffa5b17de436ad26c718725168b5eab11e4ebbfc
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-08-22 17:50:03 +08:00
Sandy Huang
746ad506c9 drm/rockchip: vop: add connector type for debug
Change-Id: Id2362f5abdb46e199d2e4e0e0976d75a0c04d386
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-08-22 17:38:14 +08:00
Tao Huang
89b4c65a87 rk: scripts: update mkbootimg
AOSP 983425fe9480 ("eliminate meaningless non-zero values of second_offset and ramdisk_offset")
Revert 7261bb083a97 ("Check DTB image size for boot image header version 2 and above")
which failed to repack image without dtb.

Change-Id: I3d3b7ebb87f137bcc66dd7d59bac3423c0c33193
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2019-08-20 14:27:12 +08:00
Sandy Huang
455796818d drm: fix some no need warning
As rockchip maybe appear one crtc connect two connecter,
the conn_state->best_encoder always isn't NULL, so
here no need warning.

Change-Id: I3e4274e64f4c2b4eea5d9700cebffb716425426b
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-08-20 11:06:29 +08:00
Sandy Huang
8e4d45272a drm: support drm_get_connector_name
Change-Id: I075d948afc2baa47fb147f9a967844a872171397
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-08-19 14:50:30 +08:00
Zheng Yang
2beb3925b7 drm: bridge: dw-hdmi: support Dynamic Range and Mastering Infoframe
The Dynamic Range and Mastering InfoFrame carries data such as
the EOTF and the Static Metadata associated with the dynamic
range of the video stream.

This function is introduced in the 2.11a version.

Change-Id: I279cc0665e34d75209774013882ccc8946ce6da5
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-19 14:48:00 +08:00
Zheng Yang
97fd2e42b6 drm: Add HDR panel metadata property
HDR_PANEL_METADATA is used to indicate HDR capacity of sink device.

Change-Id: I598a7bb5634f14b57f94135fd3be6b0ad2075116
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-19 14:48:00 +08:00
Zheng Yang
2391d71d38 drm/rockchip: hdmi: support set eotf and colorimetry
HDMI will set vop eotf and color space according to display mode.

Change-Id: I469d03dd1f14a2bcd75ed5c8e3227cd1d34eb354
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-19 14:48:00 +08:00
Zheng Yang
d51a8b4d49 drm: rockchip: hdmi: attach HDR_SOURCE_METADATA property
HDR_SOURCE_METADATA property is used to set source hdr metadata,
which will be sent to sink though HDMI DRM infoframe.

Change-Id: If3500cb505c16c2f0caf66b8e64b4d80b93b228f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2019-08-19 14:48:00 +08:00
Uma Shankar
652af9ff53 UPSTREAM: video/hdmi: Add Unpack function for DRM infoframe
Added unpack function for DRM infoframe for dynamic
range and mastering infoframe readout.

v2: Addressed Ville's review comments.

Change-Id: I153d45876c20986acd09d8df0856316a29fd721a
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-12-git-send-email-uma.shankar@intel.com
(cherry picked from commit 270afb37ae)
2019-08-19 14:48:00 +08:00
Ville Syrjälä
ff39b1b828 UPSTREAM: video/hdmi: Pass buffer size to infoframe unpack functions
To make sure the infoframe unpack functions don't end up examining
stack garbage or oopsing, let's pass in the size of the buffer.

v2: Convert tda1997x.c as well (kbuild test robot)

Change-Id: I3512b43a35f18d9a44b643ce257436b3348f5e6a
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Cc: linux-media@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180920185145.1912-3-ville.syrjala@linux.intel.com
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
(cherry picked from commit 480b8b3e42)
2019-08-19 14:48:00 +08:00
Ville Syrjälä
297653683f UPSTREAM: video/hdmi: Constify 'buffer' to the unpack functions
The unpack functions just read from the passed in buffer,
so make it const.

Change-Id: Idcce85511d2eba8cb6e2d7a8eb03d741daaad796
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Cc: linux-media@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180920185145.1912-2-ville.syrjala@linux.intel.com
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
(cherry picked from commit f26e1de5ec)
2019-08-19 14:48:00 +08:00
Ville Syrjälä
1e5987a815 UPSTREAM: drm: Add HLG EOTF
ADD HLG EOTF to the list of EOTF transfer functions supported.
Hybrid Log-Gamma (HLG) is a high dynamic range (HDR) standard.
HLG defines a nonlinear transfer function in which the lower
half of the signal values use a gamma curve and the upper half
of the signal values use a logarithmic curve.

v2: Rebase

v3: Fixed a warning message

v4: Addressed Shashank's review comments

v5: Addressed Jonas Karlman's review comment and dropped the i915
tag from header.

Change-Id: I6542cb0cb6cfccb92f76aa98df5d054fc1e908d8
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-8-git-send-email-uma.shankar@intel.com
(cherry picked from commit b5e3eed1ee)
2019-08-19 14:48:00 +08:00
Uma Shankar
7ffbba0d86 UPSTREAM: drm: Enable HDR infoframe support
Enable Dynamic Range and Mastering Infoframe for HDR
content, which is defined in CEA 861.3 spec.

The metadata will be computed based on blending
policy in userspace compositors and passed as a connector
property blob to driver. The same will be sent as infoframe
to panel which support HDR.

Added the const version of infoframe for DRM metadata
for HDR.

v2: Rebase and added Ville's POC changes.

v3: No Change

v4: Addressed Shashank's review comments and merged the
patch making drm infoframe function arguments as constant.

v5: Rebase

v6: Fixed checkpatch warnings with --strict option. Addressed
Shashank's review comments and added his RB.

v7: Addressed Brian Starkey's review comments. Merged 2 patches
into one.

v8: Addressed Jonas Karlman review comments.

v9: Addressed Jonas Karlman review comments.

v10: Addressed Ville's review comments.

v11: Added BUILD_BUG_ON and sizeof instead of magic numbers as
per Ville's comments.

Change-Id: I9f64d3df1a62afb83a5075662d96964c4dd3c2be
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-5-git-send-email-uma.shankar@intel.com
(cherry picked from commit 2cdbfd66a8)
2019-08-19 14:48:00 +08:00
Ville Syrjälä
82fa7bd48f UPSTREAM: video/hdmi: Constify infoframe passed to the pack functions
Let's make the infoframe pack functions usable with a const infoframe
structure. This allows us to precompute the infoframe earlier, and still
pack it later when we're no longer allowed to modify the structure.
So now we end up with a _check()+_pack_only() or _pack() functions
depending on whether you want to precompute the infoframes or not.
The names aren't great but I was lazy and didn't want to change all the
drivers.

v2: Deal with exynos churn
    Actually export the new funcs
v3: Fix various documentation fails (Hans)

Change-Id: I5a74363af0e985ffa4f7698c9eef486b69882961
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Cc: linux-media@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180921143332.28970-1-ville.syrjala@linux.intel.com
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
(cherry picked from commit c5e69ab35c)
2019-08-19 14:48:00 +08:00