Commit Graph

1050782 Commits

Author SHA1 Message Date
Suzuki K Poulose
ea480c0f70 UPSTREAM: coresight: trbe: Add a helper to pad a given buffer area
Refactor the helper to pad a given AUX buffer area to allow
"filling" ignore packets, without moving any handle pointers.
This will be useful in working around errata, where we may
have to fill the buffer after a session.

Bug: 213931796
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-7-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 4585481af3)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I1626ce2a9670feba9f921d2448b744b75222bf7b
2022-01-24 12:15:00 -08:00
Suzuki K Poulose
fcb0f0502b UPSTREAM: coresight: trbe: Add a helper to calculate the trace generated
We collect the trace from the TRBE on FILL event from IRQ context
and via update_buffer(), when the event is stopped. Let us
consolidate how we calculate the trace generated into a helper.

Bug: 213931796
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-6-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 41c0e5b7a3)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I11ade8f211161c18286164afadb46cb17c92c395
2022-01-24 12:15:00 -08:00
Tao Zhang
3efe28b9f1 UPSTREAM: coresight: etm4x: Add ETM PID for Kryo-5XX
Add ETM PID for Kryo-5XX to the list of supported ETMs.
Otherwise, Kryo-5XX ETMs will not be initialized successfully.
e.g.
This change can be verified on qrb5165-rb5 board. ETM4-ETM7 nodes
will not be visible without this change.

Bug: 213931796
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Link: https://lore.kernel.org/r/1632477981-13632-2-git-send-email-quic_taozha@quicinc.com
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 0605b89d05)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I7ac9ec7d29b1d7ed55db98558e326268912dea5d
2022-01-24 12:14:59 -08:00
Suzuki K Poulose
0b46078ddc UPSTREAM: coresight: trbe: Prohibit trace before disabling TRBE
When the TRBE generates an IRQ, we stop the TRBE, collect the trace
and then reprogram the TRBE with the updated buffer pointers, whenever
possible. We might also leave the TRBE disabled, if there is not
enough space left in the buffer. However, we do not touch the ETE at
all during all of this. This means the ETE is only disabled when
the event is disabled later (via irq_work). This is incorrect, as the
ETE trace is still ON without actually being captured and may be routed
to the ATB (even if it is for a short duration).

So, we move the CPU into trace prohibited state always before disabling
the TRBE, upon entering the IRQ handler. The state is restored if the
TRBE is enabled back. Otherwise the trace remains prohibited.

Since, the ETM/ETE driver now controls the TRFCR_EL1 per session, the
tracing can be restored/enabled back when the event is rescheduled
in.

Bug: 213931796
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210923143919.2944311-6-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit dcfecfa444)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I7cdd787539b94b3a0ab5b9d1f568a1dee396b042
2022-01-24 12:14:59 -08:00
Suzuki K Poulose
7069b9e840 UPSTREAM: coresight: trbe: End the AUX handle on truncation
When we detect that there isn't enough space left to start a meaningful
session, we disable the TRBE, marking the buffer as TRUNCATED. But we delay
the notification to the perf layer by perf_aux_output_end() until the event
is scheduled out, triggered from the kernel perf layer. This will cause
significant black outs in the trace. Now that the CoreSight PMU layer can
handle a closed "AUX" handle properly, we can close the handle as soon as
we detect the case, allowing the userspace to collect and re-enable the
event.

Also, while in the IRQ handler, move the irq_work_run() after we have
updated the handle, to make sure the "TRUNCATED" flag causes the event to
be disabled as soon as possible.

Bug: 213931796
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210923143919.2944311-5-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 9bef9d0850)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I3a29de03d1124e0576304b4b64a36585d9ecc422
2022-01-24 12:14:59 -08:00
Suzuki K Poulose
19f38d35f9 UPSTREAM: coresight: trbe: Do not truncate buffer on IRQ
The TRBE driver marks the AUX buffer as TRUNCATED when we get an IRQ
on FILL event. This has rather unwanted side-effect of the event
being disabled when there may be more space in the ring buffer.

So, instead of TRUNCATE we need a different flag to indicate
that the trace may have lost a few bytes (i.e from the point of
generating the FILL event until the IRQ is consumed). Anyways, the
userspace must use the size from RECORD_AUX headers to restrict
the "trace" decoding.

Using PARTIAL flag causes the perf tool to generate the
following warning:

  Warning:
  AUX data had gaps in it XX times out of YY!

  Are you running a KVM guest in the background?

which is pointlessly scary for a user. The other remaining options
are :
  - COLLISION - Use by SPE to indicate samples collided
  - Add a new flag - Specifically for CoreSight, doesn't sound
    so good, if we can re-use something.

Given that we don't already use the "COLLISION" flag, the above
behavior can be notified using this flag for CoreSight.

Bug: 213931796
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: James Clark <james.clark@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210923143919.2944311-4-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 0a5f355633)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I56b2eaa6b171bea000c040d94640d59fbfa3cb27
2022-01-24 12:14:59 -08:00
Suzuki K Poulose
0e7d9e4b5e UPSTREAM: coresight: trbe: Fix handling of spurious interrupts
On a spurious IRQ, right now we disable the TRBE and then re-enable
it back, resetting the "buffer" pointers(i.e BASE, LIMIT and more
importantly WRITE) to the original pointers from the AUX handle.
This implies that we overwrite any trace that was written so far,
(by overwriting TRBPTR) while we should have ignored the IRQ.

On detecting a spurious IRQ after examining the TRBSR we simply
re-enable the TRBE without touching the other parameters.

Bug: 213931796
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210923143919.2944311-3-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 7037a39d37)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I83d52e150ecafa8830cf0d1be0f870958b3f432a
2022-01-24 12:14:59 -08:00
Suzuki K Poulose
aac76367e4 UPSTREAM: coresight: trbe: irq handler: Do not disable TRBE if no action is needed
The IRQ handler of the TRBE driver could race against the update_buffer()
in consuming the  IRQ. So, if the update_buffer() gets to processing the
TRBE irq, the TRBSR will be cleared. Thus by the time IRQ handler is
triggered, there is nothing to do there. Handle these cases and do not
disable the TRBE unnecessarily. Since the TRBSR can be read without
stopping the TRBE, we can check that before disabling the TRBE.

Bug: 213931796
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210923143919.2944311-2-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 85fb92353e)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: Ic53d31cb60f44ab5843aa3c054dad5b61e601697
2022-01-24 12:14:58 -08:00
Suzuki K Poulose
984ff5cb73 UPSTREAM: coresight: trbe: Unify the enabling sequence
Unify the sequence of enabling the TRBE. We do this from
event_start and also from the TRBE IRQ handler. Lets move
this to a common helper. The only minor functional change
is returning an error when we fail to enable the TRBE.
This should be handled already.

Since we now have unique entry point to trying to enable TRBE,
move the format flag setting to the central place.

Bug: 213931796
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-9-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 04a37a174e)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: Ic477a920ff7f8c646ea080cde22f96e185b62d68
2022-01-24 12:14:58 -08:00
Suzuki K Poulose
3e0492f703 UPSTREAM: coresight: trbe: Drop duplicate TRUNCATE flags
We mark the buffer as TRUNCATED when there is no space left
in the buffer. But we do it at different points.
    __trbe_normal_offset()
and also, at all the callers of the above function via
compute_trbe_buffer_limit(), when the limit == base (i.e
offset = 0 as returned by the __trbe_normal_offset()).

So, given that the callers already mark the buffer as TRUNCATED
drop the caller inside the __trbe_normal_offset().

This is in preparation to moving the handling of TRUNCATED
into a central place.

Bug: 213931796
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-6-suzuki.poulose@arm.com
[Moved comment as Anshuman requested]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit acee3ef86d)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I94ed5a532138c12dfc84710f1884b24fbbbaf34c
2022-01-24 12:14:58 -08:00
Suzuki K Poulose
e29edaac16 UPSTREAM: coresight: trbe: Ensure the format flag is always set
When the TRBE is stopped on truncating an event, we may not
set the FORMAT flag, even though the size of the record is 0.
Let us be consistent and not confuse the user.

To ensure that the format flag is always set on all the
records generated by TRBE, set the flag when we have a
new handle. Rather than deferring to the "end" operation,
which makes it clear. So, we can do this from

 -  arm_trbe_enable() -> When a new handle is provided by the
    CoreSight PMU, triggered via etm_event_start()
 -  trbe_handle_overflow() -> When we begin a new handle after
    closing the previous on overflow.

Bug: 213931796
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-5-suzuki.poulose@arm.com
[Fixed inverted words in title]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 5bd9ff830c)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: Ia97b517aff176c88279fcf09619f6ac1ed831bf9
2022-01-24 12:14:58 -08:00
Suzuki K Poulose
0e5e45f4f0 UPSTREAM: coresight: etm-pmu: Ensure the AUX handle is valid
The ETM perf infrastructure closes out a handle during event_stop
or on an error in starting the event. In either case, it is possible
for a "sink" to update/close the handle, under certain circumstances.
(e.g no space in ring buffer.). So, ensure that we handle this
gracefully in the PMU driver by verifying the handle is still valid.

Bug: 213931796
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-4-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 2ef43054bb)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I5046abb29097d575f766b9569ef95ed38d86bbd3
2022-01-24 12:14:58 -08:00
Suzuki K Poulose
eafd22e7f7 UPSTREAM: coresight: etm4x: Use Trace Filtering controls dynamically
The Trace Filtering support (FEAT_TRF) ensures that the ETM
can be prohibited from generating any trace for a given EL.
This is much stricter knob, than the TRCVICTLR exception level
masks, which doesn't prevent the ETM from generating Context
packets for an "excluded" EL. At the moment, we do a onetime
enable trace at user and kernel and leave it untouched for the
kernel life time. This implies that the ETM could potentially
generate trace packets containing the kernel addresses, and
thus leaking the kernel virtual address in the trace.

This patch makes the switch dynamic, by honoring the filters
set by the user and enforcing them in the TRFCR controls.
We also rename the cpu_enable_tracing() appropriately to
cpu_detect_trace_filtering() and the drvdata member
trfc => trfcr to indicate the "value" of the TRFCR_EL1.

Bug: 213931796
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Al Grant <al.grant@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-3-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 5f6fd1aa8c)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I4b0653306cad6f3a52cb6ab02e1dffe12d9c3fef
2022-01-24 12:14:58 -08:00
Suzuki K Poulose
9ae4cb206b UPSTREAM: coresight: etm4x: Save restore TRFCR_EL1
When the CPU enters a low power mode, the TRFCR_EL1 contents could be
reset. Thus we need to save/restore the TRFCR_EL1 along with the ETM4x
registers to allow the tracing.

The TRFCR related helpers are in a new header file, as we need to use
them for TRBE in the later patches.

Bug: 213931796
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-2-suzuki.poulose@arm.com
[Fixed cosmetic details]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 937d3f58ca)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: Iecff67f306313f4451fa8b7a7ebd8d1cd7377ad1
2022-01-24 12:14:58 -08:00
James Clark
5f4d516d89 UPSTREAM: coresight: Don't immediately close events that are run on invalid CPU/sink combos
When a traced process runs on a CPU that can't reach the selected sink,
the event will be stopped with PERF_HES_STOPPED. This means that even if
the process migrates to a valid CPU, tracing will not resume.

This can be reproduced (on N1SDP) by using taskset to start the process
on CPU 0, and then switching it to CPU 2 (ETF 1 is only reachable from
CPU 2):

  taskset --cpu-list 0 ./perf record -e cs_etm/@tmc_etf1/ --per-thread -- taskset --cpu-list 2 ls

This produces a single 0 length AUX record, and then no more trace:

  0x3c8 [0x30]: PERF_RECORD_AUX offset: 0 size: 0 flags: 0x1 [T]

After the fix, the same command produces normal AUX records. The perf
self test "89: Check Arm CoreSight trace data recording and synthesized
samples" no longer fails intermittently. This was because the taskset in
the test is after the fork, so there is a period where the task is
scheduled on a random CPU rather than forced to a valid one.

Specifically selecting an invalid CPU will still result in a failure to
open the event because it will never produce trace:

  ./perf record -C 2 -e cs_etm/@tmc_etf0/
  failed to mmap with 12 (Cannot allocate memory)

The only scenario that has changed is if the CPU mask has a valid CPU
sink combo in it.

Testing
=======

* Coresight self test passes consistently:
  ./perf test Coresight

* CPU wide mode still produces trace:
  ./perf record -e cs_etm// -a

* Invalid -C options still fail to open:
  ./perf record -C 2,3 -e cs_etm/@tmc_etf0/
  failed to mmap with 12 (Cannot allocate memory)

* Migrating a task to a valid sink/CPU now produces trace:
  taskset --cpu-list 0 ./perf record -e cs_etm/@tmc_etf1/ --per-thread -- taskset --cpu-list 2 ls

* If the task remains on an invalid CPU, no trace is emitted:
  taskset --cpu-list 0 ./perf record -e cs_etm/@tmc_etf1/ --per-thread -- ls

Bug: 213931796
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: James Clark <james.clark@arm.com>
Link: https://lore.kernel.org/r/20210922125144.133872-2-james.clark@arm.com
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 8c60acbcb9)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: If0d5639287630bb4ceb6defcebed15d139a1a8b2
2022-01-24 12:14:57 -08:00
Leo Yan
c63411d4b7 UPSTREAM: coresight: tmc-etr: Speed up for bounce buffer in flat mode
The AUX bounce buffer is allocated with API dma_alloc_coherent(), in the
low level's architecture code, e.g. for Arm64, it maps the memory with
the attribution "Normal non-cacheable"; this can be concluded from the
definition for pgprot_dmacoherent() in arch/arm64/include/asm/pgtable.h.

Later when access the AUX bounce buffer, since the memory mapping is
non-cacheable, it's low efficiency due to every load instruction must
reach out DRAM.

This patch changes to allocate pages with dma_alloc_noncoherent(), the
driver can access the memory via cacheable mapping; therefore, load
instructions can fetch data from cache lines rather than always read
data from DRAM, the driver can boost memory performance.  After using
the cacheable mapping, the driver uses dma_sync_single_for_cpu() to
invalidate cacheline prior to read bounce buffer so can avoid read stale
trace data.

By measurement the duration for function tmc_update_etr_buffer() with
ftrace function_graph tracer, it shows the performance significant
improvement for copying 4MiB data from bounce buffer:

  # echo tmc_etr_get_data_flat_buf > set_graph_notrace // avoid noise
  # echo tmc_update_etr_buffer > set_graph_function
  # echo function_graph > current_tracer

  before:

  # CPU  DURATION                  FUNCTION CALLS
  # |     |   |                     |   |   |   |
  2)               |    tmc_update_etr_buffer() {
  ...
  2) # 8148.320 us |    }

  after:

  # CPU  DURATION                  FUNCTION CALLS
  # |     |   |                     |   |   |   |
  2)               |  tmc_update_etr_buffer() {
  ...
  2) # 2525.420 us |  }

Bug: 213931796
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210905032144.966766-1-leo.yan@linaro.org
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 0abd076217)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I6fb153777076db8abeaa5145cb6050ddfed35781
2022-01-24 12:14:57 -08:00
Leo Yan
3451f252b3 UPSTREAM: coresight: Update comments for removing cs_etm_find_snapshot()
Commit 2f01c200d4 ("perf cs-etm: Remove callback cs_etm_find_snapshot()")
has removed the function cs_etm_find_snapshot() from the perf tool in the
user space, now CoreSight trace directly uses the perf common function
__auxtrace_mmap__read() to calcualte the head and size for AUX trace data
in snapshot mode.

This patch updates the comments in drivers to make them generic and not
stick to any specific function from perf tool.

Bug: 213931796
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Link: https://lore.kernel.org/r/20210912125748.2816606-3-leo.yan@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 7ba7ae1d5a)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I82e4ac325242429cfdc3da67e312c7b2e0cd8f3e
2022-01-24 12:14:57 -08:00
Leo Yan
cbc6a844a9 UPSTREAM: coresight: tmc-etr: Use perf_output_handle::head for AUX ring buffer
When enable the Arm CoreSight PMU event, the context for AUX ring buffer
is prepared in the structure perf_output_handle, and its field "head"
points the head of the AUX ring buffer and it is updated after filling
AUX trace data into buffer.

Current code uses an extra field etr_perf_buffer::head to maintain the
header for the AUX ring buffer which is not necessary; alternatively,
it's better to directly use perf_output_handle::head.

This patch removes the field etr_perf_buffer::head and directly uses
perf_output_handle::head for the head of AUX ring buffer.

Bug: 213931796
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210912125748.2816606-2-leo.yan@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit f36dec8da1)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: Ib5fee976b5092936da029bee419ccc6b02e9407c
2022-01-24 12:14:57 -08:00
Leo Yan
39004ed160 UPSTREAM: coresight: tmc-etf: Add comment for store ordering
Since the function CS_LOCK() has contained memory barrier mb(), it
ensures the visibility of the AUX trace data before updating the
aux_head, thus it's needless to add any explicit barrier anymore.

Add comment to make clear for the barrier usage for ETF.

Bug: 213931796
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Link: https://lore.kernel.org/r/20210809111407.596077-4-leo.yan@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit bd8d06886d)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I3310ebe17bd064d77789d4cd8afcd7d1b12eb00e
2022-01-24 12:14:57 -08:00
Leo Yan
2db35c7c14 UPSTREAM: coresight: tmc-etr: Add barrier after updating AUX ring buffer
Since a memory barrier is required between AUX trace data store and
aux_head store, and the AUX trace data is filled with memcpy(), it's
sufficient to use smp_wmb() so can ensure the trace data is visible
prior to updating aux_head.

Bug: 213931796
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210809111407.596077-3-leo.yan@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 26701ceb4c)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I9b3382483074d12ebbcbbdb66fa9913e47518b1d
2022-01-24 12:14:57 -08:00
Tanmay Jagdale
0aaa0f0c16 UPSTREAM: coresight: tmc: Configure AXI write burst size
The current driver sets the write burst size initiated by TMC-ETR on
AXI bus to a fixed value of 16. Make this configurable by reading the
value specified in fwnode. If not specified, then default to 16.

Introduced a "max_burst_size" variable in tmc_drvdata structure to
facilitate this change.

Bug: 213931796
Signed-off-by: Tanmay Jagdale <tanmay@marvell.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20210901131049.1365367-3-tanmay@marvell.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 4d5d88baa6)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I9ad7306daa557e5afa4e9680485bff60fe7ec239
2022-01-24 12:14:57 -08:00
Brian Norris
7715954deb UPSTREAM: coresight: cpu-debug: Control default behavior via Kconfig
Debugfs is nice and so are module parameters, but
 * debugfs doesn't take effect early (e.g., if drivers are locking up
   before user space gets anywhere)
 * module parameters either add a lot to the kernel command line, or
   else take effect late as well (if you build =m and configure in
   /etc/modprobe.d/)

So in the same spirit as these
  CONFIG_PANIC_ON_OOPS (also available via cmdline or modparam)
  CONFIG_INTEL_IOMMU_DEFAULT_ON (also available via cmdline)
add a new Kconfig option.

Module parameters and debugfs can still override.

Bug: 213931796
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
[Fixed missing double quote in Kconfig title]
Link: https://lore.kernel.org/r/20210903182839.1.I20856983f2841b78936134dcf9cdf6ecafe632b9@changeid
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit 204879e699)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I135172e06c96701d7ed0d928d92974fd85039243
2022-01-24 12:14:57 -08:00
Stephen Dickey
1050e6e021 ANDROID: sched: core: hook for get_nohz_timer_target
Allow module to control behavior of get_nohz_timer_target.

Bug: 205164003
Change-Id: I38cb201ebf06db7bbce0d6cb68dbbe3729355be8
Signed-off-by: Stephen Dickey <quic_dickey@quicinc.com>
2022-01-24 19:25:26 +00:00
Stephen Dickey
a243208877 ANDROID: kernel: sched: tracehook for is_cpu_allowed
To support the replacement of pause, is_cpu_allowed is the best
place to hook into the code to restrict CPUs for a module based
implementation. This restricts select_fallback_rq, select_task_rq,
and __migate_task, to ensure the cpu is allowed.

Include a hook in is_cpu_allowed to allow the module to control
which cpu is allowed during a migration event.

Bug: 205164003
Change-Id: I665e4d39318079bdb99bd248969ecb9eb528f9df
Signed-off-by: Stephen Dickey <quic_dickey@quicinc.com>
2022-01-24 19:25:13 +00:00
Stephen Dickey
50f5345c87 ANDROID: __migrate_task header
__migrate_task is used by modules to move tasks between cpus.
This function is needed by modules and is currently exported,
allowing it to be used.

As part of this, there was a change so this is no longer static.
This causes a warning, due to a missed extern available in the
scheduler header file.

Correct the issue to cleanup the warning, and properly reference
__migrate_task through the appropriate header file.

Bug: 205164003
Change-Id: Ifb194108cec34467315f43858ebeae428b2e34f0
Signed-off-by: Stephen Dickey <quic_dickey@quicinc.com>
2022-01-24 18:28:23 +00:00
Will McVicker
5d83118dbf ANDROID: GKI: update the pixel symbol list
The list is updated based on the branch "aosp/android13-gs-raviole-5.15".
The only new symbols (not in any symbol list) are:

 * __rt_mutex_init
 * __wake_up_sync
 * bpf_trace_run11

Bug: 215745244
Signed-off-by: Will McVicker <willmcvicker@google.com>
Change-Id: I42f939b467fc3e544ed5c9cb4c3568b1b3d3c8a8
2022-01-24 17:03:15 +00:00
Marc Zyngier
bb60015aac FROMGIT: KVM: arm64: Use shadow SPSR_EL1 when injecting exceptions on !VHE
Injecting an exception into a guest with non-VHE is risky business.
Instead of writing in the shadow register for the switch code to
restore it, we override the CPU register instead. Which gets
overriden a few instructions later by said restore code.

The result is that although the guest correctly gets the exception,
it will return to the original context in some random state,
depending on what was there the first place... Boo.

Fix the issue by writing to the shadow register. The original code
is absolutely fine on VHE, as the state is already loaded, and writing
to the shadow register in that case would actually be a bug.

Fixes: bb666c472c ("KVM: arm64: Inject AArch64 exceptions from HYP")
Cc: stable@vger.kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Fuad Tabba <tabba@google.com>
Link: https://lore.kernel.org/r/20220121184207.423426-1-maz@kernel.org
(cherry picked from commit 278583055a
 git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git fixes)
Bug: 209777660
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: Ifc1504c4be69e36a0a70033b36ee148c337ac7b5
2022-01-24 13:41:27 +00:00
Marc Zyngier
180087cfb4 FROMGIT: KVM: arm64: vgic-v3: Restrict SEIS workaround to known broken systems
Contrary to what df652bcf11 ("KVM: arm64: vgic-v3: Work around GICv3
locally generated SErrors") was asserting, there is at least one other
system out there (Cavium ThunderX2) implementing SEIS, and not in
an obviously broken way.

So instead of imposing the M1 workaround on an innocent bystander,
let's limit it to the two known broken Apple implementations.

Fixes: df652bcf11 ("KVM: arm64: vgic-v3: Work around GICv3 locally generated SErrors")
Reported-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220122103912.795026-1-maz@kernel.org
(cherry picked from commit d11a327ed9
 git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git fixes)
Bug: 209777660
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: I4c1b8faab30744f81b012e03b31cdd8254614f87
2022-01-24 13:41:27 +00:00
Marc Zyngier
6cb32aeea6 FROMGIT: KVM: arm64: pkvm: Use the mm_ops indirection for cache maintenance
CMOs issued from EL2 cannot directly use the kernel helpers,
as EL2 doesn't have a mapping of the guest pages. Oops.

Instead, use the mm_ops indirection to use helpers that will
perform a mapping at EL2 and allow the CMO to be effective.

Fixes: 25aa28691b ("KVM: arm64: Move guest CMOs to the fault handlers")
Reviewed-by: Quentin Perret <qperret@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220114125038.1336965-1-maz@kernel.org
(cherry picked from commit 094d00f8ca
 git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git fixes)
Bug: 209777660
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: Id020c5adb0ce0d02bc6cd344e7d01859539b9f4f
2022-01-24 13:41:27 +00:00
Will Deacon
9cc414ef88 Revert "FROMLIST: KVM: arm64: pkvm: Use the mm_ops indirection for cache maintenance"
This reverts commit d94a14c7f2.

The corresponding patch has been queued in the kvmarm tree as a fix for
5.17, so revert our FROMLIST version in preparation for pulling in the
upstream queue instead.

Bug: 209777660
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: I7f65941b2b13125c6c6397590abbc3e18cb54496
2022-01-24 13:41:27 +00:00
Marc Zyngier
4132be368b ANDROID: KVM: arm64: pkvm: Force injection of a data abort on NISV MMIO exit
If a vcpu exits for a data abort with an invalid syndrome, the
expectations are that userspace has a chance to save the day if
it has requested to see such exits.

However, this is completely futile in the case of a protected VM,
as none of the state is available. In this particular case, inject
a data abort directly into the vcpu, consistent with what userspace
could do.

This also helps with pKVM, which discards all syndrome information when
forwarding data aborts that are not known to be MMIO.

Finally, hide the RETURN_NISV_IO_ABORT_TO_USER cap from userspace on
protected VMs, and document this tweak to the API.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Bug: 209580772
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: I4090c7c266b27776089cac69efd489264ed003cf
2022-01-24 10:36:14 +00:00
Fuad Tabba
93b08c26e7 ANDROID: KVM: arm64: Fix vcpu sys_reg accessors when running with VHE
Commit 36a84952bc ("ANDROID: KVM: arm64: refactor vcpu_read_sys_reg
and vcpu_write_sys_reg for hyp use") predicated direct access to the
live vCPU registers on an is_vhe_hyp_code() check, neglecting the fact
that these functions are also used by the VHE *kernel* code.

Restore the old behaviour by changing the check so that only the nVHE
hyp code unconditionally uses the 'ctxt_sys_reg' table.

Reported-by: Marc Zyngier <mzyngier@google.com>
Signed-off-by: Fuad Tabba <tabba@google.com>
Bug: 209580772
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: I17d4c12ffdbbd95e8e8d1820ebb6438b138361aa
2022-01-24 10:36:14 +00:00
Will Deacon
aebaed988e ANDROID: KVM: arm64: Support TLB invalidation in guest context
Typically, TLB invalidation of guest stage-2 mappings using nVHE is
performed by a hypercall originating from the host. For the invalidation
instruction to be effective, therefore, __tlb_switch_to_{guest,host}()
swizzle the active stage-2 context around the TLBI instruction.

With guest-to-host memory sharing and unsharing hypercalls originating
from the guest under pKVM, there is now a need to support both guest
and host VMID invalidations issued from guest context.

Replace the __tlb_switch_to_{guest,host}() functions with a more general
{enter,exit}_vmid_context() implementation which supports being invoked
from guest context and acts as a no-op if the target context matches the
running context.

Bug: 209580772
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: I259b1acd11f25143080af2deaab820746090436d
2022-01-24 10:36:14 +00:00
Will Deacon
6b08ae02c5 Revert "ANDROID: KVM: arm64: Avoid switching to guest context if guest is already loaded"
This reverts commit ecf2308ee8.

If the guest issues a 'memunshare' hypercall, then we will attempt to
switch to the host context using __tlb_switch_to_guest() when invalidating
the previously shared mapping in the host stage-2 page-table. This results
in a fatal WARN_ON():

  | kvm [346]: nVHE hyp BUG at: ffff800010dfa86c!
  | kvm [346]: Hyp Offset: 0xfffecb8c68d20000
  | Kernel panic - not syncing: HYP panic:
  | PS:200003c9 PC:0000b473a80da86c ESR:f2000800
  | FAR:00000000000003f8 HPFAR:0000000000000000 PAR:0000000000000000
  | VCPU:0000b472c4a3d380
  | CPU: 3 PID: 346 Comm: crosvm_vcpu0 Not tainted 5.10.92-00347-g6d54ce01086a #1
  | Hardware name: QEMU QEMU Virtual Machine, BIOS 0.0.0 02/06/2015
  | Call trace:
  |  dump_backtrace+0x0/0x1a0
  |  show_stack+0x18/0x68
  |  dump_stack_lvl+0xcc/0xf4
  |  dump_stack+0x18/0x58
  |  panic+0x16c/0x334
  |  arm64_kernel_unmapped_at_el0+0x0/0x34
  |  kvm_arch_vcpu_ioctl_run+0x170/0x740
  |  kvm_vcpu_ioctl+0x310/0x9e8
  |  __arm64_sys_ioctl+0xa8/0xf0
  |  el0_svc_common.constprop.0+0x74/0x1b8
  |  do_el0_svc+0x24/0x90
  |  el0_svc+0x14/0x20
  |  el0_sync_handler+0xb0/0xb8
  |  el0_sync+0x1a0/0x1c0
  | SMP: stopping secondary CPUs
  | Kernel Offset: 0x20125c0e0000 from 0xffff800010000000
  | PHYS_OFFSET: 0xffffaf7640000000
  | CPU features: 0x000,10240022,61806008
  | Memory Limit: none
  | ---[ end Kernel panic - not syncing: HYP panic:
  | PS:200003c9 PC:0000b473a80da86c ESR:f2000800
  | FAR:00000000000003f8 HPFAR:0000000000000000 PAR:0000000000000000
  | VCPU:0000b472c4a3d380 ]---

Revert the change introducing the WARN_ON() for now, as we'll fix this
properly in a subsequent patch.

Bug: 209580772
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: If8f9901e1c9a36ede412bbf1b7ab4aa381e12424
2022-01-24 10:36:14 +00:00
Eric Biggers
0c339121fc ANDROID: f2fs: fix fscrypt direct I/O support
The upstream change to make f2fs use iomap for direct I/O was backported
to this kernel branch, which broke the out-of-tree support for fscrypt
direct I/O because f2fs_iomap_begin() isn't aware of encryption.  Make
the needed change to f2fs_iomap_begin(), matching what I've proposed
upstream at
https://lore.kernel.org/r/20220120071215.123274-5-ebiggers@kernel.org.

Also drop the fscrypt support from fs/direct-io.c, which is no longer
used since both ext4 and f2fs now use iomap for direct I/O.

Bug: 162255927
Bug: 215554521
Fixes: 9ce2897801 ("Merge remote-tracking branch 'aosp/upstream-f2fs-stable-linux-5.15.y' into android13-5.15")
Change-Id: I6b99b623ad3b8a86099c260787b2086b415a0e12
Signed-off-by: Eric Biggers <ebiggers@google.com>
2022-01-21 15:54:42 +00:00
Alistair Delva
f5ea50a85b ANDROID: GKI: update virtual_device symbol list
DRM core symbols needed by pl111 driver.

Bug: 203030890
Change-Id: I2d33e9426e607d85b54de794cdd3f0a097a3421f
Signed-off-by: Alistair Delva <adelva@google.com>
2022-01-21 15:48:38 +00:00
Greg Kroah-Hartman
16ea584702 Merge 5.15.16 into android13-5.15
Changes in 5.15.16
	devtmpfs regression fix: reconfigure on each mount
	drm/amd/display: explicitly set is_dsc_supported to false before use
	orangefs: Fix the size of a memory allocation in orangefs_bufmap_alloc()
	remoteproc: qcom: pil_info: Don't memcpy_toio more than is provided
	vfs: fs_context: fix up param length parsing in legacy_parse_param
	perf: Protect perf_guest_cbs with RCU
	KVM: x86: Register perf callbacks after calling vendor's hardware_setup()
	KVM: x86: Register Processor Trace interrupt hook iff PT enabled in guest
	KVM: x86: don't print when fail to read/write pv eoi memory
	KVM: s390: Clarify SIGP orders versus STOP/RESTART
	remoteproc: qcom: pas: Add missing power-domain "mxc" for CDSP
	9p: only copy valid iattrs in 9P2000.L setattr implementation
	video: vga16fb: Only probe for EGA and VGA 16 color graphic cards
	media: uvcvideo: fix division by zero at stream start
	rtlwifi: rtl8192cu: Fix WARNING when calling local_irq_restore() with interrupts enabled
	firmware: qemu_fw_cfg: fix sysfs information leak
	firmware: qemu_fw_cfg: fix NULL-pointer deref on duplicate entries
	firmware: qemu_fw_cfg: fix kobject leak in probe error path
	perf annotate: Avoid TUI crash when navigating in the annotation of recursive functions
	KVM: x86: remove PMU FIXED_CTR3 from msrs_to_save_all
	ALSA: hda/realtek: Add speaker fixup for some Yoga 15ITL5 devices
	ALSA: hda/realtek: Use ALC285_FIXUP_HP_GPIO_LED on another HP laptop
	ALSA: hda/realtek - Fix silent output on Gigabyte X570 Aorus Master after reboot from Windows
	ALSA: hda: ALC287: Add Lenovo IdeaPad Slim 9i 14ITL5 speaker quirk
	ALSA: hda/tegra: Fix Tegra194 HDA reset failure
	ALSA: hda/realtek: Add quirk for Legion Y9000X 2020
	ALSA: hda/realtek: Re-order quirk entries for Lenovo
	mtd: fixup CFI on ixp4xx
	Linux 5.15.16

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I7b58cca52113c774bd78b2d231378bde8258f757
2022-01-21 08:36:28 +01:00
David Brazdil
31641032ce ANDROID: GKI: update virtual device symbol list
Add symbols needed by the newly added open-dice.ko.

Bug: 198197082
Signed-off-by: David Brazdil <dbrazdil@google.com>
Change-Id: I035ad09985d216151fb84df104bc90b8db32bbcf
2022-01-20 17:19:00 +00:00
Greg Kroah-Hartman
63dcc38866 Linux 5.15.16
Link: https://lore.kernel.org/r/20220118160451.879092022@linuxfoundation.org
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Shuah Khan <skhan@linuxfoundation.org>
Tested-by: Ron Economos <re@w6rz.net>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:16 +01:00
Arnd Bergmann
ce2e7b97e5 mtd: fixup CFI on ixp4xx
commit 603362b4a5 upstream.

drivers/mtd/maps/ixp4xx.c requires MTD_CFI_BE_BYTE_SWAP to be set
in order to compile.

drivers/mtd/maps/ixp4xx.c:57:4: error: #error CONFIG_MTD_CFI_BE_BYTE_SWAP required

This patch avoids the #error output by enforcing the policy in
Kconfig. Not sure if this is the right approach, but it helps doing
randconfig builds.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210927141045.1597593-1-arnd@kernel.org
Cc: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:16 +01:00
Takashi Iwai
9dada19e10 ALSA: hda/realtek: Re-order quirk entries for Lenovo
commit 2aac550da3 upstream.

The recent few quirk entries for Lenovo haven't been put in the right
order.  Let's arrange the table again.

Fixes: ad7cc2d41b ("ALSA: hda/realtek: Quirks to enable speaker output...")
Fixes: 6dc8697622 ("ALSA: hda/realtek: Add speaker fixup for some Yoga 15ITL5 devices")
Fixes: 8f4c90427a ("ALSA: hda/realtek: Add quirk for Legion Y9000X 2020")
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:16 +01:00
Baole Fang
4942295ec2 ALSA: hda/realtek: Add quirk for Legion Y9000X 2020
commit 8f4c90427a upstream.

Legion Y9000X 2020 has a speaker, but the speaker doesn't work.
This can be fixed by applying alc285_fixup_ideapad_s740_coef
to fix the speaker's coefficients.
Besides, to support the transition between the speaker and the headphone,
alc287_fixup_legion_15imhg05_speakers needs to be run.

Signed-off-by: Baole Fang <fbl718@163.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20220105140856.4855-1-fbl718@163.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:16 +01:00
Sameer Pujar
f76d5f9391 ALSA: hda/tegra: Fix Tegra194 HDA reset failure
commit d278dc9151 upstream.

HDA regression is recently reported on Tegra194 based platforms.
This happens because "hda2codec_2x" reset does not really exist
in Tegra194 and it causes probe failure. All the HDA based audio
tests fail at the moment. This underlying issue is exposed by
commit c045ceb5a1 ("reset: tegra-bpmp: Handle errors in BPMP
response") which now checks return code of BPMP command response.
Fix this issue by skipping unavailable reset on Tegra194.

Cc: stable@vger.kernel.org
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/1640260431-11613-2-git-send-email-spujar@nvidia.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:16 +01:00
Bart Kroon
7c452ca7bc ALSA: hda: ALC287: Add Lenovo IdeaPad Slim 9i 14ITL5 speaker quirk
commit b81e9e5c72 upstream.

The speaker fixup that is used for the Yoga 7 14ITL5 also applies to
the IdeaPad Slim 9i 14ITL5. The attached patch applies the quirk to
initialise the amplifier on the IdeaPad Slim 9i as well.

This is validated to work on my laptop.

[ corrected the quirk entry position by tiwai ]

Signed-off-by: Bart Kroon <bart@tarmack.eu>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/JAG24R.7NLJGWBF4G8U@tarmack.eu
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:16 +01:00
Christian Lachner
8b046b2a63 ALSA: hda/realtek - Fix silent output on Gigabyte X570 Aorus Master after reboot from Windows
commit c193300867 upstream.

This patch addresses an issue where after rebooting from Windows into Linux
there would be no audio output.

It turns out that the Realtek Audio driver on Windows changes some coeffs
which are not being reset/reinitialized when rebooting the machine. As a
result, there is no audio output until these coeffs are being reset to
their initial state. This patch takes care of that by setting known-good
(initial) values to the coeffs.

We initially relied upon alc1220_fixup_clevo_p950() to fix some pins in the
connection list. However, it also sets coef 0x7 which does not need to be
touched. Furthermore, to prevent mixing device-specific quirks I introduced
a new alc1220_fixup_gb_x570() which is heavily based on
alc1220_fixup_clevo_p950() but does not set coeff 0x7 and fixes the coeffs
that are actually needed instead.

This new alc1220_fixup_gb_x570() is believed to also work for other boards,
like the Gigabyte X570 Aorus Extreme and the newer Gigabyte Aorus X570S
Master. However, as there is no way for me to test these I initially only
enable this new behaviour for the mainboard I have which is the Gigabyte
X570(non-S) Aorus Master.

I tested this patch on the 5.15 branch as well as on master and it is
working well for me.

BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=205275
Signed-off-by: Christian Lachner <gladiac@gmail.com>
Fixes: 0d45e86d22 ("ALSA: hda/realtek - Fix silent output on Gigabyte X570 Aorus Master")
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20220103140517.30273-2-gladiac@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:15 +01:00
Kai-Heng Feng
5b57c0efec ALSA: hda/realtek: Use ALC285_FIXUP_HP_GPIO_LED on another HP laptop
commit 08977fe8cf upstream.

The audio mute and mic mute LEDs don't work, so use the quirk to make
them work.

Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20211224035015.310068-1-kai.heng.feng@canonical.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:15 +01:00
Arie Geiger
c104edbb5a ALSA: hda/realtek: Add speaker fixup for some Yoga 15ITL5 devices
commit 6dc8697622 upstream.

This patch adds another possible subsystem ID for the ALC287 used by
the Lenovo Yoga 15ITL5.
It uses the same initalization as the others.
This patch has been tested and works for my device.

Signed-off-by: Arie Geiger <arsgeiger@gmail.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20211223232857.30741-1-arsgeiger@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:15 +01:00
Wei Wang
3a1e480697 KVM: x86: remove PMU FIXED_CTR3 from msrs_to_save_all
commit 9fb12fe5b9 upstream.

The fixed counter 3 is used for the Topdown metrics, which hasn't been
enabled for KVM guests. Userspace accessing to it will fail as it's not
included in get_fixed_pmc(). This breaks KVM selftests on ICX+ machines,
which have this counter.

To reproduce it on ICX+ machines, ./state_test reports:
==== Test Assertion Failure ====
lib/x86_64/processor.c:1078: r == nmsrs
pid=4564 tid=4564 - Argument list too long
1  0x000000000040b1b9: vcpu_save_state at processor.c:1077
2  0x0000000000402478: main at state_test.c:209 (discriminator 6)
3  0x00007fbe21ed5f92: ?? ??:0
4  0x000000000040264d: _start at ??:?
 Unexpected result from KVM_GET_MSRS, r: 17 (failed MSR was 0x30c)

With this patch, it works well.

Signed-off-by: Wei Wang <wei.w.wang@intel.com>
Message-Id: <20211217124934.32893-1-wei.w.wang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Fixes: e2ada66ec4 ("kvm: x86: Add Intel PMU MSRs to msrs_to_save[]")
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:15 +01:00
Dario Petrillo
adf791cf90 perf annotate: Avoid TUI crash when navigating in the annotation of recursive functions
commit d5962fb7d6 upstream.

In 'perf report', entering a recursive function from inside of itself
(either directly of indirectly through some other function) results in
calling symbol__annotate2 multiple() times, and freeing the whole
disassembly when exiting from the innermost instance.

The first issue causes the function's disassembly to be duplicated, and
the latter a heap use-after-free (and crash) when trying to access the
disassembly again.

I reproduced the bug on perf 5.11.22 (Ubuntu 20.04.3 LTS) and 5.16.rc8
with the following testcase (compile with gcc recursive.c -o recursive).
To reproduce:

- perf record ./recursive
- perf report
- enter fibonacci and annotate it
- move the cursor on one of the "callq fibonacci" instructions and press enter
  - at this point there will be two copies of the function in the disassembly
- go back by pressing q, and perf will crash

  #include <stdio.h>

  int fibonacci(int n)
  {
      if(n <= 2) return 1;
      return fibonacci(n-1) + fibonacci(n-2);
  }

  int main()
  {
      printf("%d\n", fibonacci(40));
  }

This patch addresses the issue by annotating a function and freeing the
associated memory on exit only if no annotation is already present, so
that a recursive function is only annotated on entry.

Signed-off-by: Dario Petrillo <dario.pk1@gmail.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: stable@kernel.org
Link: http://lore.kernel.org/lkml/20220109234441.325106-1-dario.pk1@gmail.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:15 +01:00
Johan Hovold
8840daa2f6 firmware: qemu_fw_cfg: fix kobject leak in probe error path
commit 47a1db8e79 upstream.

An initialised kobject must be freed using kobject_put() to avoid
leaking associated resources (e.g. the object name).

Commit fe3c606843 ("firmware: Fix a reference count leak.") "fixed"
the leak in the first error path of the file registration helper but
left the second one unchanged. This "fix" would however result in a NULL
pointer dereference due to the release function also removing the never
added entry from the fw_cfg_entry_cache list. This has now been
addressed.

Fix the remaining kobject leak by restoring the common error path and
adding the missing kobject_put().

Fixes: 75f3e8e47f ("firmware: introduce sysfs driver for QEMU's fw_cfg device")
Cc: stable@vger.kernel.org      # 4.6
Cc: Gabriel Somlo <somlo@cmu.edu>
Signed-off-by: Johan Hovold <johan@kernel.org>
Link: https://lore.kernel.org/r/20211201132528.30025-3-johan@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-20 09:13:15 +01:00