Rootcause:
When hw detect there are more than eight rolling subtitles, it will
trigger a osd max irq but it still running, and that interruption make
the software takes for frame done and disable the clock gate, finally hw
hang when it access the bus.
Solution:
Ignore OSD MAX irq, clean and wait for frame done.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I660cefa013fe1419f7566b984556ea3450fe28e5
Odd dsp_w pixel of Esmart/Smart will trigger scale down error.
Change-Id: Ie0fc620043270a387eed69aba8adf200a0d67f24
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
After power lost, spinand may work in a unkonw state and result in
bit flip, including:
1.Write to cache invalid and dirty cache data write to page's array
which result in node CRC error for some pages.
2.One page write fail but the next page write success result in
empty space corruption.
Change-Id: I212c237202b32de0217efc8dd5a4e84174953a3f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Add spinand power lost situation protection to avoid
abnormal data written to flash array(recheck 1) or
just reduce error behavior(recheck 2)
Change-Id: Ic445fd09fd407c225b47310d666b39f095fcfb17
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Set SYS_STATUS_DUALVIEW when there are more than one
active video ports.
Change-Id: I7d04f74427f710eef8cd7087b09ebd528587e002
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
The DDR freq should be fixed in dual display mode.
Change-Id: I2383d415f93a52366f762e9480b54451a75f1ad5
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Register gpd_dev_ops.active_wakeup function to support keep power
during suspend state. And add flag to each power domain to
decide whether keep power during suspend or not.
Change-Id: I0ba0985ed2ee976885005c87fcba4c7b910cbb05
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Register gpd_dev_ops.active_wakeup function to support keep power
during suspend state. And add flag to each power domain to
decide whether keep power during suspend or not.
Change-Id: Ib9f609b851f2eaf1ccca8eb687e232727e989d5c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
The APLL_CFG3/DDAC_SR_LMT0/DTOP_DIGEN_CLKE should be
correct with different sample rates and clock.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: I766879750e640ef8ab31c2ab6776fe96ac65e063
If the OTG work in Host mode, delay power off phy in OTG_STATE_B_IDLE
state when unplug OTG cable, this can fix the xHCI deregistered error
with the following log on RK356x platforms:
[ 16.856295] xhci-hcd xhci-hcd.5.auto: remove, state 4
[ 16.856340] usb usb8: USB disconnect, device number 1
[ 16.857778] xhci-hcd xhci-hcd.5.auto: USB bus 8 deregistered
[ 16.858108] xhci-hcd xhci-hcd.5.auto: remove, state 4
[ 16.858146] usb usb7: USB disconnect, device number 1
[ 16.878109] xhci-hcd xhci-hcd.5.auto: Host halt failed, -110
[ 16.878151] xhci-hcd xhci-hcd.5.auto: Host controller not halted, aborting reset.
[ 16.878853] xhci-hcd xhci-hcd.5.auto: USB bus 7 deregistered
Change-Id: I4467afdd3fe20839a9ec967624868ce3773e048c
Signed-off-by: William Wu <william.wu@rock-chips.com>
This patch sets the bvalid and id filter time to 10ms for rk356x
USB 2.0 PHY0 which is used for OTG. The filter count is base on
the USB 2.0 PHY GRF pclk 100MHz.
With this patch, it can avoid trigger the bvalid rising edge irq
when unplug the OTG cable.
Change-Id: I95794510921e6c065f4ec1102ab6c1f35994bf42
Signed-off-by: William Wu <william.wu@rock-chips.com>
Afbc format data must align as 64 pixel when enable xmirror, rotate_90 or
rotate_270, otherwise will display black screen and trigger post buffer empty.
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Change-Id: Ide5c6f667028d188eebf1ae86dcb31c57eb9ebca
To make it possible that the both built-in midgard and bifrost device driver
could be both loaded.
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: I8271a6d817dda3781d70fc69aaaccf3860354b48
rename.h could rename the symbols that have same name in midgard/ and bifrost/,
to make it possible to build in both midgard/ and bifrost/.
Change-Id: Ibca4e2beca8a4d8ea28f712a3e219cb2a403c7e2
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
When ddc-i2c-bus property is used, a NULL pointer dereference is reported:
[ 31.041669] Unable to handle kernel NULL pointer dereference at virtual address 00000008
[ 31.041671] pgd = 4d3c16f6
[ 31.041673] [00000008] *pgd=00000000
[ 31.041678] Internal error: Oops: 5 [#1] SMP ARM
[ 31.041711] Hardware name: Rockchip (Device Tree)
[ 31.041718] PC is at i2c_transfer+0x8/0xe4
[ 31.041721] LR is at drm_scdc_read+0x54/0x84
[ 31.041723] pc : [<c073273c>] lr : [<c05926c4>] psr: 280f0013
[ 31.041725] sp : edffdad0 ip : 5ccb5511 fp : 00000058
[ 31.041727] r10: 00000780 r9 : edf91608 r8 : c11b0f48
[ 31.041728] r7 : 00000438 r6 : 00000000 r5 : 00000000 r4 : 00000000
[ 31.041730] r3 : edffdae7 r2 : 00000002 r1 : edffdaec r0 : 00000000
[ 31.041908] [<c073273c>] (i2c_transfer) from [<c05926c4>] (drm_scdc_read+0x54/0x84)
[ 31.041913] [<c05926c4>] (drm_scdc_read) from [<c0592858>] (drm_scdc_set_scrambling+0x30/0xbc)
[ 31.041919] [<c0592858>] (drm_scdc_set_scrambling) from [<c05cc0f4>] (dw_hdmi_update_power+0x1440/0x1610)
[ 31.041926] [<c05cc0f4>] (dw_hdmi_update_power) from [<c05cc574>] (dw_hdmi_bridge_enable+0x2c/0x70)
[ 31.041932] [<c05cc574>] (dw_hdmi_bridge_enable) from [<c05aed48>] (drm_bridge_enable+0x24/0x34)
[ 31.041938] [<c05aed48>] (drm_bridge_enable) from [<c0591060>] (drm_atomic_helper_commit_modeset_enables+0x114/0x220)
[ 31.041943] [<c0591060>] (drm_atomic_helper_commit_modeset_enables) from [<c05c3fe0>] (rockchip_atomic_helper_commit_tail_rpm+0x28/0x64)
hdmi->i2c may not be set when ddc-i2c-bus property is used in device tree.
Fix this by using hdmi->ddc as the i2c adapter when calling drm_scdc_*().
Also report that SCDC is not supported when there is no DDC bus.
Fixes: 264fce6cc2 ("drm/bridge: dw-hdmi: Add SCDC and TMDS Scrambling support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/VE1PR03MB59031814B5BCAB2152923BDAAC210@VE1PR03MB5903.eurprd03.prod.outlook.com
Change-Id: I5b2cbb57848e51bcba5266a40f4bd509e0cba3bb
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
tips:
in rk3328, avsd and vdpu share the same interrupt number,
so, when each one hardware done, avsd and vdpu irq will response.
this is a normal log when meet the case.
Change-Id: I9fea220a64d7310805194d9f71c24db0cef1491e
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
According to test, 1/4 frame will cost a wait for 4ms, 1/8 frame
cost a wait for 1~2ms, I think 1~2ms is enough for a config done
write.
Change-Id: I6ba46a8a2cb97434998376e85e5b5fc7a53a9616
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
When system boot with boot logo on, drm_crtc_atomit_enable
won't be called, so vcstate->vdisplay can't be initialized.
So we get vdisplay/vtotatal by crtc.state->adjusted_mode.
Fixes: bd11b0fed8 ("drm/rockchip: vop2: wait for frame start by vcnt")
Change-Id: I39a1d62095347fe6e5d3c48ff7b1e08a20366f9c
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
This make cpu can dump fb data allocated by ION.
Change-Id: I639e7cbbe6957d2bb02e4577805343cdbf5f5bf7
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Imitate the behaviors of drm_gem_map_detach() and drm_gem_map_dma_buf().
Graphics performance of rk3399 device using ion without this modification,
was quite poor.
Change-Id: Ia0b8e2f3026a61ee4addee9c1715291886fa1c99
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
