Commit Graph

1064806 Commits

Author SHA1 Message Date
Andy Yan
f2b2283cd0 drm/rockchip: vop2: Support set dclk parent
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Iaeab80e58a9dd89efb1e5482a2edee65885fd1df
2022-01-15 19:53:03 +08:00
Algea Cao
af7b773991 drm/rockchip: dw_hdmi: Set hdmi output same color format in HDR and non-HDR modes
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I8209f1536b6bbd385ee629c7cd62d55183c3c0b6
2022-01-15 19:48:17 +08:00
Algea Cao
c2af125780 drm/rockchip: dw_hdmi: set rk3588 hdmi grf reg after phy power on
RK3588 dclk is required to access hdmi grf register.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ia7a2f2ab18d8734696b9493340f206aad0168d4c
2022-01-15 19:48:17 +08:00
Algea Cao
f0a1dc86f2 phy: rockchip-samsung-hdptx-hdmi: Support hdmi phy pll as dclk source
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I14069df19eb35aae6ab5d1a005555d53b31dae8c
2022-01-15 19:45:49 +08:00
Algea Cao
316631f87d arm64: dts: rockchip: rk3588: Support hdmi phy pll as dclk source
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I33ee7bff8a7e2994bf963b2c747e348a30e61237
2022-01-15 19:45:49 +08:00
Damon Ding
f8882d308d drm/rockchip: vop2: fix the core_dclk_div_sel setting
When the display interface is BT656. the register of
core_dclk_div_sel should always be set 1. Not only 'i'
modes like 480i and 576i, but also 'p' modes like 720p,
both need this setting.

As for BT1120 and other interfaces, this bit should be
1 when display mode belongs to 'i', and 0 when display
mode belongs to 'p'.

Only RK3568 has the core_dclk_div_sel control bit, which
has been removed on RK3588.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: If67614bc5068024d602c6acbbe9676d6245fdf1a
2022-01-15 19:29:27 +08:00
shengfei Xu
2a50bdd537 arm64: dts: rockchip: rk3588-rk806: enable pwrkey node for uboot
the uboot rk8xx_pwrkey driver requires the pwrkey node to be configured
to okay status.

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I7892fd5c845cfe870d731b3d92b5a501baac732a
2022-01-15 18:28:18 +08:00
Ding Wei
db7cef2b18 video: rockchip: mpp: rkvdec2: Disable irq when soft ccu reset
1. it is not need save qos when resetting.
2. In the ccu mode, force core idle is an asynchronous operation.
while the core may still be working and will report irq.
However, since it is currently a reset operation, IRQ can directly
disabled without processing.

Change-Id: I2b32f1fdaf77ecf244ae15fdf22341f55b7f3ffc
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2022-01-14 17:57:16 +08:00
Sandy Huang
a8e0df34e1 drm/rockchip: vop2: add support 8k hdr10
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie78b3b359ff91455c74d92c390b08871037ef4ba
2022-01-14 16:41:01 +08:00
Sandy Huang
88a93f0e96 drm/rockchip: vop2: set rg swap for rk3588 hdmi/dp yuv444 output
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I9616ceb1392ec76bb75c4eb7f9482e3616f40921
2022-01-14 16:40:49 +08:00
Andy Yan
82561b09c1 drm/rockchip: vop2: Keep dclk:v_pixclk ratio fixed for HDMI on rk3588
Keep dclk:v_pixclk = 1:1 for HDMI RGB/YUV444.
Keep dclk:v_pixclk = 1:2 for HDMI YUV420.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I54bf735be6c1ad2bfa976cbbeb685d5a49a8beeb
2022-01-14 16:26:47 +08:00
Algea Cao
90629f20d9 drm/bridge: synopsys: dw-hdmi-qp: Removed stop sending packet when hdmi disable
This is an ineffective change, and accessing the register after
HDMI disabled will cause system crash.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I0633f83fcdf4abaff1e8f72fe3c9f7845c492a2e
2022-01-14 16:21:11 +08:00
Huang zhibao
7141e52192 arm64: dts: rockchip: rk3588-nvr: delete some opp freq
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I9750564c5e4028fe6cc2f341829205b9fa3679f0
2022-01-14 16:20:43 +08:00
Yu Qiaowei
a800b0e3da video: rockchip: rga3: Fix compile errors
Fix compile dependency on CONFIG_ROCKCHIP_RGA_DEBUGGER.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I79f6efb50144921a9329ab37a8bbdd37838ec212
2022-01-14 16:05:38 +08:00
Yu Qiaowei
076e61175f video: rockchip: rga3: Add error printing for lookup failure
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I146038fb3d3d800f483c7e9eddc6243baa2c43b6
2022-01-14 16:01:34 +08:00
Yu Qiaowei
db0f336d88 video: rockchip: rga3: Add judgment on support core.
Added policy to disable RGA2 when memory larger than 4G.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I5f4d9ee0d77709fbf350123bf16dc42f0b7abbe7
2022-01-14 16:01:26 +08:00
Lin Jinhan
031470058a crypto: rockchip: change hardware crypto driver's priority
Decrease RK_CRYPTO_PRIORITY from 300 to 0.Hardware driver
will only invoked by user layer through the driver name.

Change-Id: Ifeda13a2b9ce6fec6be60a2422b7507f91eedbb5
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2022-01-14 15:51:04 +08:00
Lin Jinhan
77ef9507ad crypto: rockchip: cryptodev_linux: add rk algo support
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I1d1f4214b29546eed2d1c29da8f375ec30a9bac3
2022-01-14 15:51:00 +08:00
Lin Jinhan
0ff0eff24d crypto: rockchip: cryptodev_linux: add rk_cryptodev_ioctl
RIOCCRYPT_FD         : used to support dma_fd crypt.
RIOCCRYPT_FD_MAP     : used to map dma_fd to phys_addr.
RIOCCRYPT_FD_UNMAP   : used to unmap between dma_fd and phys_addr.
RIOCCRYPT_CPU_ACCESS : for cpu access after dma_fd map
RIOCCRYPT_DEV_ACCESS : for DEV access after dma_fd map

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ifa016c0009fde3d6909fb4e2313af341d808f793
2022-01-14 15:40:52 +08:00
Lin Jinhan
d5cea8f2c7 crypto: rockchip: core: register crypto device into rk_cryptodev
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I29364e0b5dd82a227dc74567dc12565e3b97ad1c
2022-01-14 14:56:26 +08:00
Lin Jinhan
f27ce7a700 crypto: rockchip: cryptodev_linux: add rk_cryptodev.c
Add register and unregister for crypto driver.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I406776514374bb460875ce8bd71a3031cd110587
2022-01-14 14:56:13 +08:00
Lin Jinhan
4304feb241 arm64: rockchip_defconfig: enable CONFIG_CRYPTO_DEV_ROCKCHIP_DEV
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ieb4cdbda11c166467f86f1b442043a6c2fc60a35
2022-01-14 14:47:43 +08:00
Tao Huang
e05d2d55e1 crypto: rockchip: cryptodev_linux: rename global func name
Add cryptodev_ prefix.

Replacements are done by the following command:
for i in kcaop_from_user kcaop_to_user adjust_sg_array release_user_pages sg_advance sg_copy; do sed -i "s/$i/cryptodev_$i/g" *.c *.h; done
sed -i -e "s/ get_userbuf(/ cryptodev_get_userbuf(/g" -e "s/ __get_userbuf(/ __cryptodev_get_userbuf(/g" *.c *.h

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I7a3aee655427faffac6baad0e155bd76638ae040
2022-01-13 19:50:25 +08:00
Lin Jinhan
e398bee2a0 crypto: rockchip: add cryptodev_linux driver
provide crypto api to user space, you can open
"/dev/crypto" to use it.

cryptodev-linux source repository:
  https://github.com/cryptodev-linux/cryptodev-linux.git

use commit 356a45e63bbce94b9cea73b8c1e20d0d8ec02f04
  Author: cristian-stoica <cristianmarian.stoica@nxp.com>
  Date:   Thu Nov 11 09:30:19 2021 +0200

Change-Id: I91ca3660060f4adcf531e3efb8e720308bbd9f0e
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2022-01-13 19:49:38 +08:00
Wang Jie
32bf18bcd3 arm64: dts: rockchip: rk3588s-tablet-rk806-single: configured as usb2.0 for Type-C0
The rk3588s bbk tablet Type-C0 hardware design does not
support usb3.0 and dp functions, so it is configured as
usb2.0 and disable usbdp phy to reduce power consumption.

Change-Id: Id69964d18e31a12f240f792ea04e60e1e28d794d
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
2022-01-13 18:26:25 +08:00
Lin Jinhan
c8876aae83 crypto: rockchip: core: add scatterlist from dmafd support
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ie9eed5a785ad027a9c4dd134be904c3064754c09
2022-01-13 15:42:35 +08:00
Lin Jinhan
ca5dd883fe crypto: rockchip: core: add CRYPTO_ALG_KERN_DRIVER_ONLY for cra_flag
CRYPTO_ALG_KERN_DRIVER_ONLY means the algorithm provided is hardware
 accelerated but not available to userspace via instruction set or so.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ia4265944a058aaaa4aeb7e6f1adc3bd1b8d4af5d
2022-01-13 15:42:10 +08:00
Yu Qiaowei
b8e561206b video: rockchip: rga3: Modify the mapping process of virt_addr in rga_mm
When using RGA2, import buffer will map it to dma.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I1d8d2e35e5d55acefb7825adfbee13a3808213b4
2022-01-13 15:39:23 +08:00
Yu Qiaowei
2a15a22522 video: rockchip: rga3: default flush cache of virt_addr when using RGA3
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I95bacf1948d24c50eb03231de5cea12797d0c0a9
2022-01-13 15:39:23 +08:00
Yu Qiaowei
8913f323ca video: rockchip: rga3: Remove the static of get_scheduler()
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ic1daff651a04493bc460f4532079d02cae94685e
2022-01-13 15:39:23 +08:00
Yu Qiaowei
e8bd611086 video: rockchip: rga3: Avoid unnecessary error printing
When the error caused by software interruption is not printed.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I05e4498391be07bd5381c9cf17dabbe1c827417e
2022-01-13 15:39:23 +08:00
Yu Qiaowei
73a04928cb video: rockchip: rga3: Virt_addr uses the sgt of rga_mm.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I44bdd543b708a3d868896527df7d2745b994fa6f
2022-01-13 15:39:23 +08:00
Yu Qiaowei
cb6eb4a53f video: rockchip: rga3: Support using handle
It will be used by finding the memory corresponding to the handle
in rga_mm.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I6bd09a3641671c69aa903010c0aa4e518cf9b5af
2022-01-13 15:39:23 +08:00
Yu Qiaowei
11b10c87c3 video: rockchip: rga3: rga_mm supports virtual addresses
Support mapping virtual address to sgt and verify whether the memory
is greater than 4G.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Iae958cd1ac408e3d72a184dc9fd92fd41259ea38
2022-01-13 15:39:23 +08:00
Frank Wang
76ad9a5fd2 arm64: dts: rockchip: rk3588: add quirk-skip-phy-init for usb otg0
Adds "quirk-skip-phy-init" property for USB OTG0 on RK3588 SoC that
reject managing the PHY state in HCD core and fix the PHY exit failed
in "usb_phy_roothub_exit()" at PM suspend stage.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I508069f6836921e2f4717aee5f3baedffb9f9add
2022-01-13 15:34:30 +08:00
Frank Wang
a811f07f45 usb: host: xhci: skip phy init quirk can configure in dt
The "skip_phy_initialization" property in usb_hcd structure means
that do not manage the PHY state in the HCD core and handle it by
the controller's driver. This commit adds "quirk-skip-phy-init"
quirk which can configure the property in DT to support it.

For Rockchip DWC3 dual role scheme, we enabled the device wakeup
capability in dwc3 runtime resume that would cause the PHY exit
failed in "usb_phy_roothub_exit()" at PM suspend stage. So this
commit is also a workaround to fix it.

Fixes: f1636eb0fd ("usb: dwc3: fix failed to enter suspend")
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Ibc9885669f25d2aeea18a9d22d49a204eb346ea1
2022-01-13 15:33:47 +08:00
Frank Wang
1a83ca3a08 dt-bindings: usb: xhci: add quirk-skip-phy-init property
Adds "quirk-skip-phy-init" property that can configure in DT to
support skip PHY initialization quirk in HCD core.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Ifd85bbfc5a39a28961e551d2ded5ddb1a904a7f5
2022-01-13 15:33:39 +08:00
Wu Liangqing
9a4fd17a91 rtc: hym8563: fix rtc init time error
Fixes: 815c9a084e ("rtc: hym8563: set init time")
Change-Id: Ic303169494007bc22a374ba11a2b553de22f747b
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2022-01-13 15:27:43 +08:00
William Wu
b50ae2d265 phy: rockchip: inno-usb2: support pipe phystatus sel for otg port
The RK3588 usb3 otg controller connected with one usb2 phy
and one usb3 phy. The usb2 phy used UTMI+ interface, and
the usb3 phy used PIPE interface. The usb3 otg controller
initialization depends on the pipe phystatus which from
usb3 phy by default. If the usb3 phy is disabled, it needs
to select the pipe phystatus from usb grf with the property
"rockchip,sel-pipe-phystatus".

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I5015a18a19c14ccb43530fbae15200c8cb3ab242
2022-01-13 15:16:22 +08:00
William Wu
8811ab7f35 arm64: dts: rockchip: rk3588: add usbctrl-grf for usb otg0/1
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ib49a5cfb4522d02b9744b83347fb2855e92e72fc
2022-01-13 15:15:02 +08:00
William Wu
70474e9633 dt-bindings: phy: rockchip-inno-usb2: add properties for pipe sel
The rk3588 usb otg0/1 controllers depend on the pipe
phystatus which from usb3 phy by default. When the usb3
phy is disabled, it needs to select the pipe phystatus
from usb grf. This patches add new properties to select
pipe phystatus if needed.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I50b6c7ece87913af3152204da60727140d82bc3d
2022-01-13 15:14:43 +08:00
Zhen Chen
c7ac8c9aa3 MALI: bifrost: fix bug that GPU is not powered off after idle
The bug was found in the case of that system suspend process was broken off
for USB ADB being connected.

This fix is provided by Zhigang.Yao@arm.com of support_mali.

Related RK redmine case:
https://redmine.rock-chips.com/issues/334539

Change-Id: I4772ed901a7fe54884a79a53b3ca9f6fd7beed40
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2022-01-13 15:12:48 +08:00
Shawn Lin
47af17528d PCI: rockchip: dw: Add support for skipping waiting for training
Some devices need rescan devices by its function drivers, because it
need special IO settings before finish training. So controller's
resume for waiting for link up must be failed at this stage. Add a
property for this kind of device to skip waiting for training.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I45787cbd41a07f2f80cb712b896021d1367cb9dc
2022-01-13 15:04:20 +08:00
shengfei Xu
277361df6a arm64: dts: rockchip: rk3588: fix pmic_int pull-up on rk3588
RK806 INT pin is connected to pmic_int(gpio0a7).
the pmic_int sets low-level interrupt, which requires pull-up
voltage(VCC_1V8_S0). but the pull-up voltage is powered off
in system suspend, causing the system to wake up immediately.

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Id85b441c9ce7f9837e3c61647b39f03dd4c63e53
2022-01-13 14:13:39 +08:00
XiaoDong Huang
dacb124d50 arm64: dts: rockchip: rk3588s-tablet-rk806-single: enable rockchip-suspend node
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I660c2f92ae687f83be4c1afe5e252c52c8ad7e20
2022-01-13 14:10:42 +08:00
Wu Liangqing
d393ba132c arm64: dts: rockchip: rk3588s-evb1: disabled spdif_tx1
The GPIO4_B1 is reused by spdif_tx1 and PCIE20x1, and the hardware
is conneted to PCIE20x1

Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
Change-Id: Ibeaec0b16add9c8dbeb91b06a667fd0bea10f0ce
2022-01-13 11:37:52 +08:00
XiaoDong Huang
f9f1545d56 arm64: dts: rockchip: rk3588s-tablet: enable rockchip-suspend node
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I954bcdf12891012e423adaf6ee9dbf96f4d0c847
2022-01-13 10:46:29 +08:00
XiaoDong Huang
0fe4030af2 arm64: dts: rockchip: rk3588s-evb: enable rockchip-suspend node
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: Ide5cfa10b58c6e60cd492b9056fbbb2090a33f64
2022-01-13 10:46:04 +08:00
XiaoDong Huang
a6ae305e4f arm64: dts: rockchip: rk3588-evb: enable rockchip-suspend node
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I1552788ffc7a10938eafa173216456ba790cdbb6
2022-01-13 10:45:45 +08:00
XiaoDong Huang
ed9eb4b06d arm64: dts: rockchip: rk3588: add rockchip-suspend node
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I977f43bdc0a4b13202d15dc276ec82db4e1b5e0d
2022-01-13 10:44:15 +08:00