The assigned clks take effect off-line capture on MCU, and make MCU
abnormal.
Signed-off-by: Sun ChuanHu <aaron.sun@rock-chips.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ib41b397afc7dd31a898cef9ccdef7b7c9b162f17
1.link enable ispp input video
2.set ispp input format
3.ispp output video config and stream on
4.ispp input video config and stream on
Change-Id: I742ebb71ceb87059e269628e8092177178b0ac45
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
Fake platform devices for ion page pools, which are required by dma api.
Change-Id: Id4b5844f20f993ea1b93704286610555386aeda8
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Which is no longer needed after commit
b67a8b29df ("arm64: mm: only initialize swiotlb when necessary").
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: If1afd62f81b37f81cfdfc9bb4ef95e753b2006c4
Which is no longger needed after commit
b67a8b29df ("arm64: mm: only initialize swiotlb when necessary").
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I4a387406cee1308406bf3630f69c67f6dd4cd30f
1.disable touch q function
2.pull down touch q gpio default to avoid electric leakage when sleep
Change-Id: Iedc1aa31f26d701153138c689bff943dc88ffe89
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
For some chips, the Vmin of NPU 200MHz is the same as NPU 600MHz.
Change-Id: I74bb792473c38d5a16d7f79d8eb8f7ef4feff3b8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
As the maximum frequency of some chips is 500MHz, set the initial value
to the normal rate 396MHz.
Change-Id: I2ee84ac1672b390d9d5ec221d1d7fd0db6fd0566
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
fs/incfs/vfs.c: In function 'ioctl_create_file':
fs/incfs/vfs.c:1259:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I4a9e167927d32180871776767fe3e4ff0c8342a9
https://source.android.com/security/bulletin/2021-02-01
CVE-2017-18509
CVE-2020-10767
* tag 'ASB-2021-02-05_4.19-stable': (809 commits)
ANDROID: GKI: fix up abi issues with 4.19.172
Linux 4.19.172
fs: fix lazytime expiration handling in __writeback_single_inode()
writeback: Drop I_DIRTY_TIME_EXPIRE
dm integrity: conditionally disable "recalculate" feature
tools: Factor HOSTCC, HOSTLD, HOSTAR definitions
tracing: Fix race in trace_open and buffer resize call
HID: wacom: Correct NULL dereference on AES pen proximity
futex: Handle faults correctly for PI futexes
futex: Simplify fixup_pi_state_owner()
futex: Use pi_state_update_owner() in put_pi_state()
rtmutex: Remove unused argument from rt_mutex_proxy_unlock()
futex: Provide and use pi_state_update_owner()
futex: Replace pointless printk in fixup_owner()
futex: Ensure the correct return value from futex_lock_pi()
futex: Prevent exit livelock
futex: Provide distinct return value when owner is exiting
futex: Add mutex around futex exit
futex: Provide state handling for exec() as well
futex: Sanitize exit state handling
...
Change-Id: Ieba6ee3a91a05d504e1f829a84e7d364e7d983f2
Conflicts:
arch/arm64/boot/dts/rockchip/rk3328.dtsi
drivers/md/Kconfig
drivers/usb/gadget/function/f_uac2.c
This reverts commit b43b8174c1.
Relpaced by commit fc9f57f643 ("usb: gadget: Fix spinlock lockup on usb_function_deactivate")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
This reverts commit 330a359767.
Relpaced by commit 0c486401a3 ("irqchip/gic-v3-its: Unconditionally save/restore the ITS state on suspend")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
The GPU driver and dts had uploaded some CLs to support it, as below:
driver:
a519839892 ("MALI: midgard: change kbase_platform_driver.driver.name to "midgard"")
a9f72d8212 ("MALI: bifrost: remove 'of_device_id' instances related to midgard")
5a1b8a4b4b ("MALI: midgard: add and include rename.h")
dts:
a400cac168 ("arm64: dts: rockchip: rk3568: gpu: only use "arm,mali-bifrost"...")
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I2dfdf09e7251e4efa8c80fb152cd189a147f917e
pvi_waveform: update
1.support version 0x09, 0x16, 0x43 wbf file
2.fix lut table some err
3.remove no use code
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Change-Id: I045dbc72064a00e15ac4eaff4b385ad853353b99
if pixels large than default which set in dtsi, use advanced-rates.
otherwise, use normal-rages.
Change-Id: I488c2815dbe1e3decd1d305a78bf523d944d1e96
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
1. move some gamma parameter from vop to vp;
2. add support atomic api for gamma lut;
Change-Id: Id54316fbbba4d07375fa51ca47790a01ea9c29f5
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
All modern devices support MSI or even MSI-X, but some very ancient devices
such as PCI devices may also like to only support PCI legacy INT. Although
it's very unlikely to happened but we at least need a method to make PCIe
work if anything wrong with GIC its support.
Change-Id: I917af7c8986977e3ae5944e9cc89a8e3409a8cd9
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
