The layout about meta has been changed and defined in
rv1106-thunder-boot.dtsi.
Signed-off-by: Wang Xiaobin <xb.wang@rock-chips.com>
Change-Id: Ia05c9020dd52b5c6a0e9c94b1e7d799fd65d9d76
Add DT property 'analogix,force-stream-valid' to DTS node
if want to support vrr.
Fixes: 2abd3af02c ("drm/bridge: analogix_dp: Use video format information from register")
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ic4624e4ca3a03322f1d9520a7e3cee0d054c36ee
Except spi2m2 which is used for pmic. all spi change from 33ohm to 40ohm
to avoid overcharge.
Change-Id: Ib1f613b19c1ca9f978c11a7d26422ff66b4b910c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reach controller register in user space by mmap operation, And only do spi
transmission in user space.
Change-Id: I37e22ad04813c2cd10d97324339afc5a11da59bd
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
The GPIO2A2 GPIO2A3 GPIO2C0 GPIO3B2 GPIO3B3 have 3 bits for pinmux, and
have a extra bit to select 2bits or 3bits.
The Rockchip downstream has a soc_data_init to choice 3bits mode, but
the upstream uses 2bits mode.
This patch removes the soc_data_init/re_init and set the soc data init
directly during probe.
Fixes: ae7b9050a3 ("UPSTREAM: pinctrl: rockchip: fix RK3308 pinmux bits")
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I57b88c776f86a37e34a38cd7b81e422e0cce2e03
Test code of embedded DMA design based on dwc controller.
Show the controller registered with dmatest, and you can assigned the
correspond test_dev for test:
echo show > ./sys/module/pcie_dw_dmatest/parameters/dmatest
Check the value of the current parameter:
grep -H . /sys/module/pcie_dw_dmatest/parameters/*
Fix parameter and run the dmatest:
echo 0 > ./sys/module/pcie_dw_dmatest/parameters/test_dev
echo 1 > ./sys/module/pcie_dw_dmatest/parameters/chn_en
echo 1 > ./sys/module/pcie_dw_dmatest/parameters/rw_test
echo 0x100 > ./sys/module/pcie_dw_dmatest/parameters/size
echo 0x1 > ./sys/module/pcie_dw_dmatest/parameters/cycles_count
echo 0x3c000000 > ./sys/module/pcie_dw_dmatest/parameters/local_addr
echo 0x3c000000 > ./sys/module/pcie_dw_dmatest/parameters/bus_addr
echo run > ./sys/module/pcie_dw_dmatest/parameters/dmatest
Change-Id: I1b48f849e5e37baec27bc62d2a8cf4945fb40cbc
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.Optimize DMA hook to support multiple independent DMA channels
2.Add interrupt callback to support multiple independent DMA channels
Change-Id: I42a638a4cb9fa61ebc1cd51d4e9f6d6942715fd1
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This patch can save 0.6mA for PMUIO2(3V3).
Tested on RK3588_EVB1_LP4_V10 platform.
Change-Id: If9298b7de5859e8bfd28baf3e1022b71efd78218
Signed-off-by: Liang Chen <cl@rock-chips.com>
Some NVR product want skip-ref-fb, destroy logo
fb after some delay to make sure the plane is
disabled.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ia257a510ea2382b5ee6aa4f65b2fef856687b0bc
Before this commit the following scenario maybe disable win failed:
-> disable win and config done
-> vop fs coming, this time win state is disabled.
-> enable win and config done
-> disable win[the fs haven't come yes, so win state is disabled, this will
skip to disable win and lead to disable win failed]
->fs coming, this time win state is still enabled.
so we add judge win backup register state to avoid disable win failed.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie08aa141616291fc900313d99fbc07622b5d1a83
1. fixed bug caysed by commit 75dc121c3a
2. enable dma capture in fs intr, otherwise,
if enable during vblank will cause VICAP to use the buffer address of last runtime,
but the buffer is released.
Fixes: 75dc121c3a ("media: rockchip: vicap support wake up buffer with mode of rdbk by isp driver")
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I51d6e0aaf513dc1e5039980e7643faa7505c271b
MX35UF1GE4AC, MX35UF1GE4AD, MX35UF2GE4AD, MX35UF4GE4AD
Change-Id: Ief8230ac8d37ad28d3253a9bec8786506698c8c3
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
The boundary of different frequency points is set as the default value
to avoid CED interruption being triggered by mistake.
Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com>
Change-Id: I0b1257586d43e335496e87803628da72bc2a7c0c
The process is "startup->prepare->trigger".
Others, fix the pdm + vad do not work well since use the patch:
'commit 3437162327 ("ASoC: rockchip: pdm: Fix pop noise in the beginning")'
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ifdc40af04695f4082d536b83309c76ed0426fece
vop2_crtc_load_lut need to sync with vysnc, so we should
make sure the VP exit standby and setting the right dclk,
or we will meet a cfg done timeout:
[drm:vop2_wait_for_fs_by_done_bit_status] *ERROR* wait vp1 done bit
status timeout, vcnt: 0
Fixes: 5aa1d0e08f ("drm/rockchip: vop2: fix double config done at one
frame time")
Change-Id: I66d1e7ba260dc376c7f7ce132dad2212649b31e8
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Add support to change fan speed according to temperature,
and force to update pwm state when suspend and resume as
the configuration of pwm is lost.
Signed-off-by: Shaohan Yao <shaohan.yao@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I05b286d1373dd4ace2fb519f4598008b851e4eff
