ADD HLG EOTF to the list of EOTF transfer functions supported.
Hybrid Log-Gamma (HLG) is a high dynamic range (HDR) standard.
HLG defines a nonlinear transfer function in which the lower
half of the signal values use a gamma curve and the upper half
of the signal values use a logarithmic curve.
v2: Rebase
v3: Fixed a warning message
v4: Addressed Shashank's review comments
v5: Addressed Jonas Karlman's review comment and dropped the i915
tag from header.
Change-Id: I6542cb0cb6cfccb92f76aa98df5d054fc1e908d8
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-8-git-send-email-uma.shankar@intel.com
(cherry picked from commit b5e3eed1ee)
Enable Dynamic Range and Mastering Infoframe for HDR
content, which is defined in CEA 861.3 spec.
The metadata will be computed based on blending
policy in userspace compositors and passed as a connector
property blob to driver. The same will be sent as infoframe
to panel which support HDR.
Added the const version of infoframe for DRM metadata
for HDR.
v2: Rebase and added Ville's POC changes.
v3: No Change
v4: Addressed Shashank's review comments and merged the
patch making drm infoframe function arguments as constant.
v5: Rebase
v6: Fixed checkpatch warnings with --strict option. Addressed
Shashank's review comments and added his RB.
v7: Addressed Brian Starkey's review comments. Merged 2 patches
into one.
v8: Addressed Jonas Karlman review comments.
v9: Addressed Jonas Karlman review comments.
v10: Addressed Ville's review comments.
v11: Added BUILD_BUG_ON and sizeof instead of magic numbers as
per Ville's comments.
Change-Id: I9f64d3df1a62afb83a5075662d96964c4dd3c2be
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-5-git-send-email-uma.shankar@intel.com
(cherry picked from commit 2cdbfd66a8)
Let's make the infoframe pack functions usable with a const infoframe
structure. This allows us to precompute the infoframe earlier, and still
pack it later when we're no longer allowed to modify the structure.
So now we end up with a _check()+_pack_only() or _pack() functions
depending on whether you want to precompute the infoframes or not.
The names aren't great but I was lazy and didn't want to change all the
drivers.
v2: Deal with exynos churn
Actually export the new funcs
v3: Fix various documentation fails (Hans)
Change-Id: I5a74363af0e985ffa4f7698c9eef486b69882961
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Cc: linux-media@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180921143332.28970-1-ville.syrjala@linux.intel.com
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
(cherry picked from commit c5e69ab35c)
HDR metadata block is introduced in CEA-861.3 spec.
Parsing the same to get the panel's HDR metadata.
v2: Rebase and added Ville's POC changes to the patch.
v3: No Change
v4: Addressed Shashank's review comments
v5: Addressed Shashank's comment and added his RB.
v6: Addressed Jonas Karlman review comments.
v7: Adressed Ville's review comments and fixed the issue
with length handling.
v8: Put the length check as per the convention followed in
existing code, as suggested by Ville.
Change-Id: Ia13317764bab48f95e9fffd5f9bce7e9d64853ba
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-4-git-send-email-uma.shankar@intel.com
(cherry picked from commit e85959d6cb)
This patch adds a blob property to get HDR metadata
information from userspace. This will be send as part
of AVI Infoframe to panel.
It also implements get() and set() functions for HDR output
metadata property.The blob data is received from userspace and
saved in connector state, the same is returned as blob in get
property call to userspace.
v2: Rebase and modified the metadata structure elements
as per Ville's POC changes.
v3: No Change
v4: Addressed Shashank's review comments
v5: Rebase.
v6: Addressed Brian Starkey's review comments, defined
new structure with header for dynamic metadata scalability.
Merge get/set property functions for metadata in this patch.
v7: Addressed Jonas Karlman review comments and defined separate
structure for infoframe to better align with CTA 861.G spec. Added
Shashank's RB.
v8: Addressed Ville's review comments. Moved sink metadata structure
out of uapi headers as suggested by Jonas Karlman.
v9: Rebase and addressed Jonas Karlman review comments.
v10: Addressed Ville's review comments, dropped the metdata_changed
state variable as its not needed anymore.
Change-Id: I5dc8882f8e9dd488140e2747195c278f94b1e1fa
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1558015817-12025-2-git-send-email-uma.shankar@intel.com
(cherry picked from commit fbb5d0353c)
When switch color new hdmi phy config may not be set because hdmi phy
is already on in upstream code.
So we should power down hdmi phy first before power on hdmi phy when
set new hdmi phy config.
Change-Id: Icb1cf29931f1084cc70b0b320137260491497771
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
if bootup with hdmi plugin initialize mtmdsclock to modify voicelessness
and set bridge_is_on true to modify green screen when reboot from recovery
Change-Id: I0ed9f956d62ab4087cb42a54dafba6a0fc9e5a7e
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
Introduce mtmdsclock to record tmds clock, which is different
to mpixelclock in deep color mode. Use this variable to select
synopsys phy curr_ctrl/phy_config, and audio N/CTS.
Change-Id: Ia78dee9c4901d2f1ca7f339dfb030d65bbf6861d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
if get edid error at bootup the input bus format will be set as
rgb and hdmi is no reinit, so hdmi color will be wrong if set yuv
in uboot, now reinit hdmi in this case.
Change-Id: I8d117b6e241079ceab44793f6566adf91e9d84c6
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
to modify bus width error sometime plug out hdmi and switch cvbs output
Change-Id: Iaa7914fbccc99991fbfbc5495ba647f97997c8ba
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
If HDMI output corlor mode is YCbCr422, the tmds clock is same
to YCbCr444 8bit, phy bus width should be set to 8.
Change-Id: I6e844e676a6315ae0cb88b0bd8456f0e27fa5e0c
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
The arm64 virtual addresses of kernel are like:
VA_START < MODULES_VADDR < KIMAGE_VADDR < PAGE_OFFSET.
PAGE_OFFSET is the virtual address of the start of the linear map.
And the vmalloc, kernel code and so on are between VA_START and
PAGE_OFFSET, so it is necessary to expand dump addresses to VA_START,
instead of PAGE_OFFSET.
Change-Id: I810ed216862de4c6e68b92d483de4aa68da532b8
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
A port of 8608d7c441 to ARM64. Both the
original code and this port are limited to dumping kernel addresses, so
don't bother if the registers are from a userspace process.
Change-Id: Idc76804c54efaaeb70311cbb500c54db6dac4525
Signed-off-by: Greg Hackmann <ghackmann@google.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
FM25S01, HYF1GQ4UPACAE, EM73E044SNA-G, GD5F2GQ5UEYIG
Change-Id: Id6f50b06a27631cf14e1df6deb39cf0600866bec
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
meaningful for non-atomic drivers, for atomic drivers this is
forced to be NULL.
Change-Id: Ic3591c4f4c3ee6de53f89d0b4f230829b1ed056d
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
1.Filling the HDMI AVI infoframe quantization range information.
2.If output is limited enable color space conversion to convert.
Change-Id: I75f666424f00f3f6ec695047f7851824e89cd1a5
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Under the following conditions, phy will be abnormally enabled.
1. HDMI is enabled in uboot.
2. disabled/bridge_is_on/phy.enabled/mc_clkdis were updated to
work when probe.
3. HDMI is disconnected.
4. drm_helper_probe_single_connector_modes update connector->status
to disconnected and power off phy by dw_hdmi_update_power. But the
polled type of HDMI is DRM_CONNECTOR_POLL_HPD, output_poll_execute
will not process this disconnection, and dw_hdmi_bridge_disable is
not called, hdmi->disabled is still false.
5. vop will be switch to Tv encoder, and dclk is 27MHz.
6. HDMI is connected.
7. dw_hdmi_update_power is called in dw_hdmi_irq, for hdmi->disabled
is false, then phy is powered up with parameter of 27MHz, and
bridge_is_on is set to on.
8. VOP switch to HDMI mode, set the new dclk rate.
9. dw_hdmi_bridge_enable is called, but the bridge_is_on is already on,
phy will not set again, still maintain the parameters that do not
conform to the new dclk rate.
This patch introduced an variable initialized to indicate hdmi is
initialized before probe, e.g. uboot. When power off hdmi, initialized
and disabled is updated.
Change-Id: I163967ac02e7f29ab586acbfd25d5a15679470c8
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
If hdmi is enabled in uboot and pluged out when booting kernel,
the hdmi phy is still enabled. It's better to disable it to
match the real status.
Change-Id: Ia1c5ede6499ee277d08c35a85c50e3257305f90f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
If hdmi plug in when kernel starting, hdmi may be without output.
Because the old criteria that to determine whether uboot logo is
on is hdmi phy pll locked and hdmi is connected. But in some
platform(such as rk3229), hdmi phy pll is locked even hdmi phy
is power down. In this case, the old criteria is unreliable.
So we add a new criteria that check Frame Composer register.If
the register value is not 0, we think that uboot logo is on,
hdmi has been setup.
Change-Id: Ifaa27030e5f5d551bec8f971694ff5d9c34a7c1d
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
If hdmi is enabled in uboot, hdmi->disabled and bridge_is_on and
phy status need to be updated.
Change-Id: Ib21d894b673bf12b46a271c91d3e08fe7475ea89
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
If vop return error when showing kernel logo, connector atomic flush
will not be call, and mc_clkdis can not be updated.
This patch update mc_clkdis in the dw_hdmi_bind, when phy clock is
locked and HPD is connected.
Change-Id: I1498d787a993961fe75236c309ecc3c898d611a4
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
To avoid screen flash when updating CSC, we introduce connector
atomic_begin. Before flush crtc and connector, it's need to send
AVMUTE flag to make screen black, and clear flag after CSC updated.
AVMUTE -> Update CRTC -> Update HDMI -> Clear AVMUTE
Change-Id: Id47caac1e25fcce5a5aa7b879da4a6b9a9bab8a1
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
atomic_begin is used to prepare for update flush.
Change-Id: I1d3a2afaea4022c065bda2b4c0746464cc0c1303
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Introduce dw_hdmi_connector_atomic_flush to implement connector
atomic_flush.
Only when enc_in_encoding/enc_out_encoding/enc_in_bus_format/
enc_out_bus_format changed, dw_hdmi_setup is called.
Introduce previous_pixelclock/previous_tmdsclock/mtmdsclock to
determine whether PHY needs initialization. If phy is power off,
or mpixelclock/mtmdsclock is different to previous value, phy is
need to be reinitialized.
Change-Id: I1984fb188ba486de18f6d51b7a51320bbf2bc27d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
1.change SDA high level holding time to 3us.
2.when plug in,add timer to avoid unstable state.
Change-Id: Idc6faec710137ac9f8e589d75cbc1b85f7a45faf
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
If a display support HDMI2.0, it must support SCDC or YCbCr420.
So we check the connector->scdc_present and mode->flags to
check the connected display is HDMI 2.0.
Change-Id: I3b868d43791089fcdef77f99ec90396553008b9a
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
