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86d92b4524
This DWC2 driver has handled the unaligned DMA address problem for urb->transfer_buffer and split in transfer. But it still has problem to handle the isoc out transfer with unaligned DMA address. I test an USB Audio device which supports 24bits 96KHz 3LE format: usb 1-1: new full-speed USB device number 2 using dwc2 usb 1-1: New USB device found, idVendor=21b4, idProduct=0083, bcdDevice= 1.06 usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3 usb 1-1: Product: AudioQuest DragonFly Black v1.5 usb 1-1: Manufacturer: AudioQuest usb 1-1: SerialNumber: AQDFBL0100023815 When play 24bits 96KHz WAV file, noise occurs. The rootcause is that the DWC2 controller use internal DMA to transfer USB audio data, and the DMA address of data buffer must be 4 bytes aligned, otherwise, the dwc2 will fail to transfer the data. In this test case, the USB audio may transfer 572 bytes or 582 bytes in one usb transaction. And one URB contains multiple usb transactions, if the DWC2 transfer the 582 Bytes in the middle of the URB, the DMA address will not be 4 bytes aligned. This patch allocates new aligned buf for isoc out transfer with unaligned DMA address. For isoc split out transfer, this patch sets the start schedule at the 2 * DWC2_SLICES_PER_UFRAME to transfer the SSPLIT-begin OUT transaction like EHCI controller. Without this patch, the SSPLIT-begin OUT transaction starts in the seventh microframe, and this makes the USB HUB unhappy. This patch sets the the SSPLIT-begin OUT transaction starts in the first microframe. Signed-off-by: William Wu <william.wu@rock-chips.com> Change-Id: I251ccf804e062312f9bd348552493f3bab504beb
Linux kernel
============
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See Documentation/00-INDEX for a list of what is contained in each file.
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