This DWC2 driver has handled the unaligned DMA address problem
for urb->transfer_buffer and split in transfer. But it still
has problem to handle the isoc out transfer with unaligned DMA
address.
I test an USB Audio device which supports 24bits 96KHz 3LE format:
usb 1-1: new full-speed USB device number 2 using dwc2
usb 1-1: New USB device found, idVendor=21b4, idProduct=0083, bcdDevice= 1.06
usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 1-1: Product: AudioQuest DragonFly Black v1.5
usb 1-1: Manufacturer: AudioQuest
usb 1-1: SerialNumber: AQDFBL0100023815
When play 24bits 96KHz WAV file, noise occurs.
The rootcause is that the DWC2 controller use internal DMA to
transfer USB audio data, and the DMA address of data buffer must
be 4 bytes aligned, otherwise, the dwc2 will fail to transfer the
data. In this test case, the USB audio may transfer 572 bytes or
582 bytes in one usb transaction. And one URB contains multiple
usb transactions, if the DWC2 transfer the 582 Bytes in the middle
of the URB, the DMA address will not be 4 bytes aligned.
This patch allocates new aligned buf for isoc out transfer with
unaligned DMA address.
For isoc split out transfer, this patch sets the start schedule at
the 2 * DWC2_SLICES_PER_UFRAME to transfer the SSPLIT-begin OUT
transaction like EHCI controller. Without this patch, the SSPLIT-begin
OUT transaction starts in the seventh microframe, and this makes the
USB HUB unhappy. This patch sets the the SSPLIT-begin OUT transaction
starts in the first microframe.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I251ccf804e062312f9bd348552493f3bab504beb
Change-Id: I89cc058f597d1f408da9367e859e855f7e79f8bf
Fixes: 1d1a1f03f3 ("mmc: dw_mmc: add xfer timer for avoid DTO without actual data payload")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Get dst->clock from sclk_rate before it changed to avoid one div
operation.
Change-Id: I33a51fd8b9cef5c3e73fc4db436fe8c1dcc57306
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Fix follow build error on arm32:
In file included from ./arch/arm/include/asm/div64.h:127:0,
from ./include/linux/kernel.h:208,
from ./include/linux/clk.h:16,
from drivers/gpu/drm/rockchip/rk618/rk618_scaler.c:8:
drivers/gpu/drm/rockchip/rk618/rk618_scaler.c: In function
'calc_dsp_frm_hst_vst':
./include/asm-generic/div64.h:222:28: warning: comparison of distinct
pointer types lacks a cast
error, forbidden warning:div64.h:222
(void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
^
drivers/gpu/drm/rockchip/rk618/rk618_scaler.c:123:2: note: in expansion
of macro 'do_div'
do_div(t_frm_st, src_pixclock);
^~~~~~
./include/asm-generic/div64.h:222:28: warning: comparison of distinct
pointer types lacks a cast
error, forbidden warning:div64.h:222
(void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
^
drivers/gpu/drm/rockchip/rk618/rk618_scaler.c:124:19: note: in expansion
of macro 'do_div'
*dsp_frame_hst = do_div(t_frm_st, src_htotal);
drivers/gpu/drm/rockchip/rk618/rk618_scaler.c:303:
undefined reference to `__aeabi_uldivmod'
drivers/gpu/drm/rockchip/rk618/rk618_scaler.c:304:
undefined reference to `__aeabi_uldivmod'
drivers/gpu/drm/rockchip/rk618/rk618_dsi.o: In function
`rk618_dsi_set_hs_clk':
drivers/gpu/drm/rockchip/rk618/rk618_dsi.c:297:
undefined reference to `__aeabi_uldivmod'
Change-Id: I7a63cf63217e75ca5b2115581d39492642225e81
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Multiple fd may point to the same dmmabuf, which means the
same buffer. Therefore, fd cannot be added as a judgment.
Change-Id: I459a3350a692299932e58f3e274d2509a5b9a48e
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
If you want to enable kernel logo set the following state:
1. enable CONFIG_FRAMEBUFFER_CONSOLE
2. enable CONFIG_LOGO
3. disable route_HDMI/eDP/MIPI state at dts file;
Change-Id: I40c9c8bf4133c6e8e3fa829c4402bbe2c800d364
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
If you want to enable kernel logo set the following state:
1. enable CONFIG_FRAMEBUFFER_CONSOLE
2. enable CONFIG_LOGO
3. disable route_HDMI/eDP/MIPI state at dts file;
Change-Id: Ibe35ef6e296718cde9871c8cc2e61e1621c4d6a6
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
solve the machine sleep and wake up, 4G module is abnormal.
Under normal circumstances, sleep and wake up, 4g can not disconnect the network.
Change-Id: Iee28bdcee57747c4f4cbceae8c413b7f46c2b6ad
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
Firstly, init SNOR from flash table, then if this SPI Nor isn't
in flash table, reinit from snor flash packet.
Change-Id: Ia6fc76801ac44f978a198f4d369ade5c0af36f8b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
That snor_info_packet is SPI Nor information placed in IDB header
area, each progress can parse it to get flash information.
Change-Id: I101e3720050f8b926d3f3f9da812112a408e5586
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Fixes: 1d1a1f03f3 ("mmc: dw_mmc: add xfer timer for avoid DTO without actual data payload")
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I00ae095cff35b3960e1f9189d03f9908fed0aa33
This patch fixes the following panic when close the uvc
application in usb host.
Unable to handle kernel NULL pointer dereference at virtual address 00000003
pgd = 21faf91f
[00000003] *pgd=151af835, *pte=00000000, *ppte=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP ARM
Modules linked in: galcore(O)
CPU: 1 PID: 720 Comm: uvc_gadget_pthr Tainted: G W O 4.19.111 #8
Hardware name: Generic DT based system
PC is at uvcg_video_ep_queue+0x40/0x58
LR is at uvcg_video_ep_queue+0x38/0x58
...
[<b04fff54>] (uvcg_video_ep_queue) from [<b05003a4>] (uvcg_video_pump+0x7c/0x104)
[<b05003a4>] (uvcg_video_pump) from [<b0527cd8>] (__video_do_ioctl+0x1c8/0x3a0)
[<b0527cd8>] (__video_do_ioctl) from [<b052b40c>] (video_usercopy+0x200/0x494)
[<b052b40c>] (video_usercopy) from [<b022043c>] (do_vfs_ioctl+0xac/0x798)
[<b022043c>] (do_vfs_ioctl) from [<b0220b5c>] (ksys_ioctl+0x34/0x58)
[<b0220b5c>] (ksys_ioctl) from [<b0101000>] (ret_fast_syscall+0x0/0x4c)
Change-Id: I893e4c2b95f9b583423e68d68e7beff1cd114687
Signed-off-by: William Wu <william.wu@rock-chips.com>
The dwc3 initializes all of the endpoints in the following order:
epnum 0: USB EP0-OUT
epnum 1: USB EP0-IN
epnum 2: USB EP1-OUT
epnum 3: USB EP1-IN
...
This initialization logic works well if the number of IN endpoints
is equal to OUT endpoints. However, some SoCs have different number
of endpoints between the EP-IN and EP-OUT (e.g. RK3399/RV1109 7 IN
endpoints and 6 OUT endpoints), it will fail to init all of the
endpoints in this case.
This patch fixes the initialization logic for all of the IN and OUT
endpoints.
In addition, this patch also fixes the fifo depth of the Tx fifo0
when resize all of the tx fifos. And increase the fifos of isoc IN
endponits to hide system high bus latency.
Change-Id: I2928024f39cafaf669fd8e19b945a570c9650ca8
Signed-off-by: William Wu <william.wu@rock-chips.com>
Channel halt with unknown reason happens in the following case:
DWC2 + USB 2.0 HUB + HS Device + FS Device
The HS Device is an optical fingerprint:
usb 1-1.4: USB disconnect, device number 5
usb 1-1.4: new high-speed USB device number 6 using dwc2
usb 1-1.4: New USB device found, idVendor=28ed, idProduct=7000
usb 1-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 1-1.4: Product: Aratek Capture Device
usb 1-1.4: Manufacturer: Aratek
The FS Device is an ID card identification module:
usb 1-1.3: new full-speed USB device number 9 using dwc2
usb 1-1.3: New USB device found, idVendor=0400, idProduct=c35a
usb 1-1.3: New USB device strings: Mfr=0, Product=0, SerialNumber=0
When the issuse occurs, it always dump the error log:
dwc2 ff540000.usb: dwc2_hc_chhltd_intr_dma: Channel 13 - ChHltd set, but reason is unknown
dwc2 ff540000.usb: hcint 0x00000002, intsts 0x04000021
dwc2 ff540000.usb: dwc2_update_urb_state_abn(): trimming xfer length
------------[ cut here ]------------
WARNING: CPU: 0 PID: 0 at drivers/usb/dwc2/hcd.c:2796 dwc2_assign_and_init_hc+0x554/0x8e4()
Modules linked in: bcmdhd
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.4.143 #3
Hardware name: Generic DT based system
[<c010f854>] (unwind_backtrace) from [<c010bb84>] (show_stack+0x10/0x14)
[<c010bb84>] (show_stack) from [<c03ed8b4>] (dump_stack+0x7c/0x9c)
[<c03ed8b4>] (dump_stack) from [<c012737c>] (warn_slowpath_common+0x88/0xb4)
[<c012737c>] (warn_slowpath_common) from [<c0127488>] (warn_slowpath_null+0x18/0x20)
[<c0127488>] (warn_slowpath_null) from [<c05c8314>] (dwc2_assign_and_init_hc+0x554/0x8e4)
[<c05c8314>] (dwc2_assign_and_init_hc) from [<c05c8788>] (dwc2_hcd_select_transactions+0xe4/0x178)
[<c05c8788>] (dwc2_hcd_select_transactions) from [<c05ca0e4>] (dwc2_release_channel+0x1b8/0x1cc)
[<c05ca0e4>] (dwc2_release_channel) from [<c05cbaa8>] (dwc2_hc_n_intr+0x4a0/0x728)
[<c05cbaa8>] (dwc2_hc_n_intr) from [<c05cc1dc>] (dwc2_handle_hcd_intr+0x4ac/0x4d8)
[<c05cc1dc>] (dwc2_handle_hcd_intr) from [<c05b247c>] (usb_hcd_irq+0x24/0x38)
[<c05b247c>] (usb_hcd_irq) from [<c017dea4>] (handle_irq_event_percpu+0xa8/0x28c)
[<c017dea4>] (handle_irq_event_percpu) from [<c017e0c0>] (handle_irq_event+0x38/0x5c)
[<c017e0c0>] (handle_irq_event) from [<c0181560>] (handle_fasteoi_irq+0xa8/0x124)
[<c0181560>] (handle_fasteoi_irq) from [<c017d5cc>] (generic_handle_irq+0x18/0x28)
[<c017d5cc>] (generic_handle_irq) from [<c017d890>] (__handle_domain_irq+0x88/0xb0)
[<c017d890>] (__handle_domain_irq) from [<c010142c>] (gic_handle_irq+0x44/0x74)
[<c010142c>] (gic_handle_irq) from [<c010c554>] (__irq_svc+0x54/0x90)
This patch only clears the unmask interrupts to avoid trigger
unknown Channel Halted interrupt. However, if the Channel Halted
interrupt happens unexpected, we need to check if the urb->length
is 4-byte alignment in dwc2_update_urb_state_abn(), this can help
to avoid the above warning.
Change-Id: I501e7d2e5194d5fe3ad797b05cf400ecc95387f0
Signed-off-by: William Wu <william.wu@rock-chips.com>
Vbus detect function for INNO USB2PHY will be disabled when otg
cable is plugged. If we do not enable vbus detect when otg cable
unplugged, bvalid irq will never be triggered. Therefore, we set
phy mode to device when otg port is disconnected.
Change-Id: I5f53024d7a2a3a3f4f92ebcd716a25266fd009a1
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
1.Fix wrong return value
2.Results are subject to back reading verification
Change-Id: Ifd3965423261617bdaeecc10fd4da28cb703b2aa
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Because many customers have already started using mxc6655xa, so enable it.
Change-Id: I9aa83a9342b1a7a70da8cdb07ce88c9971d3230e
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
By default fsync option, if fsync is called frequently, and suddenly
lost power, the POR will consume too much memory at mounting, this
process may be very slow due to a large number of swapping.
Change-Id: I8235098cca062d7ab58af4ebed414aed9aba6c75
Signed-off-by: Cliff Chen <cliff.chen@rock-chips.com>
Signed-off-by: Alex Wang <alex.wang@rock-chips.com>
The DWC2 driver auto detects the hardware and enable
the gadget descriptor DMA if the DWC2 IP supports it.
However, the gadget descriptor DMA has some unexpected
compatibility issues, so we use buffer DMA instead of
desc DMA.
Change-Id: I1fed77f7d9bec1e0916b44d80813fb6248d461f0
Signed-off-by: William Wu <william.wu@rock-chips.com>
v2 tuning will inherit pre-stage loader's phase
settings for the first time, and do re-tune if
necessary. Re-tune will still try the rough degrees,
for instance, 90, 180, 270, 360 but continue to do the
fine tuning if sample window isn't good enough.
Change-Id: I593384ee381d09df5b9adfc29a18eb22517b2764
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
xfer timer was introduced to solve native defects for RK3308
platform but it seems some others also suffer from it. Enable
it would not put any burden on the normal driver process but
just ensure it has a dead-line weapon to fight for any issues
preventing the IP to work normally.
Change-Id: I0b6914d46788f4df99a7d49c608c3336976f78c6
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Current pvtm-voltage-sel table is not stable for some chips, reported by
some clients.
Change-Id: If2f7d8cd6a077922334c8e6ba4b01f82e27048d7
Signed-off-by: Liang Chen <cl@rock-chips.com>
Ref: https://android.googlesource.com/kernel/configs
commit aaf4b964e66f ("Add CONFIG_PSI to recommended")
This feature is not (yet?) required for Go, so we need to put it in
'recommended'.
commit 5f92c3d69791 ("android R: replace CONFIG_MEMCG requirement with CONFIG_PSI")
With adoption of PSI events as low memory notification mechanism MEMCG
becomes optional and PSI becomes mandatory. Note that MEMCG can still be
used for instance in Android Go devices but it's not mandatory anymore.
Change-Id: Id955b47aebc0411594906bc615464d894b1f8d51
Signed-off-by: Jianhui Wang <wjh@rock-chips.com>
