Zhang Yubing fc87ca81ee drm/rockchip: dw-dp: use low link rate for low pixel clock timing
When DPTX controller config 2 pixe mode and work in sst mode,
and a low pixel clock image transmit in high link rate(HBR3),
some monitor may display flicker. To avoid this issue appear,
use lower link rate(HBR2) when transmit a low pixel clock image.

Change-Id: I75ac8fcb963631cb372dd76c4b45ca33e960f6c9
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
2024-05-21 15:26:50 +08:00
2024-05-08 11:14:32 +08:00
2024-05-08 11:14:32 +08:00
2024-05-08 11:14:32 +08:00
2024-05-08 11:14:32 +08:00
2024-05-08 11:14:32 +08:00
2024-05-08 11:14:32 +08:00
2024-05-08 11:14:32 +08:00
2024-05-08 11:14:32 +08:00
2024-05-08 11:14:32 +08:00
2022-09-28 09:02:20 +02:00
2024-01-25 15:27:52 -08:00

Linux kernel
============

There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.

In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``.  The formatted documentation can also be read online at:

    https://www.kernel.org/doc/html/latest/

There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.

Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.
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