mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-10 04:48:04 +09:00
Merge commit 'b611ab7090264b5a01181aa21a436f4bce2ef9bc'
* commit 'b611ab7090264b5a01181aa21a436f4bce2ef9bc': arm64: configs: optimize latency for PREEMPT_RT ARM: configs: add rockchip_rt.config for PREEMPT_RT drm/bridge: synopsys: dw-hdmi-qp: Fix hdmi is enabled twice during boot drm/rockchip: vop2: only esmart/cluster win0 need to manage done bit arm64: dts: rockchip: rv1126bp: set init-freq to 600M for npu arm64: dts: rockchip: rv1126b: adjust opp-supported-hw for npu media: rockchip: vicap fixes size error of rgb888 rtc: s35390a: fix the issue where the alarm clock interruption cannot be triggered drm/bridge: synopsys: dw-hdmi-qp: Clear mode list when hdmi plug out soc: rockchip: fiq_debugger: fix dts property 'rockchip,irq-mode-enable' Change-Id: I813202127d9f4e087f180f25368d16b78c6e95d1
This commit is contained in:
31
arch/arm/configs/rockchip_rt.config
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31
arch/arm/configs/rockchip_rt.config
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@@ -0,0 +1,31 @@
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# CONFIG_ARM_PSCI_CPUIDLE is not set
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# CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ is not set
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# CONFIG_CGROUP_CPUACCT is not set
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# CONFIG_CGROUP_SCHED is not set
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# CONFIG_CPU_FREQ_TIMES is not set
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# CONFIG_CPU_FREQ_THERMAL is not set
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# CONFIG_DEBUG_SPINLOCK is not set
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# CONFIG_FTRACE is not set
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# CONFIG_IRQ_TIME_ACCOUNTING is not set
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# CONFIG_MALI_BIFROST_ENABLE_TRACE is not set
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# CONFIG_MALI_BIFROST_SYSTEM_TRACE is not set
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# CONFIG_PSI is not set
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# CONFIG_PERF_EVENTS is not set
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# CONFIG_PROFILING is not set
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# CONFIG_SCHED_DEBUG is not set
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# CONFIG_SCHED_INFO is not set
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# CONFIG_SWAP is not set
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# CONFIG_TASKSTATS is not set
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# CONFIG_ZRAM is not set
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# CONFIG_ARM_PATCH_PHYS_VIRT is not set
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# CONFIG_ARCH_MULTIPLATFORM is not set
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# CONFIG_VMAP_STACK is not set
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# CONFIG_HARDEN_BRANCH_PREDICTOR is not set
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# CONFIG_HARDEN_BRANCH_HISTORY is not set
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# CONFIG_COMPACTION is not set
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# CONFIG_MIGRATION is not set
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CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
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CONFIG_HZ_PERIODIC=y
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CONFIG_HZ_1000=y
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CONFIG_PREEMPT_RT=y
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CONFIG_VDSO=y
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@@ -3337,24 +3337,24 @@
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opp-microvolt-L1 = <875000 875000 1050000>;
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};
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opp-700000000 {
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opp-supported-hw = <0xf7 0xffff>;
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opp-supported-hw = <0xff 0xffff>;
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opp-hz = /bits/ 64 <700000000>;
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opp-microvolt = <850000 850000 1050000>;
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opp-microvolt-L0 = <900000 900000 1050000>;
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opp-microvolt-L1 = <875000 875000 1050000>;
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};
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opp-800000000 {
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opp-supported-hw = <0xf7 0xffff>;
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opp-supported-hw = <0xff 0xffff>;
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opp-hz = /bits/ 64 <800000000>;
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opp-microvolt = <925000 925000 1050000>;
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};
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opp-900000000 {
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opp-supported-hw = <0xf7 0xffff>;
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opp-supported-hw = <0xff 0xffff>;
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opp-hz = /bits/ 64 <900000000>;
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opp-microvolt = <975000 975000 1050000>;
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};
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opp-950000000 {
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opp-supported-hw = <0xf7 0xffff>;
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opp-supported-hw = <0xff 0xffff>;
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opp-hz = /bits/ 64 <950000000>;
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opp-microvolt = <975000 975000 1050000>;
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opp-microvolt-L0 = <1000000 1000000 1050000>;
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@@ -8,6 +8,10 @@
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/ {
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};
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&npu_opp_table {
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rockchip,init-freq = <600000>;
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};
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&rgb {
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/*
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* RV1126 compatible pin output mode 0.
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@@ -1,5 +1,25 @@
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# CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ is not set
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# CONFIG_ARM_PSCI_CPUIDLE is not set
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# CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ is not set
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# CONFIG_CGROUP_CPUACCT is not set
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# CONFIG_CGROUP_SCHED is not set
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# CONFIG_CPU_FREQ_TIMES is not set
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CONFIG_NO_HZ_FULL=y
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# CONFIG_CPU_FREQ_THERMAL is not set
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# CONFIG_DEBUG_SPINLOCK is not set
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# CONFIG_FTRACE is not set
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# CONFIG_IRQ_TIME_ACCOUNTING is not set
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# CONFIG_MALI_BIFROST_ENABLE_TRACE is not set
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# CONFIG_MALI_BIFROST_SYSTEM_TRACE is not set
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# CONFIG_PSI is not set
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# CONFIG_PERF_EVENTS is not set
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# CONFIG_PROFILING is not set
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# CONFIG_SCHED_DEBUG is not set
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# CONFIG_SCHED_INFO is not set
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# CONFIG_SWAP is not set
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# CONFIG_TASKSTATS is not set
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# CONFIG_ZRAM is not set
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# CONFIG_MIGRATION is not set
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CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
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CONFIG_JUMP_LABEL=y
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CONFIG_HZ_PERIODIC=y
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CONFIG_HZ_1000=y
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CONFIG_PREEMPT_RT=y
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@@ -2622,6 +2622,7 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force)
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struct dw_hdmi_qp *hdmi =
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container_of(connector, struct dw_hdmi_qp, connector);
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struct dw_hdmi_qp *secondary = NULL;
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struct drm_display_mode *mode;
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enum drm_connector_status result, result_secondary;
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mutex_lock(&hdmi->mutex);
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@@ -2659,8 +2660,12 @@ out:
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extcon_set_state_sync(hdmi->extcon, EXTCON_DISP_HDMI, true);
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handle_plugged_change(hdmi, true);
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} else {
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if (!hdmi->next_bridge)
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if (!hdmi->next_bridge) {
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drm_connector_update_edid_property(&hdmi->connector, NULL);
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list_for_each_entry(mode, &hdmi->connector.modes, head)
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mode->status = MODE_STALE;
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drm_mode_prune_invalid(hdmi->connector.dev, &hdmi->connector.modes, false);
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}
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extcon_set_state_sync(hdmi->extcon, EXTCON_DISP_HDMI, false);
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handle_plugged_change(hdmi, false);
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}
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@@ -3403,7 +3408,8 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector,
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drm_scdc_readb(hdmi->ddc, SCDC_TMDS_CONFIG, &val);
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/* if plug out before hdmi bind, reset hdmi */
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if (vmode->mtmdsclock >= 340000000 && vmode->mpixelclock <= 600000000 &&
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!(val & SCDC_TMDS_BIT_CLOCK_RATIO_BY_40) && !hdmi->force_kernel_output)
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!(val & SCDC_TMDS_BIT_CLOCK_RATIO_BY_40) && !hdmi->force_kernel_output &&
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hdmi->initialized)
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hdmi->logo_plug_out = true;
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}
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@@ -1112,6 +1112,8 @@ static inline void rk3588_vop2_dsc_cfg_done(struct drm_crtc *crtc);
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static inline void vop2_cfg_done(struct drm_crtc *crtc);
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static void vop2_wait_for_fs_by_done_bit_status(struct vop2_video_port *vp);
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static int vop2_clk_reset(struct reset_control *rstc);
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static inline bool vop2_cluster_sub_window(struct vop2_win *win);
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static inline bool vop2_multi_area_sub_window(struct vop2_win *win);
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static void vop2_wait_for_scan_timing_max_to_assigned_line(struct vop2_video_port *vp,
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u32 current_line,
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u32 wait_line);
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@@ -2285,14 +2287,17 @@ static void vop2_win_disable(struct vop2_win *win, bool skip_splice_win)
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}
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}
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vp_id = ffs(win->vp_mask) - 1;
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if (vp_id >= ROCKCHIP_MAX_CRTC) {
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DRM_ERROR("Unsupported vp_id: %d\n", vp_id);
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return;
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if (!vop2_cluster_sub_window(win) && !vop2_multi_area_sub_window(win)) {
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vp_id = ffs(win->vp_mask) - 1;
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if (vp_id >= ROCKCHIP_MAX_CRTC) {
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DRM_ERROR("%s unsupported vp_id: %d, win->vp_mask:0x%x\n",
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win->name, vp_id, win->vp_mask);
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return;
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}
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vp = &vop2->vps[vp_id];
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if (vp->reserved_plane_phy_id != ROCKCHIP_VOP2_PHY_ID_INVALID)
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vp->win_cfg_done_bits |= BIT(win->reg_done_bit);
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}
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vp = &vop2->vps[vp_id];
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if (vp->reserved_plane_phy_id != ROCKCHIP_VOP2_PHY_ID_INVALID)
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vp->win_cfg_done_bits |= BIT(win->reg_done_bit);
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}
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if (win->left_win && win->splice_mode_right) {
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@@ -7164,7 +7169,8 @@ static void vop2_win_atomic_update(struct vop2_win *win, struct drm_rect *src, s
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VOP_CLUSTER_SET(vop2, win, frm_reset_en, 1);
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VOP_CLUSTER_SET(vop2, win, dma_stride_4k_disable, 1);
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}
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vp->win_cfg_done_bits |= BIT(win->reg_done_bit);
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if (!vop2_cluster_sub_window(win) && !vop2_multi_area_sub_window(win))
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vp->win_cfg_done_bits |= BIT(win->reg_done_bit);
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spin_unlock(&vop2->reg_lock);
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}
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@@ -4058,7 +4058,7 @@ static int rkcif_csi_channel_init(struct rkcif_stream *stream,
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channel->fmt_val == CSI_WRDDR_TYPE_RGB565)
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channel->width = channel->width * fmt->bpp[0] / 8;
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if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888)
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if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888 && dev->chip_id < CHIP_RK3576_CIF)
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channel->width /= 2;
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/*
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* rk cif don't support output yuyv fmt data
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@@ -11218,7 +11218,7 @@ static void rkcif_dynamic_crop(struct rkcif_stream *stream)
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mbus->type == V4L2_MBUS_CCP2) {
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struct csi_channel_info *channel = &cif_dev->channels[stream->id];
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if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888)
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if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888 && cif_dev->chip_id < CHIP_RK3576_CIF)
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crop_x = 3 * stream->crop[CROP_SRC_ACT].left / 2;
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else if (channel->fmt_val == CSI_WRDDR_TYPE_RGB565)
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crop_x = 2 * stream->crop[CROP_SRC_ACT].left;
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@@ -468,6 +468,45 @@ static const struct rtc_class_ops s35390a_rtc_ops = {
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.ioctl = s35390a_rtc_ioctl,
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};
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static irqreturn_t s35390a_irq(int irq, void *dev_id)
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{
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int err;
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char sts = 0;
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char status1;
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struct s35390a *s35390a = (struct s35390a *)dev_id;
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struct i2c_client *client = s35390a->client[0];
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rtc_lock(s35390a->rtc);
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err = s35390a_read_status(s35390a, &status1);
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if (err < 0) {
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dev_err(&client->dev, "read status failure\n");
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goto out;
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}
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if (status1 & S35390A_FLAG_INT2) {
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/* clear pending interrupt (in STATUS1 only), if any */
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err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &sts, sizeof(sts));
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if (err < 0) {
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dev_err(&client->dev, "read S35390A_CMD_STATUS1 failure\n");
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goto out;
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}
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sts = S35390A_INT2_MODE_NOINTR | S35390A_INT2_MODE_32K;
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/* disable interrupt */
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err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts));
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if (err < 0) {
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dev_err(&client->dev, "clear interrupt failure\n");
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goto out;
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}
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rtc_update_irq(s35390a->rtc, 1, RTC_AF);
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}
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out:
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rtc_unlock(s35390a->rtc);
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return IRQ_HANDLED;
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}
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static int s35390a_probe(struct i2c_client *client)
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{
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int err, err_read;
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@@ -546,6 +585,18 @@ static int s35390a_probe(struct i2c_client *client)
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set_bit(RTC_FEATURE_ALARM_RES_MINUTE, s35390a->rtc->features);
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clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, s35390a->rtc->features );
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if (client->irq > 0) {
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err = devm_request_threaded_irq(&client->dev, client->irq,
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NULL, s35390a_irq,
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IRQF_TRIGGER_LOW | IRQF_ONESHOT,
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client->name, s35390a);
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if (err < 0) {
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dev_err(&client->dev, "irq %d request failed, %d\n",
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client->irq, err);
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return err;
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}
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}
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if (status1 & S35390A_FLAG_INT2)
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rtc_update_irq(s35390a->rtc, 1, RTC_AF);
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@@ -67,6 +67,7 @@ struct rk_fiq_debugger {
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static int rk_fiq_debugger_id;
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static int serial_hwirq;
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static int irq_mode;
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#ifdef CONFIG_FIQ_DEBUGGER_TRUST_ZONE
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static bool tf_fiq_sup;
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@@ -933,7 +934,7 @@ static void rk_serial_debug_init(void __iomem *base, phys_addr_t phy_base,
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res[0].start = irq;
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res[0].end = irq;
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#if defined(CONFIG_FIQ_GLUE)
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if (signal_irq > 0)
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if (irq_mode != 1 && signal_irq > 0)
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res[0].name = "fiq";
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else
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res[0].name = "uart_irq";
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@@ -1041,7 +1042,7 @@ static int __init rk_fiqdbg_probe(struct platform_device *pdev)
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struct device_node *np = pdev->dev.of_node;
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unsigned int id, ok = 0;
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int irq, signal_irq = -1, wake_irq = -1;
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unsigned int baudrate = 0, irq_mode = 0;
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unsigned int baudrate = 0;
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phys_addr_t phy_base = 0;
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int serial_id;
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struct clk *clk;
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