arm64: dts: rockchip: rk3562-rk817-tablet-v10: Change clkin div to 5 for aclk vo

The dclk vop is 70MHz, the aclk vop can be reduced appropriately.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I05f79bb4bade6c8ff6c8014edce448f403bb9ca4
This commit is contained in:
Finley Xiao
2023-08-17 09:25:00 +08:00
committed by Tao Huang
parent 0e7bc1d765
commit 26d58236a5

View File

@@ -209,6 +209,18 @@
cpu-supply = <&vdd_cpu>;
};
&bus_soc {
rockchip,soc-bus-table = <0 0x00a000a8 0x7001>,
<1 0x00a000a8 0x7c39>,
<2 0x00a000a8 0x7c39>,
<3 0x00a000a8 0x7c39>,
<4 0x00a000a5 0xb007>,
<5 0x00a000a8 0x7034>,
<6 0x00a000a8 0x7034>,
<7 0x00a000a8 0x7034>,
<8 0x00a000a8 0x7001>;
};
&dfi {
status = "okay";
};