arm64: dts: rockchip: rk3588: Add clk PCLK_PHP_ROOT to pcie30phy

Configure pcie30phy phy_grf with clk PCLK_PHP_ROOT on.

Change-Id: Ie3f9fa78aaf7b1098450ade48e6f0c9f09725869
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
Jon Lin
2025-04-28 10:12:42 +08:00
committed by Tao Huang
parent 6bfde08139
commit 39dbfdc2ff

View File

@@ -773,8 +773,8 @@
compatible = "rockchip,rk3588-pcie3-phy";
reg = <0x0 0xfee80000 0x0 0x20000>;
#phy-cells = <0>;
clocks = <&cru PCLK_PCIE_COMBO_PIPE_PHY>;
clock-names = "pclk";
clocks = <&cru PCLK_PCIE_COMBO_PIPE_PHY>, <&cru PCLK_PHP_ROOT>;
clock-names = "pclk", "phpclk";
resets = <&cru SRST_PCIE30_PHY>;
reset-names = "phy";
rockchip,pipe-grf = <&php_grf>;