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arm64: dts: rockchip: rk3588s: init pll_aupll to 786M

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Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I2e552dc3a390c273f46d52a55c641697a66a7719
This commit is contained in:
Elaine Zhang
2021-11-12 09:28:32 +08:00
committed by Tao Huang
parent e5277633c6
commit 46e88184cc
1 changed files with 3 additions and 3 deletions
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6
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@@ -603,7 +603,7 @@
#reset-cells = <1>;
assigned-clocks =
<&cru PLL_PPLL>,
<&cru PLL_PPLL>, <&cru PLL_AUPLL>,
<&cru PLL_NPLL>, <&cru PLL_GPLL>,
<&cru ARMCLK_L>, <&cru ARMCLK_B01>,
<&cru ARMCLK_B23>,
@@ -613,8 +613,8 @@
<&cru ACLK_LOW_TOP_ROOT>, <&cru PCLK_PMU0_ROOT>,
<&cru HCLK_PMU_CM0_ROOT>, <&cru ACLK_VOP>;
assigned-clock-rates =
<100000000>,
<850000000>, <1188000000>,
<100000000>, <786000000>,
<850000000>, <1188000000>,
<816000000>, <1008000000>,
<1008000000>,
<600000000>, <200000000>,