shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-06 10:58:48 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: rockchip: rk3588s: Init PPLL to 1.1G

Browse Source 
PPLL 1.1G with pcie2 comboPHY TS3 can get better signal.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I6af09906be88e7568b474b806161c3e1d6cd936e
This commit is contained in:
Kever Yang
2022-04-19 15:28:37 +08:00
parent de7d060208
commit c231916b68
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -2118,7 +2118,7 @@
<&cru ACLK_BUS_ROOT>, <&cru CLK_150M_SRC>,
<&cru CLK_GPU>;
assigned-clock-rates =
<100000000>, <786432000>,
<1100000000>, <786432000>,
<850000000>, <1188000000>,
<702000000>,
<400000000>, <500000000>,