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drm/bridge: analogix_dp: use &link_train.max_lane_count to determine the &link_train.lane_count

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Fixes: a205209330 ("drm/bridge: analogix_dp: Add &link_train.max_link_rate and &link_train.max_lane_count")
Change-Id: I9938e43bd37ddfc93838849c35dd2e76c8d31f0c
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
This commit is contained in:
Damon Ding
2025-04-16 15:31:34 +08:00
committed by Tao Huang
parent 3a1446746c
commit e1f6d87fc5
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
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@@ -889,7 +889,7 @@ static int analogix_dp_full_link_train(struct analogix_dp_device *dp,
analogix_dp_reset_macro(dp);
/* Setup TX lane count */
dp->link_train.lane_count = min_t(u32, dp->link_train.lane_count, max_lanes);
dp->link_train.lane_count = min_t(u32, dp->link_train.max_lane_count, max_lanes);
/* Setup TX lane rate */
if (analogix_dp_select_rx_bandwidth(dp)) {