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dt-bindings: sound: rockchip: pdm: Document property 'mclk-calibrate'

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Change-Id: I64f010b9876fdf736ac6778c7bac52c47e9d905f
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
This commit is contained in:
Sugar Zhang
2021-01-12 15:23:20 +08:00
committed by Tao Huang
parent 8b764766dc
commit ef3def055b
1 changed files with 14 additions and 0 deletions
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14
Documentation/devicetree/bindings/sound/rockchip,pdm.txt
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@@ -44,6 +44,11 @@ Optional properties:
path2 <-- sdi1
path3 <-- sdi0
- rockchip,mclk-calibrate: This is a boolean value, if present, enable
clk calibrate and compenation.
note: the corresponding property 'pdm_clk_root' should be assigned.
Example for rk3328 PDM controller:
pdm: pdm@ff040000 {
@@ -66,3 +71,12 @@ pdm: pdm@ff040000 {
&pdmm0_sdi2_sleep
&pdmm0_sdi3_sleep>;
};
Example for RV1126 PDM controller with mclk-calibrate:
&pdm {
status = "okay";
clocks = <&cru MCLK_PDM>, <&cru HCLK_PDM>, <&cru PLL_CPLL>;
clock-names = "pdm_clk", "pdm_hclk", "pdm_clk_root";
rockchip,mclk-calibrate;
};