Commit Graph

863364 Commits

Author SHA1 Message Date
Shunqing Chen
0fcdebff4c clk/rockchip/regmap: rk628: compatible with MCU mode
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I85f2c97ac23c585fc136eb5efa4e01fde979f883
2021-06-09 11:03:08 +08:00
Wyon Bi
7085d63854 clk/rockchip/regmap: rk628: Add support for clk_testout
Change-Id: I71f5ca1d4002d45438ff9d038ccc7eef5a28a857
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-06-09 10:53:50 +08:00
Zorro Liu
99c097ed84 drm/rockchip: ebc_dev: release version v2.00
1.update auto/overlay mode

Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Change-Id: I816ce38a50b2446521021c5e83089ca9e7d29f20
2021-06-08 11:26:39 +08:00
Cai YiWei
12931bb817 media: rockchip: isp/ispp to version v1.6.1
Change-Id: I6a9cdac4874a02cb0465c87aa23d7180d2109d3d
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-06-07 18:11:56 +08:00
Shunqian Zheng
7dde7286ee media: rockchip: ispp: destory ispp buffers if start_stream failed
Clean up the buffer pool if start streaming failed.

BUG=redmine:#301918

Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Change-Id: I4abcf17ef0c66dabcddcfac7395c7efabbfe6e47
2021-06-07 18:08:53 +08:00
Sandy Huang
664855bbb1 drm/rockchip: vop2: only when have active win then need to wait win close
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ieaf6497a8597d5d6d3f4a0eb0169fba55c93b4e2
2021-06-07 14:31:24 +08:00
Sandy Huang
b312a6cefb drm/rockchip: vop2: use default sdr2hdr(1000nit) curve
keep sdr2hdr result consistent between VOP and GPU

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I3ef6b289978d4b0c083d99e93d97a95b2e7f0b25
2021-06-07 14:31:24 +08:00
Sandy Huang
a433c6370d drm/rockchip: vop2: fix csc config error when at hdr mode
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ide5b9deb13882a561765a2e2be660e3463d1764f
2021-06-07 14:31:24 +08:00
Sandy Huang
916008d27e drm/rockchip: vop2: add more sdr2hdr scene
maybe appear the following scene for sdr2hdr:
1. one sdr layer      -> vop[sdr2hdr]   -> hdr output
2. one hdr layer      -> vop[bypass]  |
                                      | -> hdr output
   one/more sdr layer -> vop[sdr2hdr] |

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I042baf68d36f6f9a089d81928c783e52a2b21499
2021-06-07 14:31:24 +08:00
Ding Wei
c6ce255dd0 arm64: dts: rockchip: rk3568: vepu && jpegd: Disable auto freqence set
reason: In rk356x, due to the hardware, vepu and jpegd should
disable auto freqence.

Change-Id: I2da5b5a7fc3b86180aef28b378a7b651e31a6b7a
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-06-07 11:51:01 +08:00
Cai YiWei
dd1b793a86 media: rockchip: ispp: reserved memory using rdma_sg ops
Change-Id: I7bc3cb977c56fc6c81c15baa67d38e3ce59a409f
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-06-07 11:05:48 +08:00
Cai YiWei
72e161eacb media: rockchip: isp: reserved memory using rdma_sg ops
Change-Id: Ia01770c3f54bfbb3d65a73c7db0e8ab8730ab29d
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-06-07 11:05:48 +08:00
William Wu
78c5b7ae9f usb: dwc3: gadget: fix XferInProgress event for isoc ep
On XferInProgress events, if the endpoint is isochronous
type, do not kick transfer directly even if the pending_list
isn't empty. Because it needs to wait for XferNotReady
event to start isoc transfer. Without this patch, it will
trigger a large number of unuseful XferInProgress events,
and easily cause loss of synchronization data if the cpu
core unable to handle the dwc3 thread interrupt in time.

Fixes: b77df21107 ("usb: dwc3: gadget: Continue to process pending requests")
Change-Id: I14d16240a6e10db466fd9822b4fdc35d79817508
Signed-off-by: William Wu <william.wu@rock-chips.com>
2021-06-04 22:20:12 +08:00
Yiqing Zeng
b6d806aab1 media: i2c: imx178 fix some errors for exposure and gain
1.fix vts_def/hts_def wrong value;
2.fix gain wrong value;

Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Change-Id: I9e0d8b403eb57b4e031ef87179c5dc327628ed9b
2021-06-04 17:50:31 +08:00
Andy Yan
73444eb25e drm/rockchip: vop2: Support set background color from userspace
Add a BACKGROUND property for each crtc.
8 bit for every color channel(r/g/b/y/u/v).

Change-Id: I9439bf16a8142e936508e843cc25b6263e2f661d
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-06-04 16:27:13 +08:00
Zhichao Yu
cd98dfb7fd media: i2c: support imx462 sensor driver
1.support mipi 1080P@30fps linear/hdr2 dol mode
2.support lvds 1080P@60fps linear mode and 1080P@30fps hdr2 dol mode

Change-Id: Ic2cce1f9119cf27685c35c99993bb1c82bd3838a
Signed-off-by: Zhichao Yu <zhichao.yu@rock-chips.com>
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
2021-06-04 16:19:39 +08:00
Shunqing Chen
b5995924b3 drm: rockchip: rk618: hpd io pull down
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I309bc695dbd94281880ce934415c1864c5abc8c8
2021-06-04 16:17:15 +08:00
Liang Chen
ce633552f7 sched/core: reduce rescheduling IPI for non-preempt kernel
It is not necessary to send rescheduling IPI when target cpu is not
idle for non-preempt kernel, because the target cpu will pick all the
tasks on the run-queue before enter idle.

Test this patch on RK3568-NVR, make cpu load to 100% with command:

taskset 01 yes > /dev/null &
taskset 02 yes > /dev/null &
taskset 04 yes > /dev/null &
taskset 08 yes > /dev/null &

So that the cpu will not enter idle.

without the patch, 32 channel video@25fps:
[root@RK356X:/]# cat /proc/interrupts | grep IPI0; sleep 10; cat /proc/interrupts | grep IPI0
IPI0:     74204      58815      99596      81177       Rescheduling interrupts
IPI0:     79503      76143     106149      87676       Rescheduling interrupts

with the patch, 32 channel video@25fps:
[root@RK356X:/]# cat /proc/interrupts | grep IPI0; sleep 10; cat /proc/interrupts | grep IPI0
IPI0:     28814      59314      60173      56759       Rescheduling interrupts
IPI0:     28814      59314      60173      56759       Rescheduling interrupts

Change-Id: I0d45a3d999696503124e693e7d6e145df719174a
Signed-off-by: Liang Chen <cl@rock-chips.com>
2021-06-04 14:23:45 +08:00
Liang Chen
a6baf49997 arm64: dts: rockchip: rk356x: enable bus_npu for some boards
Enable bus_npu so that we can enable npu@1.0G safely when necessary.

Change-Id: I1a6ce1652aba7bafe91135bc79881cad0d5980ce
Signed-off-by: Liang Chen <cl@rock-chips.com>
2021-06-04 14:23:45 +08:00
Jianqun Xu
fd1e62d491 Documentation: devicetree: rockchip-io-domain add rk3568 support
RK3568 has 3 pmu io-domain, pmuio0/1/2, but the pmuio0 is 1.8v only, and
pmuio1 is 3.3v only, only pmuio2 support to select 1.8v or 3.3v.

RK3568 also has 7 io-domain, vccio1/2/3/4/5/6/7, but the vccio2
defaultly selected by the FLASH_VOL_SEL(GPIO0_A7).

Change-Id: I55ea1263c641112705b1443ff919c508cb3be2f0
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-06-04 14:23:45 +08:00
Shawn Lin
275b0b1950 arm64: dts: rockchip: remove all rockchip,txclk-tapnum for rk356x
We finally decide to set 16 for tx delay in driver, so no need for
dts to set it now.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I642ed3039db5410ca478b255166d07a035e971aa
2021-06-04 14:23:44 +08:00
Shawn Lin
aa4a1a95ed mmc: sdhci-of-dwcmshc: Set default tx delay to 16
According to the new test result, set tx delay to 16
by default.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I8e0bacfbf14f8c5db60a4d56a624d63c49e23051
2021-06-04 14:23:44 +08:00
Sugar Zhang
32c877b98b ASoC: rockchip: i2s-tdm: Remove sync reset for latest soc
Do sync reset only for PX30/RK1808/RK3308, because the BUG 'fsync
is out of sync' had been fixed on the latest version controller.

Change-Id: Ia4cd711a213cc03221726f7b6e89de3c317dc965
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2021-06-04 14:23:44 +08:00
Cai YiWei
69d256016a media: rockchip: isp: isp21 get 3a stats from ddr
Change-Id: I223a654d65377f866e1b71d0652f889a5ffbf079
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-06-04 14:23:44 +08:00
Cai YiWei
a396d69b9e media: rockchip: isp: apply en params if no match for isp21
Change-Id: I72bf7551ac78d035561405d9a61bb40990925085
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-06-04 14:23:44 +08:00
Cai YiWei
c1b4d98545 media: rockchip: isp: apply en params if no match for isp20
Change-Id: I47bc2b58aae016df1bb6ba0a1425431bed53ca9d
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-06-04 14:23:44 +08:00
Cai YiWei
975b743484 media: rockchip: isp: add bt601/bt709/bt2020 colorspace
rkisp-isp-subdev pad2 to change colorspace and quantization

Change-Id: I077eb9482cd09119c11f2515e848dca203c42357
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-06-04 14:23:44 +08:00
Shawn Lin
f0d532ee66 PCI: rockchip: dw: Restore DBI COMMAND register
It isn't sticky when link goes down for whatever reason.
If devices want to reset the modules by puting link into D3
state or whatever, we should restore it the. Otherwise devices
cannot access RC's resource even if the link is recovered.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ie5b5a0b7f6ab03961658b4217c9db2cada0edb93
2021-06-04 14:23:44 +08:00
Jianqun Xu
2e213f3bdf arm64: dts: rockchip: pinconf.dtsi add output level with pull up/down
Change-Id: I3ce795514365e3f7f2302dfbc1deb73884b645be
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-06-04 14:23:44 +08:00
Jianqun Xu
a38e11873b ARM: dts: rockchip: pinconf.dtsi add output level with pull up/down
Change-Id: Id40ca9a6efbbfa05df6bc4ebe36a07874b9a837d
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-06-04 14:23:44 +08:00
Zefa Chen
ed104924c3 media: spi: add motor driver ms41908
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ifad84f0abad6af9ae3b97a5efe9a89842a18e9c7
2021-06-04 14:23:44 +08:00
Zefa Chen
4f4dc8f1f0 include: uapi/linux/rk_vcm_head.h update to v0.2.0
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I07fbfd6f0c18845ae6d3557a5746b95aa7c96dbd
2021-06-04 14:23:44 +08:00
Huang zhibao
caf0e14b16 arm64: dts: rockchip: nvr: incluede rk3568-nvr-linux instead of rk3568-linux
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I954c67c806714e72043e9613e7fa13d1e04069cf
2021-06-04 14:23:44 +08:00
Andy Yan
b541643572 drm/rockchip: disable output poll when shutdown
we find sometimes hdmi will trigger a plugout irq when system
shutdown, but actually it is connected, so when drm core run
a connect->detect callback it will find the hdmi is on connected
state, than run drm_fb_helper_hotplug_event, this drive all
the drm system run again.

But we are on the system shutdwon process, the running
drm core may cause many problem.

So we disable output poll to prevent drm_fb_helper_hotplug_event
when system shutdown.

And also the we should figure out why hdmi driver trigger the
wrong plugout irq at shutdown process.

Requesting system reboot
[   26.466261] cpu cpu0: min=816000, max=816000
[   26.476177] dwhdmi-rockchip fe0a0000.hdmi: dw hdmi plug out
[   26.492452] rockchip_drm_platform_shutdown
[   26.579331] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_transfer] *ERROR* generic write fifo is full
[   26.580141] panel-simple-dsi fe060000.dsi.0: failed to write dcs cmd: -110
[   26.581771] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_transfer] *ERROR* generic write fifo is full
[   26.582577] panel-simple-dsi fe060000.dsi.0: failed to write dcs cmd: -110
[   26.667890] rkisp_hw fdff0000.rkisp: rkisp_hw_shutdown
[   26.675465] fan53555-regulator 0-001c: fan53555..... reset
[   26.676891] fan53555-regulator 0-001c: reset: force fan53555_reset ok!
[   26.677867] mpp_rkvdec2 fdf80200.rkvdec: shutdown device
[   26.678381] mpp_jpgdec fded0000.jpegd: shutdown device
[   26.678853] mpp-iep2 fdef0000.iep: shutdown device
[   26.679288] mpp_vepu2 fdee0000.vepu: shutdown device
[   26.679745] mpp_vdpu2 fdea0400.vdpu: shutdown device
[   26.680201] mpp_rkvenc fdf40000.rkvenc: shutdown device
[   26.680664] mpp_rkvenc fdf40000.rkvenc: shutdown success
[   26.777723] rockchip_drm_output_poll_changed
[   26.890773] rockchip-vop2 fe040000.vop: [drm:vop2_crtc_atomic_enable] Update mode to 1080x1920p60, type: 16 for vp1
[   27.392083] rockchip-vop2 fe040000.vop: [drm:vop2_disable_all_planes_for_crtc] *ERROR* wait win close timeout
[   27.393012] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_encoder_enable] final DSI-Link bandwidth: 880 x 4 Mbps

Change-Id: Ib1454636b1b35bf310252ab9469a107fcbf7e37c
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-06-04 14:23:44 +08:00
Andy Yan
4231420df4 drm/rockchip: vop2: Fix color key shift to 10bit
Fixes: 8c59d20b75 ("drm/rockchip: vop2: Add color key support")
Change-Id: I449f32eb9e69297b2c37feb85611a550310f2304
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-06-04 14:23:43 +08:00
Ding Wei
2b9f8eaf21 arm64: dts: rockchip: rk3568: Set rcb-min-with=512 on rkvdec2
Change-Id: I0735307ea023517c731ed33387f5f074b0362841
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-06-04 14:23:43 +08:00
Ding Wei
9cf57bf5c7 video: rockchip: mpp: rkvdec2: add rcb-min-width info for rcb usage
tips:
    for rk356x, when image width less than 512, it may occur very
small probability for sram read and write.

Change-Id: I57bdfeb776dc0762870f3d7a3a6d81a1c146240d
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-06-04 14:23:43 +08:00
Huang zhibao
014548c589 arm64: dts: rockchip: rk3568-nvr: io-domian all default set 3.3V for rk356x boards
io-domian  default as:
&pmu_io_domains {
    status = "okay";
    pmuio2-supply = <&vcc_3v3>;
    vccio1-supply = <&vcc_3v3>;
    vccio3-supply = <&vcc_3v3>;
    vccio4-supply = <&vcc_3v3>;
    vccio5-supply = <&vcc_3v3>;
    vccio6-supply = <&vcc_3v3>;
    vccio7-supply = <&vcc_3v3>;
};
TODO:
Need to be modified according to the actual hardware
for example rk3568-nvr-demo v10/V12 board:
&pmu_io_domains {
    status = "okay";
    pmuio2-supply = <&vcc_3v3>;
    vccio1-supply = <&vcc_3v3>;
    vccio3-supply = <&vcc_3v3>;
    vccio4-supply = <&vcc_1v8>;
    vccio5-supply = <&vcc_3v3>;
    vccio6-supply = <&vcc_1v8>;
    vccio7-supply = <&vcc_3v3>;
};

Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I707ee8fbce7564db908ca0682c3ead5bf621f95e
2021-06-04 14:23:43 +08:00
Huang zhibao
4faa44ee7f arm64: dts: rockchip: rk3566-box: io-domian all default set 3.3V for rk356x boards
io-domian  default as:
&pmu_io_domains {
    status = "okay";
    pmuio2-supply = <&vcc_3v3>;
    vccio1-supply = <&vcc_3v3>;
    vccio3-supply = <&vcc_3v3>;
    vccio4-supply = <&vcc_3v3>;
    vccio5-supply = <&vcc_3v3>;
    vccio6-supply = <&vcc_3v3>;
    vccio7-supply = <&vcc_3v3>;
};
TODO:
Need to be modified according to the actual hardware
for example rk3566-box-demo v10 board:
&pmu_io_domains {
    status = "okay";
    pmuio2-supply = <&vcc_3v3>;
    vccio1-supply = <&vcc_3v3>;
    vccio3-supply = <&vcc_3v3>;
    vccio4-supply = <&vcc_1v8>;
    vccio5-supply = <&vcc_3v3>;
    vccio6-supply = <&vcc_1v8>;
    vccio7-supply = <&vcc_3v3>;
};

Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: Ifda027a8ceb0bd9cb7ae34a6f0599100abc431b4
2021-06-04 14:23:43 +08:00
Yiqing Zeng
ab1a6c6c64 media: i2c: sc035hgs fix time sequence error when streaming on
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Change-Id: Ic2363298f81d07a49dc3544473f55a5f08e05133
2021-06-04 14:23:43 +08:00
Finley Xiao
a2367b28c4 ARM: dts: rv1126: Modify pvtm voltage table for CPU and NPU
In order to improve stability for CPU and NPU.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I2934ce2a0ceb9fd8816b0e4711e40c800348f040
2021-06-04 14:23:43 +08:00
Zorro Liu
63c22fafe5 drm/rockchip: ebc_dev: release version v1.14
1.add EPD_OVERLAY_WHITE mode to support draw white line
2.add EPD_FORCE_FULL mode which can be used under overlay mode

Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Change-Id: I6d4d3f12fe4e100904f181588bc51d5147fd8453
2021-06-04 14:23:43 +08:00
Radu Rendec
d8d6cb35c4 UPSTREAM: kernfs: Improve kernfs_notify() poll notification latency
kernfs_notify() does two notifications: poll and fsnotify. Originally,
both notifications were done from scheduled work context and all that
kernfs_notify() did was schedule the work.

This patch simply moves the poll notification from the scheduled work
handler to kernfs_notify(). The fsnotify notification still needs to be
done from scheduled work context because it can sleep (it needs to lock
a mutex).

If the poll notification is time critical (the notified thread needs to
wake as quickly as possible), it's better to do it from kernfs_notify()
directly. One example is calling sysfs_notify_dirent() from a hardware
interrupt handler to wake up a thread and handle the interrupt in user
space.

Change-Id: If4983487f6aadecfb2185acbafeff47a1c7bb66f
Signed-off-by: Radu Rendec <radu.rendec@gmail.com>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 03c0a9208b)
2021-06-04 14:23:43 +08:00
Zefa Chen
06fc5af065 media: platform: cif fix fs/fe count error
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I56a6f5de22065f246a419f698385e3620142fd57
2021-06-04 14:23:43 +08:00
Wang Panzhenzhuan
4346e71373 media: i2c: sc200ai: fix set exposue bug
ctrl->val = ctrl->val * 2 will return
ctrl->val to v4l2 framework, and if next time
set ctrl->val is 2 * previous ctrl->val, will not actually set;
so fix it.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I965f33f2e592a88ab2b8f6e362ca399260fe98ab
2021-06-04 14:23:43 +08:00
David Wu
066a36326e arm64: dts: rockchip: Add QSGMII support for rk3568-evb2
Maybe some people want to use the Ethernet function of evb2,
which is turned on by default so that the Ethernet can work.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I314ac4e0d51804ea3463735d6cc9c90a536d173a
2021-06-04 14:23:43 +08:00
Sugar Zhang
03eca20525 ASoC: rockchip: i2s-tdm: Delay for reset successfully
This patch Adds delay after reset deassert to make sure
reset done before do enabling xfer.

Considering the follow situation:

- i2s_mclk for 8K capture [2.048M]
- i2s_hclk for i2s register access [150M]
- pclk_cru for cru register access [100M]

       SW                               HW

i2s reset assert   [pclk_cru]           |
        |                               |
   delay time                           |
        |                       i2s reset assert   [i2s_mclk]
i2s reset deassert [pclk_cru]           |
        |                               |
i2s xfer enable    [i2s_hclk]           |
        |                       i2s reset deassert [i2s_mclk]

Obviously, pclk_cru(10ns per cycle) is much faster than i2s_mclk
(500ns per cycle). so delay should be added after reset deassert
to make sure hw reset done. Otherwise, the race between reset and
enable xfer maybe break i2s data aligned.

Fixes: A 10us delay is enough

       SW                               HW

i2s reset assert   [pclk_cru]           |
        |                               |
   delay 10us                           |
        |                       i2s reset assert   [i2s_mclk]
i2s reset deassert [pclk_cru]           |
        |                               |
   delay 10us                           |
        |                       i2s reset deassert [i2s_mclk]
i2s xfer enable    [i2s_hclk]           |
        |                               |

Change-Id: Id370b0aa13f771053841ce04a554b408e9e3c831
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2021-06-04 14:23:43 +08:00
Jisheng Zhang
b5fc70f671 UPSTREAM: mmc: sdhci-of-dwcmshc: fix rpmb access
Commit a44f7cb937 ("mmc: core: use mrq->sbc when sending CMD23 for
RPMB") began to use ACMD23 for RPMB if the host supports ACMD23. In
RPMB ACM23 case, we need to set bit 31 to CMD23 argument, otherwise
RPMB write operation will return general fail.

However, no matter V4 is enabled or not, the dwcmshc's ARGUMENT2
register is 32-bit block count register which doesn't support stuff
bits of CMD23 argument. So let's handle this specific ACMD23 case.

From another side, this patch also prepare for future v4 enabling
for dwcmshc, because from the 4.10 spec, the ARGUMENT2 register is
redefined as 32bit block count which doesn't support stuff bits of
CMD23 argument.

Fixes: a44f7cb937 ("mmc: core: use mrq->sbc when sending CMD23 for RPMB")
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201229161625.38255233@xhacker.debian
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ic31c6f626b869620a2656cb84ecb01fe03700a4e
(cherry picked from commit ca1219c0a7)
2021-06-04 14:23:43 +08:00
Aapo Vienamo
382b763ef5 UPSTREAM: mmc: sdhci: Export sdhci_request()
Allow SDHCI drivers to hook code before and after sdhci_request() by
making it externally visible.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I3e144e8f597d49479fbed8528519c257f740d3f2
(cherry picked from commit d462c1b474)
2021-06-04 14:23:43 +08:00
Jianqun Xu
0bde59fad7 ARM: configs: rockchip_defconfig enable ION_CMA_HEAP
Select ION_CMA_HEAP to support cma memory allocated from ion driver.

Change-Id: I9bb44004e8e86e00795f85c31946eb8bb3f12006
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-06-04 14:23:42 +08:00