commit b16bef60a9 upstream.
The driver and its bindings, before commit 04f9f068a6 ("regulator:
s5m8767: Modify parsing method of the voltage table of buck2/3/4") were
requiring to provide at least one safe/default voltage for DVS registers
if DVS GPIO is not being enabled.
IOW, if s5m8767,pmic-buck2-uses-gpio-dvs is missing, the
s5m8767,pmic-buck2-dvs-voltage should still be present and contain one
voltage.
This requirement was coming from driver behavior matching this condition
(none of DVS GPIO is enabled): it was always initializing the DVS
selector pins to 0 and keeping the DVS enable setting at reset value
(enabled). Therefore if none of DVS GPIO is enabled in devicetree,
driver was configuring the first DVS voltage for buck[234].
Mentioned commit 04f9f068a6 ("regulator: s5m8767: Modify parsing
method of the voltage table of buck2/3/4") broke it because DVS voltage
won't be parsed from devicetree if DVS GPIO is not enabled. After the
change, driver will configure bucks to use the register reset value as
voltage which might have unpleasant effects.
Fix this by relaxing the bindings constrain: if DVS GPIO is not enabled
in devicetree (therefore DVS voltage is also not parsed), explicitly
disable it.
Cc: <stable@vger.kernel.org>
Fixes: 04f9f068a6 ("regulator: s5m8767: Modify parsing method of the voltage table of buck2/3/4")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Message-Id: <20211008113723.134648-2-krzysztof.kozlowski@canonical.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 4d521943f7 ]
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING
Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW
ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH
Fixes: a1a8b4594f ("NFC: pn544: i2c: Add DTS Documentation")
Fixes: 6be88670fc ("NFC: nxp-nci_i2c: Add I2C support to NXP NCI driver")
Fixes: e3b3292215 ("dt-bindings: can: tcan4x5x: Update binding to use interrupt property")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for tcan4x5x.txt
Link: https://lore.kernel.org/r/20201026153620.89268-1-krzk@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit b0ff9b5907 ]
Add property "pinctrl-names" to swap pin mode between gpio and dpi mode.
Set the dpi pins to gpio mode and output-low to avoid leakage current
when dpi disabled.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 26d5bb9e4c ]
FMAN DMA read or writes under heavy traffic load may cause FMAN
internal resource leak; thus stopping further packet processing.
The FMAN internal queue can overflow when FMAN splits single
read or write transactions into multiple smaller transactions
such that more than 17 AXI transactions are in flight from FMAN
to interconnect. When the FMAN internal queue overflows, it can
stall further packet processing. The issue can occur with any one
of the following three conditions:
1. FMAN AXI transaction crosses 4K address boundary (Errata
A010022)
2. FMAN DMA address for an AXI transaction is not 16 byte
aligned, i.e. the last 4 bits of an address are non-zero
3. Scatter Gather (SG) frames have more than one SG buffer in
the SG list and any one of the buffers, except the last
buffer in the SG list has data size that is not a multiple
of 16 bytes, i.e., other than 16, 32, 48, 64, etc.
With any one of the above three conditions present, there is
likelihood of stalled FMAN packet processing, especially under
stress with multiple ports injecting line-rate traffic.
To avoid situations that stall FMAN packet processing, all of the
above three conditions must be avoided; therefore, configure the
system with the following rules:
1. Frame buffers must not span a 4KB address boundary, unless
the frame start address is 256 byte aligned
2. All FMAN DMA start addresses (for example, BMAN buffer
address, FD[address] + FD[offset]) are 16B aligned
3. SG table and buffer addresses are 16B aligned and the size
of SG buffers are multiple of 16 bytes, except for the last
SG buffer that can be of any size.
Additional workaround notes:
- Address alignment of 64 bytes is recommended for maximally
efficient system bus transactions (although 16 byte alignment is
sufficient to avoid the stall condition)
- To support frame sizes that are larger than 4K bytes, there are
two options:
1. Large single buffer frames that span a 4KB page boundary can
be converted into SG frames to avoid transaction splits at
the 4KB boundary,
2. Align the large single buffer to 256B address boundaries,
ensure that the frame address plus offset is 256B aligned.
- If software generated SG frames have buffers that are unaligned
and with random non-multiple of 16 byte lengths, before
transmitting such frames via FMAN, frames will need to be copied
into a new single buffer or multiple buffer SG frame that is
compliant with the three rules listed above.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 0df82dcd55 ]
Fully compatible with mcp2515, the mcp25625 have integrated transceiver.
This patch add the mcp25625 to the device tree bindings documentation.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 321cc359d8 ]
We need this new compatibility string as we experienced different behavior
for this 10/100Mbits/s macb interface on this particular SoC.
Backward compatibility is preserved as we keep the alternative strings.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 7e5d05e18b ]
We need to introduce a new compatible name for the Meson-AXG SoC
in order to support the RMII 100M ethernet PHY, since the PRG_ETH0
register of the dwmac glue layer is changed from previous old SoC.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 03d9fbc397 ]
The Meson8m2 SoC is a variant of Meson8 with some updates from Meson8b
(such as the Gigabit capable DesignWare MAC).
It is mostly pin compatible with Meson8, only 10 (existing) CBUS pins
get an additional function (four of these are Ethernet RXD2, RXD3, TXD2
and TXD3 which are required when the board uses an RGMII PHY).
The AOBUS pins seem to be identical on Meson8 and Meson8m2.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Support was added based on Goodix GitHub repo [1]. There are two major
differences between gt1151 and currently supported devices (gt9x):
* CONFIG_DATA register has 0x8050 address instead of 0x8047,
* config data checksum has 16-bit width instead of 8-bit.
Also update goodix_i2c_test() function, so it reads ID register (which
has the same address for all devices) instead of CONFIG_DATA (because
its address is known only after reading ID of the device).
[1] https://github.com/goodix/gt1x_driver_generic
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Change-Id: I12f2f9e745c2f14ff45b3f967fbf91e629230989
PD#SWPL-17563
Problem:
add power domain control API for TM2 and SM1
Solution:
add power domain control API for TM2 and SM1
Verify:
T962E2
Change-Id: I2587b2b554281ee7c81d77e8978a2640e5f73be5
Signed-off-by: zhiqiang liang <zhiqiang.liang@amlogic.com>
Signed-off-by: chunlong.cao <chunlong.cao@amlogic.com>
From: Olliver Schinagl <oliver@schinagl.nl>
This patch adds a bit-banging gpio PWM driver. It makes use of hrtimers,
to allow nano-second resolution, though it obviously strongly depends on
the switching speed of the gpio pins, hrtimer and system load.
Each pwm node can have 1 or more "pwm-gpio" entries, which will be
treated as pwm's as part of a pwm chip.
Change-Id: Idd42bf6d79f8ce52275a15965b02af470f28da7c
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
PD#SWPL-5395
Problem:
sm1 support double-edge trigger, current code do not support.
Solution:
add relatvie bitmask to support this function.
Verify:
ptm & sm1_skt
Change-Id: I48ebc9b38db868f946c49b6fd5f98d427b2669df
Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
PD#SWPL-365
Problem:
System can't use resample function on GVA project.
Solution:
Add resample node in axg_s420_v03gva.dts
Verify:
Passed on s420
Change-Id: Ie48c579e9e9f6e1d61147f5410c95e5bca55b0a7
Signed-off-by: riqun.ou <riqun.ou@amlogic.com>
audio: codecs: fix TL1 reference board volume too small [2/2]
PD#SWPL-2652
Problem:
X301/T309 AMP volume configured to small
Solution:
change the default external AMP codec mixer name to a match
the ini parsing function in audio hal.
TODO: need dynamically check the different codec mixer name
in ini file.
Verify:
verify by x301
Change-Id: Iba835d37ea02bec3095556d54fbf327bd6390904
Signed-off-by: Jian Xu <jian.xu@amlogic.com>
audio: codec: the DAC gain set of acodec not work [1/1]
PD#SWPL-3134
Problem:
the DAC gain set is not work
Solution:
update and aml_codec_tl1_acodec.c, change the method of
getting codec pointer from kcontrol pointer.
Verify:
verify by T962x2_X301 board
Change-Id: I02f02b73fab3b8391ef4866a71ffaf0d48bbbbbf
Signed-off-by: Shuyu Li <shuyu.li@amlogic.com>
audio: add tas5805 [1/1]
PD#SWPL-3081
Problem:
compatiable tas5805 module
Solution:
add tas5805 drivers
Verify:
T962X2
Change-Id: I3608e47fe768af0f924751a8bcc103389d0811de
Signed-off-by: Yonghao Jiao <yonghao.jiao@amlogic.com>
audio: auge: add HDMIRX SPDIF in support [1/2]
PD#SWPL-2956
Problem:
HDMI in DTS/Dolby input has noise when treated to LPCM
Solution:
By default,we are using PAO mode for HDMIRX,but we have not
enabled the PaPb search for 61937 raw data input, after add
that, we can detect the raw data, but it can not by clear when
switch from NONE-LPCM to NONE-LPCM, need add IRQ function to
clear that by sw.we enabled spdif in from HDMIRX, which is the same
design as txl/txlx.we can get the Pc information now.
also we add a new interface to set spdif in source when hdmirx input.
Verify:
x301
Change-Id: I3c4e8b387308ef862a069c29d15b8b5a9e865564
Signed-off-by: Jian Xu <jian.xu@amlogic.com>
udio: auge: tl1 acodec mapping to data 1 [1/2]
PD#SWPL-3277
Problem:
tl1 internal codec volume can by adjusted
Solution:
configure the acodec data layout mapping
to a fixed volume
Verify:
x301
Change-Id: I14d3762b39a0a5291722ef5489026f10fc960120
Signed-off-by: Jian Xu <jian.xu@amlogic.com>
Conflicts:
arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts
audio: Fix TDM not wokring on HDMI I2S in [1/1]
PD#SWPL-2887
Problem:
When TDM is used for HDMI I2S in, the solt set is wrong.
Solution:
Fix the lane max value from 3 to 4
Verify:
A113
Change-Id: I33f5ca21bf1e2407d83fa5d0f22e21f7b1f5e749
Signed-off-by: yujie.wu <yujie.wu@amlogic.com>
audio: codec: fix to resume ad82584's volume after suspend [1/1]
PD#SWPL-3456
Problem:
1) After suspend, volume is not resume
2) ARC connected, still sound out from spk
Solution:
1) save channel volume when suspend, then resume the volume
2) add mute mixer control for ad82584
Verify:
x301
Change-Id: Ic6e7502e3f9689cc2d1053295f26aaf4d5be2603
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
audio: auge: add vad driver [1/1]
PD#SWPL-2404
Problem:
VAD for wake up
Solution:
Add vad driver to fetch VAD buffer and ALSA buffer, in userspace, they
will be combined for wakeup engine
Verify:
x301
Change-Id: I3b4de5fdfe173ce18e58a187a3adeda601e226b3
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
audio: fix pop snd after bootup [2/2]
PD#SWPL-3178
Problem:
output big pop noise after system boot up.
Solution:
Add zero and then unmute the stream.
NOTICE: user should unmute the AD82584F after boot.
Verify:
local verified.
Change-Id: I21555318f9347c5340a28f7e5cf0e3e2cde849a0
Signed-off-by: Shuai Li <shuai.li@amlogic.com>
audio: fix no audio after resume of ad82584f [1/1]
PD#SWPL-4090
Problem:
No audio after suspend and resume.
Suspend won't save the mute value,
and after resume, it could not be restored.
Solution:
Add a mute val to save when suspend,
and after resume, restore the mute value.
Verify:
Verified by QA.
Change-Id: Ie24bb11f5c565048391846a66b5d12bab1d55666
Signed-off-by: Shuai Li <shuai.li@amlogic.com>
audio: auge: fix sharebuffer channel map [1/1]
PD#SWPL-2645
Problem:
play ddp source, then play pcm source, no sound
Solution:
1. fix same source control and channel map issue
2. i2s 8ch, spdif 2ch, channels are not mapped, make spdif 8 channel mask
3. when same source used, keep mpll use same mpll
Verify:
x301
Change-Id: I2fe4bbcbcbfff0a1c1a6cebf61d1da5aba9b7a9d
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
Conflicts:
arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts
audio: add stream mute and continuous clk [1/1]
PD#SWPL-2952
Problem:
Pop noise could be heard
when switching between sources.
Solution:
1. Add stream digital mute functions.
2. continuous clock to eliminate
the clk reset issue.
Verify:
Local verified.
Change-Id: I372f4c03aaf875d75aa903c9c2dfda00619af000
Signed-off-by: Shuai Li <shuai.li@amlogic.com>
dts: tl1: enable resample for tl1 [1/2]
PD#SWPL-3365
Problem:
not resample for audio in, so output in wrong sample rate
Solution:
1. enable resample in dts
2. fix to check whether resample is needed
Verify:
x301
Change-Id: I99238cc21a00ab53df6a1f8ab1703bc9ab48cbaa
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
Conflicts:
arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts
PD#SWPL-1513
Problem:
ab update can not work on P
Solution:
add dtsi for ab update for P
Verify:
test pass in ampere
Change-Id: I6ff219170a16c0081fba7297110e8dfaadcff401
Signed-off-by: Xindong Xu <xindong.xu@amlogic.com>
PD#172587: watchdog: meson: add watchdog support for tl1
TL1's watchdog is same with G12A.
Change-Id: Iaa8c502e6a8889a33ed2875e7a16cca07873738a
Signed-off-by: Bo Yang <bo.yang@amlogic.com>
PD#172587: pwm: meson: add support for tl1
Add support for tl1.
Change-Id: I5db1be16765a8e2f2a07815e6d7d139eec4dcf16
Signed-off-by: bichao.zheng <bichao.zheng@amlogic.com>
PD#172286: this commit changes mainly for GVA
1) keypad: add pca9557 keypad driver for new mic board D607.
Change-Id: I0d9ec9626362b3d87d6c55e5c967bfa4486b1472
Signed-off-by: jinrong.liao <jinrong.liao@amlogic.com>
Signed-off-by: Victor Wan <victor.wan@amlogic.com>
Conflicts:
drivers/md/dm-bufio.c
drivers/media/dvb-core/dvb_frontend.c
drivers/usb/dwc3/core.c
drivers/usb/gadget/function/f_fs.c
PD#168480: reboot: meson: standardize the compatible property
Use 'amlogic,reboot' instead of 'aml,reboot'.
'aml,reboot' will be removed later.
Change-Id: I7d16795c98aa293fe204121ccd7da41c7d078f77
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Bo Yang <bo.yang@amlogic.com>
PD#168480: iio: adc: meson: add sar adc support for txl
Change-Id: I9febffdb4fef582f5a91138491ae87d11ca240ee
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Bo Yang <bo.yang@amlogic.com>
PD#168480: irqchip: meson: add gpio IRQ support for txl
Change-Id: I03b32a3ffe4a7e9b63631ac5e593bcbf346b8765
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Bo Yang <bo.yang@amlogic.com>
PD#168480: i2c: meson: add support for txl
Change-Id: I0c4fe9d2e6caec0cfa812af28476774db69a4e89
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Bo Yang <bo.yang@amlogic.com>
PD#168480: pinctrl: txl: add pinctrl & gpio support for txl
Change-Id: I2496cdebfc283e90825f5dd7d20b0e16f57158d2
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Bo Yang <bo.yang@amlogic.com>
PD#168480: clk: txl: initial add clock driver
remove CLK_SET_RATE_PARENT flag for spicc.
If add CLK_SET_RATE_PARENT, it will change clk81 rate when set
spicc clock rate.
Change-Id: I80fec2c6d10611994ff40b06307e39b51ddb5a1a
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Bo Yang <bo.yang@amlogic.com>
PD#164751: spicc: add dma and enhance features of axg/txhd/g12a/g12b.
1. fix TESTREG bits defination error;
2. fix cs-gpio error in slave setup;
3. reset fifo to avoid successive fifo error before tansfer;
4. add enhance feature of cs-preload delay control;
5. add auto io delay control;
6. add enhance feature of tt/ti delay control;
7. fix clk error which occurred certainly when sencond spicc added;
8. surpport both auto core clk and fixed core clk rate setting:
set dts "fixed_core_rate = <200000000(example)>" to use fixed
core rate. otherwise, to use auto core clk.
9. support loop-back mode;
10. support DMA transfer;
11. must delete 1000M from parent clk.
12. It will be wrong when enhance divider=2. we have to add a flag
CLK_DIVIDER_PROHIBIT_ZERO to shield against it.
Change-Id: I820a52e6d31d3fe2e3615a0f4c5a07c17d11914d
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
