For various reasons based on the allocator behaviour and typical
use-cases at the time, when the max32_alloc_size optimisation was
introduced it seemed reasonable to couple the reset of the tracked
size to the update of cached32_node upon freeing a relevant IOVA.
However, since subsequent optimisations focused on helping genuine
32-bit devices make best use of even more limited address spaces, it
is now a lot more likely for cached32_node to be anywhere in a "full"
32-bit address space, and as such more likely for space to become
available from IOVAs below that node being freed.
At this point, the short-cut in __cached_rbnode_delete_update() really
doesn't hold up any more, and we need to fix the logic to reliably
provide the expected behaviour. We still want cached32_node to only move
upwards, but we should reset the allocation size if *any* 32-bit space
has become available.
Reported-by: Yunfei Wang <yf.wang@mediatek.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/033815732d83ca73b13c11485ac39336f15c3b40.1646318408.git.robin.murphy@arm.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
(cherry picked from commit 5b61343b50)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: If5b30d12f8d0cef77cfd2f3fe19e99be4897dc0e
According to the latest otp table, do the corresponding change
for 100M and 10M bgs.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I3c56562e1839fd104c7467a5a28469edd8f49db7
Userland can use the flag ROCKCHIP_BO_DMA32 to tell drm gem to get pages
limit to 4GiB memory.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Icdc77efae71ed6272f425ad93a07c8d3e98a9ca4
Test on RK3588 with Unigraf DPR-100 DP reference sink.
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I01c099e1ad25ab92d9e8efef13c0c2304115a957
1. Set different pre_emphasize strength for rv1106 and rv1103.
- Set pre_emphasize strength to 0x03 for cpu verison_0;
- Set pre_emphasize strength to 0x01 for cpu verison_1;
2. Bypass Squelch detector calibration to improve receiving
sensitivity.
- Before: E-17 248.7mv, E-16 112.6mv
- After: E-17 150mv, E-16 98.8mv
Note:
E-17 and E-16 is on page 3 of the "USB 2.0 Electrical Compliance Test Specification"
https://usb.org/document-library/usb-20-electrical-compliance-test-specification-version-107
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I0d668b3d126583ada03d9675e0175f02537d915f
The four jpeg enc core are not the same queue, and there is only one
core in a single queue.
So, can not use queue->cores to get different core.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: If9f56e351af23871e68b83de1917f26e88382dfc
Hdmi controller hardware automatic flt has compatibility issues.
For example, the 980B protocol analyzer cannot recognize signal.
Therefore, software flt is needed.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ie32ac705622048ff71cb301e2e06d5673b5889cc
support:
1. Use EXTCON Subsystem to detect charger cables for charging
2. Set current limit of battery for over current protection
3. Set power limit of charger for overload protection
4. control charge pump charging current/voltage
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I97a461996977d418a47e6075202d82c5b87bd17b
The 32k clock is used for hp timer on RK3588, and it should be always on.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ie28a16308521fadc33ae91c25215f30bd2265f33
According to the CEA-861, 1280x720p25 Hblank timing up to 2680,
and all standard video format timings are less than 3000
Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com>
Change-Id: I936ac8d6a21754fee6038328fd45eaf028f2dd2f
