When the request pixelclk is under 600MHz, vop2 will
calculate dclk first. When the dsc is enabled. vop2 will
calculate dsc clk first then dclk. the dclk rate get from
the first time calclulate dsc clk and second set dck may
be different, which will get wrong dsc clk when use the
latest dclk rate to recalculate it. So the dclk should
be calculated before dsc clk when dsc enable and pixelclk
is under 600MHz.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: If6794a266dd624be2cd14ab1be0ee0c0db20b49a
The dmabuf allocated by video will leaked when media process exit
abnormal, this patch changes the deinit for mpp driver to fix it.
Tested on RK3588 Debian:
step1:
GST_DEBUG=fpsdisplaysink:6 gst-play-1.0 /data/1.mp4 --use-playbin3 \
--audiosink=fakesink --videosink="fpsdisplaysink \
video-sink=waylandsink signal-fps-measurements=true"
step2:
ctrl + c to kill process
step3:
cat /proc/rk_dmabuf/dev to check dmabuf stat
Tested-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ia3906b3a0bb5ec6511fc8d8abefadc37d6287c89
adjust upthreshold/downdifferential for gpu to save power
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: I992f6dd55f86f27c86d9472a3519f24e6f9cb1b6
Split the request into multiple jobs and execute them.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I96d044cb52ed20e452154c400a1454bcea014bfa
cluster mix config followed cluster, so we move mix regsiter from
vop_ctrl to cluster_regs is more suitable.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I28d80ce9e902992870b9876296af3daa2f5add65
the mode->clock is the requested pixel clock which may different from
the actual allocated mode->crtc_clock.
example:
cat /d/dri/0/summary
Video Port3: ACTIVE
Connector: DSI-1
bus_format[100a]: RGB888_1X24
overlay_mode[0] output_mode[0] color_space[0], eotf:0
Display mode: 1920x384p60
clk[47400] real_clk[46875] type[48] flag[a]
H: 1920 1946 1958 1974
V: 384 392 395 400
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I63a5c7b83b96174c2044e4bde969d74cff8af0b7
According to the new simulation result, we need to update the
phy configuration to cover different corner of rv1106 and rv1103.
1. Always enable pre-emphasis in SOF & EOP & chirp & non-chirp state;
2. Set Tx HS pre_emphasize strength to 3'b010;
3. Set 45ohm HS ODT value to 5'b10111 for better Rx ODT resistance.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I9faca9d35124122faf5a35c78f9ee13fd9c24bba
This update fix link fail because of RX signal on rk356x.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I7380f9ff0dfb351618fc09e543f676968b1f3ec9
To clarify the path of ADC gains:
ADC MIC Boost --> ADC ALC PGA --> ADC Digital Volume
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: I1a398eb7eaf4e4f2fc246d36b0cbbe114c8159ee
From the 0x40 to 0x4b is the description of the AGC register for the
left channel. The right channel has the same registers but different
address from 0x50 to 0x5b.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: I189d6136a9cede095eb9409766a6e85d81476d7b
In link mode, when meet error, the hardware may not write registers
back to ddr. Thus the irq_status in ddr is zero, and it should
use mpp->irq_status which read register directly.
Change-Id: Ib4b1533a543a19c48bc91ee7e134159b1c257f27
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
When enable the uboot logo function, For DP/HDMI, if they are
connected before boot and disconnected after end uboot stage and
before display kernel logo. The driver will try to disable
the win. In this case, the enable flag is false and the win real
status is enabled. So The real status will not be changed, and
cause wait win status disabled timeout.
It also need set the win pd status when the win is used during
boot.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ibc0944dca4775f7ebfc8218e2c17f2e6ba3354c8
When disable win, just need clear the vp mask value.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I31aac908b2cae2ff01d116ceea901cd4a111289f
Write a sem to protect session dma destroy or release.
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I07e720ab603c6f99924d4ec9cd57475756582325
Enable DMABUF_DEBUG will default to set a name with pid + taskname to a
dmabuf where it's exported, also create a /proc/rk_dmabuf debug node to
take a look for the dmabuf list, it's useful for dmabuf leak detect.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ia8de3d919335fc0237e5802fe98ba64b114af078
Enable DMABUF_DEBUG will default to set a name with pid + taskname to a
dmabuf where it's exported, also create a /proc/rk_dmabuf debug node to
take a look for the dmabuf list, it's useful for dmabuf leak detect.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I10e638491675bec3fbb66c4c4392c6399c3bedd3
In the current implementation, the tcpm set CC1/CC2 role to open when
it do port reset would cause the VBUS removed by the Type-C partner.
The Figure 4-20 in the TCPCI 2.0 specification show that the CC1/CC2
role should set to 01b (Rp) or 10b (Rd) at Power On or Reset stage
in DRP initialization and connection detection.
So set CC1/CC2 to Rd to fix it.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Iea0fbd30c111d59b8d56f8002827eb6ceea28196
The cause of no signal is unclear. And there is no way to know that
problem has occurred. Enable/disable send NULL packet repeatedly
after FLT passed can restore the display to normal. This is the current
workaround with the least side effect.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Idbc2bea32d418821599e9df8740df07e5ad5964e
This patch add a DMABUF_DEBUG_ADVANCED to try to attach and map
dmabufs who have no valid scatter list table.
Update the rk_dmabuf_procfs node to be a directory tree as:
/proc/rk_dmabuf/
/proc/rk_dmabuf/dev
/proc/rk_dmabuf/sgt
/proc/rk_dmabuf/size
The "dev" to show all attached devices, such as:
ffffff816f8bb600 (null) system-uncached 8288 KiB display-subsystem fb000000.gpu fb000000.gpu
The "sgt" to show scatter list table address range, such as
ffffff8124856200 (null) system-uncached 52 KiB 0: 0x00000001712d0000..0x00000001712d0fff ( 4 KiB)
1: 0x00000001712d2000..0x00000001712d2fff ( 4 KiB)
2: 0x00000001712c6000..0x00000001712c6fff ( 4 KiB)
3: 0x00000001712c8000..0x00000001712c8fff ( 4 KiB)
4: 0x00000001712ca000..0x00000001712cafff ( 4 KiB)
5: 0x00000001712cc000..0x00000001712ccfff ( 4 KiB)
6: 0x00000001712ce000..0x00000001712cefff ( 4 KiB)
7: 0x00000001712d1000..0x00000001712d1fff ( 4 KiB)
8: 0x00000001712c7000..0x00000001712c7fff ( 4 KiB)
9: 0x00000001712c9000..0x00000001712c9fff ( 4 KiB)
10: 0x00000001712cb000..0x00000001712cbfff ( 4 KiB)
11: 0x00000001712cd000..0x00000001712cdfff ( 4 KiB)
12: 0x00000001712cf000..0x00000001712cffff ( 4 KiB)
The "size" to show total dmabuf size, such as:
Total: 79836 KiB
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I62292094407696e410e2ce2973a60f569964e8bd
This patch add a DMABUF_DEBUG to switch on/off the debug codes for
dmabuf, including set a name for each dmabuf.
Support to set a name with pid+taskname for a exported dmabuf, this is
enabled depends on DMABUF_DEBUG.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I84f2c3c66d407d7af29df1d7d85d62d0679d2218
