PD#SWPL-2948
Problem:
Miss the sr core1 bit mask to cause display abnormal
Solution:
Add the bit mask for sr core1
Verify:
Test pass by x301
Change-Id: I742d86b610a9748adad7c143d7a85c6796d3c8f7
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
PD#SWPL-2685
Problem:
the atom switch wrong channel when wakeup by device
Solution:
set the phy port the same as ui id
Verify:
atom
Change-Id: I4e43f83af5bb30a2388df7e7030f135c3f0830ad
Signed-off-by: Hongmin Hua <hongmin.hua@amlogic.com>
PD#OTT-1025
Problem:
not support gen clock
Solution:
add gen clock
Verify:
test passed on g12a u200
Change-Id: I5199289d3cd1483fffbbd41f8d104369214ba302
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
PD#OTT-1025
Problem:
don't support gen_clk_ee and gen_clk_ao pin groups
Solution:
add gen_clk_ee/ao pin groups according to the corepinmux document
Verify:
test pass on U200
Change-Id: Ia3e61079def285c482d8dc4957b5f9e7db35847d
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
PD#SWPL-1219
Problem:
On arm64, thread stack is 16KB for each task. If running task number
is large, this type of memory may over 40MB. It's a large amount on
small memory platform. But most case thread only use less 4KB stack.
It's waste of memory and we need optimize it.
Solution:
1. Pre-allocate a vmalloc address space for task stack;
2. Only map 1st page for stack and handle page fault in EL1
when stack growth triggered exception;
3. handle stack switch for exception.
Verify:
p212
Change-Id: I47f511ccfa2868d982bc10a820ed6435b6d52ba9
Signed-off-by: tao zeng <tao.zeng@amlogic.com>
PD#SWPL-1076
Problem:
Kplayer 4KDemo.mp4, show green screen.
Solution:
add DI_IF1_GEN_REG set when no mirror
Verify:
p212
Change-Id: I2cfb27068393832fb47498ebdb9b93349f1fe635
Signed-off-by: Jihong Sui <jihong.sui@amlogic.com>
PD#SWPL-2551
Problem:
range of mouse is wrong under 4K mode
Solution:
new cursor coordinate paras without using scale
add osd_cursor_hw_no_scale() to deal with it.
Verify:
verified on P212
Change-Id: I1748df569b96522eb58dc00af862983bca17815a
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
PD#SWPL-1081
Problem:
Need get freed handle for DRM frame mode
Solution:
Add ioctl cmd to get freed handle
Verify:
P212
Change-Id: Ic0ce64061e334fdea5580d9f92b3e0b58caa88eb
Signed-off-by: Tao Guo <tao.guo@amlogic.com>
PD#SWPL-2181
Problem:
For some Rx, if the Tx cold boots up, the HPD can't be got in uboot.
That is to say, the output mode is CVBS in uboot, even HDMI cable is
connected. And during kernel boots up, it will reset to hdmi mode.
During the Android boots up, it will set to hdmi mode again. Twice
hdmi mode setting may cause TV flicks.
Solution:
Add parsing colorattribute from uboot and assign $attr to prevent
the second Android mode setting.
Verify:
S905X/P212
Change-Id: I665227bc3e8481acb40c34dde2f5cb3c633c64a2
Signed-off-by: Zongdong Jiao <zongdong.jiao@amlogic.com>
PD#SWPL-1690
Problem:
YouTube requires support playback rate 0.25, 0.50, 1.00, 1.25, 1.50,
2.00
Solution:
vsync_slow_factor can be used to slow playback, extend it's value to
support fast playback
Verify:
mesongxl_p212_32_kernel49
Change-Id: I94589a210b8531cc198414b3017c3caf82827565
Signed-off-by: Daogao Xu <daogao.xu@amlogic.com>
PD#SWPL-2512
Problem:
isp reserved mem too large
Solution:
reduce isp mem to 256M
Verify:
A311D-W400
Change-Id: I33ee2872daf961da5f0ba4ba4810b0ac9690e45f
Signed-off-by: Jiacheng Mei <jiacheng.mei@amlogic.com>
PD#SWPL-2448
Problem:
can not read dnlp scurv_mid2 value
Solution:
fix the error
Verify:
t962x_r311
Change-Id: I7a7df769dd117fd83164065f6df8e3ae82c2499f
Signed-off-by: Bencheng Jing <bencheng.jing@amlogic.com>
PD#OTT-2062
Problem:
Boot up time with power cable is longer than boot up with usb cable
Solution:
config hw rng with dts
Verify:
android p + u212
Change-Id: I61613e945dbc9be06f2cbb29aae5043c84fca1de
Signed-off-by: Chao Liu <chao.liu@amlogic.com>
(cherry picked from commit aabb72a65e)
From: Olliver Schinagl <oliver@schinagl.nl>
This patch adds a bit-banging gpio PWM driver. It makes use of hrtimers,
to allow nano-second resolution, though it obviously strongly depends on
the switching speed of the gpio pins, hrtimer and system load.
Each pwm node can have 1 or more "pwm-gpio" entries, which will be
treated as pwm's as part of a pwm chip.
Change-Id: Idd42bf6d79f8ce52275a15965b02af470f28da7c
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
