Commit Graph

863336 Commits

Author SHA1 Message Date
Jianqun Xu
2e213f3bdf arm64: dts: rockchip: pinconf.dtsi add output level with pull up/down
Change-Id: I3ce795514365e3f7f2302dfbc1deb73884b645be
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-06-04 14:23:44 +08:00
Jianqun Xu
a38e11873b ARM: dts: rockchip: pinconf.dtsi add output level with pull up/down
Change-Id: Id40ca9a6efbbfa05df6bc4ebe36a07874b9a837d
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-06-04 14:23:44 +08:00
Zefa Chen
ed104924c3 media: spi: add motor driver ms41908
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ifad84f0abad6af9ae3b97a5efe9a89842a18e9c7
2021-06-04 14:23:44 +08:00
Zefa Chen
4f4dc8f1f0 include: uapi/linux/rk_vcm_head.h update to v0.2.0
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I07fbfd6f0c18845ae6d3557a5746b95aa7c96dbd
2021-06-04 14:23:44 +08:00
Huang zhibao
caf0e14b16 arm64: dts: rockchip: nvr: incluede rk3568-nvr-linux instead of rk3568-linux
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I954c67c806714e72043e9613e7fa13d1e04069cf
2021-06-04 14:23:44 +08:00
Andy Yan
b541643572 drm/rockchip: disable output poll when shutdown
we find sometimes hdmi will trigger a plugout irq when system
shutdown, but actually it is connected, so when drm core run
a connect->detect callback it will find the hdmi is on connected
state, than run drm_fb_helper_hotplug_event, this drive all
the drm system run again.

But we are on the system shutdwon process, the running
drm core may cause many problem.

So we disable output poll to prevent drm_fb_helper_hotplug_event
when system shutdown.

And also the we should figure out why hdmi driver trigger the
wrong plugout irq at shutdown process.

Requesting system reboot
[   26.466261] cpu cpu0: min=816000, max=816000
[   26.476177] dwhdmi-rockchip fe0a0000.hdmi: dw hdmi plug out
[   26.492452] rockchip_drm_platform_shutdown
[   26.579331] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_transfer] *ERROR* generic write fifo is full
[   26.580141] panel-simple-dsi fe060000.dsi.0: failed to write dcs cmd: -110
[   26.581771] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_transfer] *ERROR* generic write fifo is full
[   26.582577] panel-simple-dsi fe060000.dsi.0: failed to write dcs cmd: -110
[   26.667890] rkisp_hw fdff0000.rkisp: rkisp_hw_shutdown
[   26.675465] fan53555-regulator 0-001c: fan53555..... reset
[   26.676891] fan53555-regulator 0-001c: reset: force fan53555_reset ok!
[   26.677867] mpp_rkvdec2 fdf80200.rkvdec: shutdown device
[   26.678381] mpp_jpgdec fded0000.jpegd: shutdown device
[   26.678853] mpp-iep2 fdef0000.iep: shutdown device
[   26.679288] mpp_vepu2 fdee0000.vepu: shutdown device
[   26.679745] mpp_vdpu2 fdea0400.vdpu: shutdown device
[   26.680201] mpp_rkvenc fdf40000.rkvenc: shutdown device
[   26.680664] mpp_rkvenc fdf40000.rkvenc: shutdown success
[   26.777723] rockchip_drm_output_poll_changed
[   26.890773] rockchip-vop2 fe040000.vop: [drm:vop2_crtc_atomic_enable] Update mode to 1080x1920p60, type: 16 for vp1
[   27.392083] rockchip-vop2 fe040000.vop: [drm:vop2_disable_all_planes_for_crtc] *ERROR* wait win close timeout
[   27.393012] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_encoder_enable] final DSI-Link bandwidth: 880 x 4 Mbps

Change-Id: Ib1454636b1b35bf310252ab9469a107fcbf7e37c
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-06-04 14:23:44 +08:00
Andy Yan
4231420df4 drm/rockchip: vop2: Fix color key shift to 10bit
Fixes: 8c59d20b75 ("drm/rockchip: vop2: Add color key support")
Change-Id: I449f32eb9e69297b2c37feb85611a550310f2304
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-06-04 14:23:43 +08:00
Ding Wei
2b9f8eaf21 arm64: dts: rockchip: rk3568: Set rcb-min-with=512 on rkvdec2
Change-Id: I0735307ea023517c731ed33387f5f074b0362841
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-06-04 14:23:43 +08:00
Ding Wei
9cf57bf5c7 video: rockchip: mpp: rkvdec2: add rcb-min-width info for rcb usage
tips:
    for rk356x, when image width less than 512, it may occur very
small probability for sram read and write.

Change-Id: I57bdfeb776dc0762870f3d7a3a6d81a1c146240d
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-06-04 14:23:43 +08:00
Huang zhibao
014548c589 arm64: dts: rockchip: rk3568-nvr: io-domian all default set 3.3V for rk356x boards
io-domian  default as:
&pmu_io_domains {
    status = "okay";
    pmuio2-supply = <&vcc_3v3>;
    vccio1-supply = <&vcc_3v3>;
    vccio3-supply = <&vcc_3v3>;
    vccio4-supply = <&vcc_3v3>;
    vccio5-supply = <&vcc_3v3>;
    vccio6-supply = <&vcc_3v3>;
    vccio7-supply = <&vcc_3v3>;
};
TODO:
Need to be modified according to the actual hardware
for example rk3568-nvr-demo v10/V12 board:
&pmu_io_domains {
    status = "okay";
    pmuio2-supply = <&vcc_3v3>;
    vccio1-supply = <&vcc_3v3>;
    vccio3-supply = <&vcc_3v3>;
    vccio4-supply = <&vcc_1v8>;
    vccio5-supply = <&vcc_3v3>;
    vccio6-supply = <&vcc_1v8>;
    vccio7-supply = <&vcc_3v3>;
};

Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I707ee8fbce7564db908ca0682c3ead5bf621f95e
2021-06-04 14:23:43 +08:00
Huang zhibao
4faa44ee7f arm64: dts: rockchip: rk3566-box: io-domian all default set 3.3V for rk356x boards
io-domian  default as:
&pmu_io_domains {
    status = "okay";
    pmuio2-supply = <&vcc_3v3>;
    vccio1-supply = <&vcc_3v3>;
    vccio3-supply = <&vcc_3v3>;
    vccio4-supply = <&vcc_3v3>;
    vccio5-supply = <&vcc_3v3>;
    vccio6-supply = <&vcc_3v3>;
    vccio7-supply = <&vcc_3v3>;
};
TODO:
Need to be modified according to the actual hardware
for example rk3566-box-demo v10 board:
&pmu_io_domains {
    status = "okay";
    pmuio2-supply = <&vcc_3v3>;
    vccio1-supply = <&vcc_3v3>;
    vccio3-supply = <&vcc_3v3>;
    vccio4-supply = <&vcc_1v8>;
    vccio5-supply = <&vcc_3v3>;
    vccio6-supply = <&vcc_1v8>;
    vccio7-supply = <&vcc_3v3>;
};

Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: Ifda027a8ceb0bd9cb7ae34a6f0599100abc431b4
2021-06-04 14:23:43 +08:00
Yiqing Zeng
ab1a6c6c64 media: i2c: sc035hgs fix time sequence error when streaming on
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Change-Id: Ic2363298f81d07a49dc3544473f55a5f08e05133
2021-06-04 14:23:43 +08:00
Finley Xiao
a2367b28c4 ARM: dts: rv1126: Modify pvtm voltage table for CPU and NPU
In order to improve stability for CPU and NPU.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I2934ce2a0ceb9fd8816b0e4711e40c800348f040
2021-06-04 14:23:43 +08:00
Zorro Liu
63c22fafe5 drm/rockchip: ebc_dev: release version v1.14
1.add EPD_OVERLAY_WHITE mode to support draw white line
2.add EPD_FORCE_FULL mode which can be used under overlay mode

Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Change-Id: I6d4d3f12fe4e100904f181588bc51d5147fd8453
2021-06-04 14:23:43 +08:00
Radu Rendec
d8d6cb35c4 UPSTREAM: kernfs: Improve kernfs_notify() poll notification latency
kernfs_notify() does two notifications: poll and fsnotify. Originally,
both notifications were done from scheduled work context and all that
kernfs_notify() did was schedule the work.

This patch simply moves the poll notification from the scheduled work
handler to kernfs_notify(). The fsnotify notification still needs to be
done from scheduled work context because it can sleep (it needs to lock
a mutex).

If the poll notification is time critical (the notified thread needs to
wake as quickly as possible), it's better to do it from kernfs_notify()
directly. One example is calling sysfs_notify_dirent() from a hardware
interrupt handler to wake up a thread and handle the interrupt in user
space.

Change-Id: If4983487f6aadecfb2185acbafeff47a1c7bb66f
Signed-off-by: Radu Rendec <radu.rendec@gmail.com>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 03c0a9208b)
2021-06-04 14:23:43 +08:00
Zefa Chen
06fc5af065 media: platform: cif fix fs/fe count error
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I56a6f5de22065f246a419f698385e3620142fd57
2021-06-04 14:23:43 +08:00
Wang Panzhenzhuan
4346e71373 media: i2c: sc200ai: fix set exposue bug
ctrl->val = ctrl->val * 2 will return
ctrl->val to v4l2 framework, and if next time
set ctrl->val is 2 * previous ctrl->val, will not actually set;
so fix it.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I965f33f2e592a88ab2b8f6e362ca399260fe98ab
2021-06-04 14:23:43 +08:00
David Wu
066a36326e arm64: dts: rockchip: Add QSGMII support for rk3568-evb2
Maybe some people want to use the Ethernet function of evb2,
which is turned on by default so that the Ethernet can work.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I314ac4e0d51804ea3463735d6cc9c90a536d173a
2021-06-04 14:23:43 +08:00
Sugar Zhang
03eca20525 ASoC: rockchip: i2s-tdm: Delay for reset successfully
This patch Adds delay after reset deassert to make sure
reset done before do enabling xfer.

Considering the follow situation:

- i2s_mclk for 8K capture [2.048M]
- i2s_hclk for i2s register access [150M]
- pclk_cru for cru register access [100M]

       SW                               HW

i2s reset assert   [pclk_cru]           |
        |                               |
   delay time                           |
        |                       i2s reset assert   [i2s_mclk]
i2s reset deassert [pclk_cru]           |
        |                               |
i2s xfer enable    [i2s_hclk]           |
        |                       i2s reset deassert [i2s_mclk]

Obviously, pclk_cru(10ns per cycle) is much faster than i2s_mclk
(500ns per cycle). so delay should be added after reset deassert
to make sure hw reset done. Otherwise, the race between reset and
enable xfer maybe break i2s data aligned.

Fixes: A 10us delay is enough

       SW                               HW

i2s reset assert   [pclk_cru]           |
        |                               |
   delay 10us                           |
        |                       i2s reset assert   [i2s_mclk]
i2s reset deassert [pclk_cru]           |
        |                               |
   delay 10us                           |
        |                       i2s reset deassert [i2s_mclk]
i2s xfer enable    [i2s_hclk]           |
        |                               |

Change-Id: Id370b0aa13f771053841ce04a554b408e9e3c831
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2021-06-04 14:23:43 +08:00
Jisheng Zhang
b5fc70f671 UPSTREAM: mmc: sdhci-of-dwcmshc: fix rpmb access
Commit a44f7cb937 ("mmc: core: use mrq->sbc when sending CMD23 for
RPMB") began to use ACMD23 for RPMB if the host supports ACMD23. In
RPMB ACM23 case, we need to set bit 31 to CMD23 argument, otherwise
RPMB write operation will return general fail.

However, no matter V4 is enabled or not, the dwcmshc's ARGUMENT2
register is 32-bit block count register which doesn't support stuff
bits of CMD23 argument. So let's handle this specific ACMD23 case.

From another side, this patch also prepare for future v4 enabling
for dwcmshc, because from the 4.10 spec, the ARGUMENT2 register is
redefined as 32bit block count which doesn't support stuff bits of
CMD23 argument.

Fixes: a44f7cb937 ("mmc: core: use mrq->sbc when sending CMD23 for RPMB")
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201229161625.38255233@xhacker.debian
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ic31c6f626b869620a2656cb84ecb01fe03700a4e
(cherry picked from commit ca1219c0a7)
2021-06-04 14:23:43 +08:00
Aapo Vienamo
382b763ef5 UPSTREAM: mmc: sdhci: Export sdhci_request()
Allow SDHCI drivers to hook code before and after sdhci_request() by
making it externally visible.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I3e144e8f597d49479fbed8528519c257f740d3f2
(cherry picked from commit d462c1b474)
2021-06-04 14:23:43 +08:00
Jianqun Xu
0bde59fad7 ARM: configs: rockchip_defconfig enable ION_CMA_HEAP
Select ION_CMA_HEAP to support cma memory allocated from ion driver.

Change-Id: I9bb44004e8e86e00795f85c31946eb8bb3f12006
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-06-04 14:23:42 +08:00
Jianqun Xu
8af7024239 ARM: configs: rockchip_defconfig enable ION_FORCE_DMA_SYNC
The ion allocates memory defaultly with memset to zero, userspace should
do cache sync before read/wirte after map.

But the userspace always not to do that.

This patch supports to do force sync for memory allocated first time
from page pools with memset zero.

Change-Id: I8a65b1a3259d315459a0489f9c51ab0855957a70
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-06-04 14:23:42 +08:00
Sandy Huang
1a469bd295 drm/rockchip: vop2: add more debug info
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I9277ff4a0f363fdb53aed88a33007a31e6f47f4c
2021-06-04 14:23:42 +08:00
Sandy Huang
6dd0792bf2 drm/rockchip: vop2: make sure layer sel is take effect when it's updated
when vp0 and vp1 indenpendent config layer_sel register, this register take effect
time is prone to error, so we add the following measures to workaround this issue:

1. Add commit_lock to make sure vp0 and vp1 config register is mutually exclusive;
2. Make sure layer sel register is take effect when it's update.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ief832e2bf7e18567f4ea663843c77f0afbd21cf7
2021-06-04 14:23:42 +08:00
Sandy Huang
a6d22c4a7e drm/rockchip: vop2: use wait done bit instead of fs raw bit
the fs raw bit will be cleared by vop2_isr() fs irq and lead to
vop2_wait_for_fs_by_raw_status() time out, so we use
vop2_wait_for_fs_by_done_bit_status() to wait done bit from 1 to 0 is
more reliable.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ice35fb9bfe6c2ef7a49496b15b9f58bf93e95d4e
2021-06-04 14:23:42 +08:00
Jianqun Xu
12557ec00c power/avs: rockchip-io-domain: dump power supply-map when probe
Tested on RK3568-evb2 with io-domain node as following:
    pmuio2-supply = <&vcc3v3_pmu>;
    vccio1-supply = <&vccio_acodec>;
    vccio3-supply = <&vccio_sd>;
    vccio4-supply = <&vcc_3v3>;
    vccio5-supply = <&vcc_3v3>;
    vccio6-supply = <&vcc_3v3>;
    vccio7-supply = <&vcc_3v3>;

With this patch, the system bootup log shows:
[    0.773089] rockchip-iodomain fdc20000.syscon:io-domains: pmuio2(3300000 uV) supplied by vcc3v3_pmu
[    0.773247] rockchip-iodomain fdc20000.syscon:io-domains: vccio1(3300000 uV) supplied by vccio_acodec
[    0.773426] rockchip-iodomain fdc20000.syscon:io-domains: vccio3(3300000 uV) supplied by vccio_sd
[    0.773603] rockchip-iodomain fdc20000.syscon:io-domains: vccio4(3300000 uV) supplied by vcc_3v3
[    0.773721] rockchip-iodomain fdc20000.syscon:io-domains: vccio5(3300000 uV) supplied by vcc_3v3
[    0.773839] rockchip-iodomain fdc20000.syscon:io-domains: vccio6(3300000 uV) supplied by vcc_3v3
[    0.773989] rockchip-iodomain fdc20000.syscon:io-domains: vccio7(3300000 uV) supplied by vcc_3v3

Change-Id: Ib4bcb78bf932b07beb03b3b39a0224ecb6699a54
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-05-31 18:14:42 +08:00
Yu Qiaowei
7ada44e48b video/rockchip: rga2: Add support for full csc (RGB2YUV/YUV2YUV).
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I72fcbc85a5bc24357d64579dd56b8a20715e59bc
2021-05-31 16:26:41 +08:00
Andy Yan
d16e0cc62c drm/rockchip: vop2: Enable sd2hdr when we have a sdr plane but hdr output
We thought when userspace switch hdmi to hdr mode, it must
give vop a hdr plane, but We meet a case: composer give
vop only one sdr plane, but switch hdmi to hdr mode.

so we don't check the plane number for sdr2hdr_en;

Change-Id: I4804a88321af84328735d6499ac9df610bf2cb85
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-05-31 16:24:08 +08:00
Liang Chen
5d325f423b arm64: dts: rockchip: rk356x: adjust opp-table for correlation chips
1. limit vmin of cpu/gpu/npu/logic by mbist_vmin.
2. raise vdd_logic when npu run at 1.0GHz or venc run at 400MHz.
3. disable npu@1.0GHz and venc@400MHz by default.
4. reduce vdd_logic for the chips with big leakage.
5. adjust low-temp-adjust-volt table.

Change-Id: If7ce6f010422d20e2dfd643a6894fa7304e6372f
Signed-off-by: Liang Chen <cl@rock-chips.com>
2021-05-28 18:21:42 +08:00
Liang Chen
23c8b1ac26 PM / devfreq: rockchip_bus: add support for rk3568
Add support for rk3568 and init opp-table with rockchip_init_opp_table()
so that rockchip_bus can support pvtm and leakage.

Change-Id: Ief17dba8264906f987d4dac93b2e7344c98bc8fa
Signed-off-by: Liang Chen <cl@rock-chips.com>
2021-05-28 18:21:42 +08:00
Liang Chen
79d32ab7d4 soc: rockchip: opp_select: adjust opp-table by pvtm and mbist_vmin
1. support get pvtm from otp.
2. adjust opp-table by mbist_vmit which is get from otp.

Change-Id: Ie3703873880b65b2af03ae474065d541c7f9d605
Signed-off-by: Liang Chen <cl@rock-chips.com>
2021-05-28 18:21:42 +08:00
Jianqun Xu
a0b1f8c7ae power/avs: rockchip: add debugfs 'iodomain'
This patch adds a 'iodomain' debug node.

Change-Id: I2f85d073aa59f87c20eb309f151e76a05a2f4bc1
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-05-28 16:48:03 +08:00
Caesar Wang
4f736fc5ad scripts: remove PMUIO1 in io-domain.sh
Fixes: b25c12a00a ("scripts: add io-domain.sh for rk356x io-domain check")

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I5b8d8706b48f32a6ba2dbeebabf3a5bd2ba24678
2021-05-28 16:08:40 +08:00
Finley Xiao
144566ce73 arm64: dts: rockchip: rk3568: Add vop-bw-dmc-freq property for dmc
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I20367d84fa3fee5b008ea8fbaba33ec296dd2721
2021-05-28 15:35:43 +08:00
Finley Xiao
d0dfe9f8d3 arm64: dts: rockchip: rk3568: Add devfreq property for display_subsystem
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I3bb6e7d486d52c586b55ed70ca33b0f3c10f29bf
2021-05-28 15:35:38 +08:00
Sudeep Holla
5730f8b50f UPSTREAM: firmware: arm_scmi: Move scmi protocols registration into the driver
In preparation to enable building SCMI as a single module, let us move
the SCMI protocol registration call into the driver. This enables us
to also add unregistration of the SCMI protocols.

The main reason for this is to keep it simple instead of maintaining
it as separate modules and dealing with all possible initcall races
and deferred probe handling. We can move it as separate modules if
needed in future.

Link: https://lore.kernel.org/r/20200907195046.56615-4-sudeep.holla@arm.com
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
(cherry picked from commit 1eaf18e35a)

Conflicts:
	drivers/firmware/arm_scmi/reset.c
	drivers/firmware/arm_scmi/system.c

Change-Id: Iec1dbc42c49367a1fa7299cb359f1214021ada6b
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2021-05-28 15:27:44 +08:00
Sudeep Holla
f6fd0a5cd7 UPSTREAM: firmware: arm_scmi: Move scmi bus init and exit calls into the driver
In preparation to enable building scmi as a single module, let us move
the scmi bus {de-,}initialisation call into the driver.

The main reason for this is to keep it simple instead of maintaining
it as separate modules and dealing with all possible initcall races
and deferred probe handling. We can move it as separate modules if
needed in future.

Link: https://lore.kernel.org/r/20200907195046.56615-3-sudeep.holla@arm.com
Change-Id: I6f1a6ce7cc4c2b6f281add5f5d6a7ca3cbad9eca
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 5a2f0a0bdf)
2021-05-28 15:27:44 +08:00
Bin Yang
20115da8e0 phy: rockchip: inno-usb2: fix iddig issues for rk3568
RK3568 u2phy used shared interrupt and do not used id irq.

Signed-off-by: Bin Yang <yangbin@rock-chips.com>
Change-Id: I341cc0edb0f74996f159c095545465673cc2a990
2021-05-28 15:08:23 +08:00
Huang zhibao
05035b24f6 arm64: dts: rockchip: rk3566-box: fix vdd_logic max-microvolt
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I19469288b52b58824fd8a7f9d70a1991c5835fba
2021-05-28 11:24:22 +08:00
Tao Huang
e70f2f4ac4 Revert "ANDROID: GKI: arm64: add support for NO_KERNEL_MAPPING and STRONGLY_ORDERED"
This reverts commit 4ac42c4404.

DMA_ATTR_NO_KERNEL_MAPPING is not well supported on apply_to_page_range(),
which causes the following error:

[    2.268586] nvme nvme0: pci function 0002:21:00.0
[    2.268649] nvme 0002:21:00.0: enabling device (0000 -> 0002)
[    2.376361] nvme nvme0: missing or invalid SUBNQN field.
[    2.378661] Unable to handle kernel paging request at virtual address ffffffc400000000
[    2.379360] Mem abort info:
[    2.379616]   ESR = 0x96000045
[    2.379895]   Exception class = DABT (current EL), IL = 32 bits
[    2.380414]   SET = 0, FnV = 0
[    2.380691]   EA = 0, S1PTW = 0
[    2.380970] Data abort info:
[    2.381237]   ISV = 0, ISS = 0x00000045
[    2.381575]   CM = 0, WnR = 1
[    2.381846] swapper pgtable: 4k pages, 39-bit VAs, pgdp = 000000005a0c0862
[    2.382446] [ffffffc400000000] pgd=0000000000000000, pud=0000000000000000
[    2.383049] Internal error: Oops: 96000045 [#1] PREEMPT SMP
[    2.383546] Modules linked in:
[    2.383827] Process kworker/u8:0 (pid: 7, stack limit = 0x00000000b285d686)
[    2.384441] CPU: 3 PID: 7 Comm: kworker/u8:0 Not tainted 4.19.172 #134
[    2.385017] Hardware name: Rockchip RK3568 EVB1 DDR4 V10 Board (DT)
[    2.385580] Workqueue: nvme-reset-wq nvme_reset_work
[    2.386022] pstate: 60c00009 (nZCv daif +PAN +UAO)
[    2.386453] pc : __dma_clear_pte+0x0/0xc
[    2.386804] lr : apply_to_page_range+0x1bc/0x274
[    2.519225]
[    2.519366] Call trace:
[    2.519593]  __dma_clear_pte+0x0/0xc
[    2.519908]  __dma_alloc+0x240/0x3f0
[    2.520224]  nvme_reset_work+0xaf4/0xf14
[    2.520575]  process_one_work+0x26c/0x438
[    2.520935]  worker_thread+0x260/0x4a8
[    2.521272]  kthread+0x13c/0x14c
[    2.521564]  ret_from_fork+0x10/0x18

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ifb10b05af6b9778990cad23e3d45cc440bbecb2f
2021-05-28 10:07:48 +08:00
Caesar Wang
a2cb2cc59c arm64: dts: rockchip: update pmu_io_domains in rk3568-evb.dtsi
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Idf4e71ce021267e9098018abff6d540476fca1ba
2021-05-28 09:50:51 +08:00
Jianqun Xu
af1fb0dc82 power/avs: rockchip: rk3568 iodomain ignore pmuio1 and vccio2
1. pmuio1 on RK3568 SoC supports 3.3v only, no register to set.
2. vccio2 used for flash, which select by hardware

Change-Id: Ie168626906b52dea5b789b6b4dfcf1e45eb5f08a
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-05-27 16:32:08 +08:00
Sandy Huang
42256c1a8f drm/rockchip: gem: fix dma_free_attrs() parameter error
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I84204ef5348d3429aa104c6e8a307458d1a88504
2021-05-27 16:30:49 +08:00
shengfei Xu
6aef0738cf regulator: fan53555: fix regulator resume error
if the default voltage and the regulator on/off in suspend can't be
changed in runtime, the fan53555 not need the resume function.
fix regulator resume error as follows log:
[   12.726012] dpm_run_callback(): regulator_resume+0x0/0x68 returns -1
[   12.726041] PM: Device regulator.1 failed to resume: error -1
[   12.726623] dpm_run_callback(): regulator_resume+0x0/0x68 returns -1
[   12.726641] PM: Device regulator.2 failed to resume: error -1
[   12.727216] dpm_run_callback(): regulator_resume+0x0/0x68 returns -1
[   12.727246] PM: Device regulator.3 failed to resume: error -1
[   12.727826] dpm_run_callback(): regulator_resume+0x0/0x68 returns -1
[   12.727855] PM: Device regulator.4 failed to resume: error -1
[   12.728437] dpm_run_callback(): regulator_resume+0x0/0x68 returns -1
[   12.728467] PM: Device regulator.5 failed to resume: error -1
[   12.729045] dpm_run_callback(): regulator_resume+0x0/0x68 returns -1
[   12.729074] PM: Device regulator.6 failed to resume: error -1
[   12.729653] dpm_run_callback(): regulator_resume+0x0/0x68 returns -1
[   12.729683] PM: Device regulator.7 failed to resume: error -1
[   12.730195] dpm_run_callback(): regulator_resume+0x0/0x68 returns -1
[   12.730222] PM: Device regulator.8 failed to resume: error -1
[   12.730783] dpm_run_callback(): regulator_resume+0x0/0x68 returns -1
[   12.730812] PM: Device regulator.9 failed to resume: error -1

Fixes: af1b6e88fa ("regulator: fan53555: add fan53555 resume")
Change-Id: Iab3ef39e6bc218eab12430d43299f8e85d6e465e
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
2021-05-27 14:55:37 +08:00
Elaine Zhang
dc69c8c782 UPSTREAM: clk: rockchip: Optimize PLL table memory usage
Before the change: The sizeof rk3568_pll_rates = 2544
Use union: The sizeof rk3568_pll_rates = 1696

In future Soc, more PLL types will be added, and the
rockchip_pll_rate_table will add more members,
and the space savings will be even more pronounced
by using union.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Link: https://lore.kernel.org/r/20210511090726.15146-1-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 23029150a0
 git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git v5.14-clk/next)
Change-Id: Ia8f038861c327feb41602cc9a997e82333fae67b
2021-05-27 14:23:59 +08:00
Caesar Wang
b4ea08d1ed scripts: io-domain.sh: update docs
Fixes: b25c12a00a ("scripts: add io-domain.sh for rk356x io-domain check")
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I7e1c657102fd782a359c3aabfbbdbdf63875f675
2021-05-27 09:38:37 +08:00
Huang zhibao
e774833d4f ARM: dts: rv1126-ai-cam.dtsi: set not used io group domain to 3.3v
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I95e89bb9d9951d5d96f6f3feaa6d9579184d62a0
2021-05-26 17:12:21 +08:00
Tao Huang
8b3bd9721e ARM: rv1126_defconfig: Replace CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU by CONFIG_SQUASHFS_DECOMP_MULTI
The squashfs multi CPU decompressor makes use of get_cpu_ptr() to
acquire a pointer to per-CPU data. get_cpu_ptr() implicitly disables
preemption which serializes the access to the per-CPU data.

But decompression can take quite some time depending on the size. The
observed preempt disabled times in real world scenarios went up to 32ms,
causing massive wakeup latencies. This happens on all CPUs as the
decompression is fully parallelized.

So replace CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU by CONFIG_SQUASHFS_DECOMP_MULTI.

Change-Id: I3fb74bca595ee2345f2f7c276eaf8cc68bcd249b
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2021-05-26 16:53:36 +08:00
Wang Panzhenzhuan
8f4114af53 media: i2c: gc2385 match vts and 30fps strictly for cts
fix cts  CaptureRequestTest#testEdgeModeControl[1] &
CaptureRequestTest#testNoiseReductionModeControl[1]  failed
failed log:
Frame duration must be in the range of [33333333, 66666666],
value 32813000 is out of range [32833332, 67666664])

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: Icdc6a89f33d6d0fd8332c51033afe6303e246ce3
2021-05-26 16:52:19 +08:00