Commit Graph

1272004 Commits

Author SHA1 Message Date
Lin Jinhan
2fde6adc97 crypto: rockchip: Optimized the exception handling of clock enable failure
[    1.951687][    T1] rk-crypto 2a400000.crypto: invalid resource
[    1.951972][    T1] Failed to prepare clk 'aclk': -95
[    1.951989][    T1] rk-crypto 2a400000.crypto: failed to enable clks -95
[    1.952221][    T1] ------------[ cut here ]------------
[    1.952231][    T1] clk_pka_crypto_ns already disabled
[    1.952272][    T1] WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:1040 clk_core_disable+0x88/0x220
[    1.952295][    T1] Modules linked in:
[    1.952308][    T1] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 6.1.75 #1956
[    1.952321][    T1] Hardware name: Rockchip RK3576 EVB1 V10 Board (DT)
[    1.952331][    T1] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[    1.952344][    T1] pc : clk_core_disable+0x88/0x220
[    1.952358][    T1] lr : clk_core_disable+0x88/0x220
[    1.952371][    T1] sp : ffffffc00a48b740
[    1.952380][    T1] x29: ffffffc00a48b740 x28: 0000000000000001 x27: ffffffc009704780
[    1.952398][    T1] x26: 0000000000000001 x25: ffffffc00a25d838 x24: ffffffc009704dd0
[    1.952415][    T1] x23: ffffff80c0368000 x22: ffffffc00a3ef000 x21: ffffffc00a3ef000
[    1.952432][    T1] x20: ffffff80c0172e00 x19: ffffff80c0172e00 x18: ffffffc00a4650c0
[    1.952449][    T1] x17: 0000000000000013 x16: ffffffffffffffff x15: 0000000000000004
[    1.952466][    T1] x14: ffffffc009f8d6e0 x13: 0000000000003fff x12: 0000000000000003
[    1.952483][    T1] x11: 00000000ffffbfff x10: c0000000ffffbfff x9 : 0c33c05c11861400
[    1.952500][    T1] x8 : 0c33c05c11861400 x7 : 205b5d3133323235 x6 : 392e31202020205b
[    1.952517][    T1] x5 : ffffffc00a3c0617 x4 : ffffffc00a48b477 x3 : 0000000000000000
[    1.952533][    T1] x2 : 0000000000000000 x1 : ffffffc00a48b4e0 x0 : 0000000000000022
[    1.952551][    T1] Call trace:
[    1.952560][    T1]  clk_core_disable+0x88/0x220
[    1.952573][    T1]  clk_core_disable_lock+0x9c/0x130
[    1.952586][    T1]  clk_disable+0x20/0x2c
[    1.952597][    T1]  clk_bulk_disable+0x2c/0x48
[    1.952613][    T1]  rk_crypto_release+0x24/0x40
[    1.952626][    T1]  rk_crypto_register+0x1b0/0x2b8
[    1.952638][    T1]  rk_crypto_probe+0x398/0x3f4

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I34c41cea4844fdac28051401c472358c9e8042ea
2024-06-26 16:17:09 +08:00
Rimon Xu
3a151492f1 video: rockchip: vtunnel: return error when no unused buffer
When the number of queue buffer operations greatly exceeds the number
of deque buffer operations, the available buffers in the pool may be
exhausted, resulting in queue buffer or cancel buffer failures. However,
this error was not intercepted previously, leading to a crash.

Change-Id: Iad6f4146bf6d2685f7534185835ebc512117da4e
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
2024-06-26 10:37:25 +08:00
Wang Panzhenzhuan
54233dfbc5 media: i2c: ov08d10: add delay to fix probability reg write failed
1. add delay in setting to fix probability reg write failed
2. remove duplicate global register setting.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I8381c9b03480de4119abe225e1ef561a51dec59b
2024-06-25 16:58:36 +08:00
Yifeng Zhao
75dfde714b mmc: sdhci-dwc: Fix SDHCI_RESET_ALL for CQHCI for rk35xx
For rockchip sdhci controllers, SDHCI_RESET_ALL resets also CQHCI registers.
Normally, SDHCI_RESET_ALL is not used while CQHCI is enabled, but that can
happen on the error path. e.g. if mmc_cqe_recovery() fails, mmc_blk_reset()
is called which, for a eMMC that does not support HW Reset, will cycle the
bus power and the driver will perform SDHCI_RESET_ALL.

So whenever performing SDHCI_RESET_ALL ensure CQHCI is deactivated.
That will force the driver to reinitialize CQHCI when it is next used.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Iee491501ff7e32e347303f5389f22eef9f8f658b
2024-06-25 10:04:56 +08:00
Shunhua Lan
95d65f02d0 arm64: dts: rockchip: rk3588-evb: add sleep property for pa control
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I4652bf8e47ce7528a6545263634ddcd45793b1d2
2024-06-24 21:29:53 +08:00
Shunhua Lan
6e52c0b64a arm64: dts: rockchip: rk3576-evb: add sleep property for pa control
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: Ia77cb684ef69a642be62be3f291fe3a43e0ee4c2
2024-06-24 21:29:53 +08:00
Shunhua Lan
e6f3623149 ASoC: rockchip: multicodecs: add sleep time for pa gpio control to depop
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I5f6fe5f5727734caf5b6c58935dc3bd131380ae7
2024-06-24 21:29:52 +08:00
Shunhua Lan
568481a10e ASoC: rockchip: multicodecs: move PA control operation from supply to speaker/headphone widget
The dapm power sequences is

static int dapm_up_seq[] = {
    [snd_soc_dapm_supply] = 3,
    [snd_soc_dapm_dac] = 8,
    [snd_soc_dapm_hp] = 12,
    [snd_soc_dapm_spk] = 12,
};

static int dapm_down_seq[] = {
    [snd_soc_dapm_hp] = 4,
    [snd_soc_dapm_spk] = 4,
    [snd_soc_dapm_dac] = 7,
    [snd_soc_dapm_supply] = 13,
};

We should enable PA power after dac on and disable before dac off

Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: Ie5b7d5736496061e8f7551bf7d40ffba83015144
2024-06-24 21:29:52 +08:00
Zhang Yubing
4ad8ea9a7a clk: rockchip: rk3588: support more pll frequency for display
Change-Id: I24a246f798a4e8bfe9f346e553cfeb2b168edcf3
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
2024-06-24 21:29:52 +08:00
Shunhua Lan
4389dbd8ec ASoC: es8323: Add a switch for dapm route to control "Speaker/Headphone Power" widgets
"Right Mixer" -> "Right Out 1" -> "OUT1" -> "ROUT1" -> "Speaker Power"
"Left Mixer" -> "Left Out 1" -> "OUT1" -> "LOUT1" -> "Speaker Power"

Change-Id: I31b8dc4e3ae0cfe7d28c5ad811851912914c2aca
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
2024-06-24 14:24:12 +08:00
Mingwei Yan
ce5b90cdcc media: rockchip: vpss: fix proc access register when clk off
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com>
Change-Id: Ic018bf13051b65a366a3b2ef8e5ca918169d0dd3
2024-06-24 10:27:15 +08:00
Zefa Chen
fa4e216c8c arm64: dts: rockchip: rk3576 test1: add flexbus cif
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I06ae1fe9c0e67b7c0eb1099e74e233e6f91cc4a5
2024-06-22 16:42:16 +08:00
Zefa Chen
39843a9d3a arm64: dts: rockchip: rk3576: Add flexbus cif
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: If5af8f3815a691abb1d17e8d50dbbe9dd8eaf38f
2024-06-22 16:40:59 +08:00
Zefa Chen
ae51ee3043 media: rockchip: add flexbus cif driver
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I1335abf6bb590d145acaccfaf31bcc663b8da92a
2024-06-22 15:12:39 +08:00
Chaoyi Chen
34c17d0724 drm/rockchip: vop2: Support invalid phy id for vop2_plane_id_to_string
ROCKCHIP_VOP2_PHY_ID_INVALID has a value of -1 that is out of range
for vop2_layer_name_list. Convert it to "INVALID".

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Change-Id: I0aaa36c5a51ef0227847567ca1b495d16470ee1b
2024-06-21 19:28:35 +08:00
Mingwei Yan
233f1cf947 media: rockchip: vpss: online support 8k
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com>
Change-Id: I363cc1d0dfc5296ec88db0e283ae1cd067ee36e3
2024-06-21 19:28:22 +08:00
Sandy Huang
df37f6e8e0 arm64: dts: rockchip: rk3576: enable VOP aclk auto cs
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ied57a55b5094962a6c7373723a547ab31f4c12f4
2024-06-21 17:31:23 +08:00
Sandy Huang
a9cd753a9e drm/rockchip: vop2: add support dynamic adjust vop aclk auto cs div
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ia8cfc3748f7f3914f1a8c387ef50d3af02a620af
2024-06-21 17:30:48 +08:00
Damon Ding
a7620fa846 drm/rockchip: analogix_dp: add support for color format yuv444/yuv422
The detailed changes as follows:
1.Add flag max_bpc and format_yuv to check whether the
  platform support 10 bit per component and YUV444/YUV422.
2.Add exact bpp related to output format in bandwidth
  calculation, which is fixed to 24 before the patch.
3.Add .atomic_get_input_bus_fmts() and .atomic_get_output_bus_fmts()
  to get the supported input and output bus formats.

Change-Id: I78ef43d19b3a2970a961b0f668a75ef857951dfe
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2024-06-21 17:30:34 +08:00
Yu Qiaowei
f019bedaa1 video: rockchip: rga3: modify workaround for RK3576 issue
reset core_clk on every frame

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I9158fe1fc550fc3a96b8268e4102fccb674fbb43
2024-06-21 15:34:33 +08:00
Tao Huang
3305069c0a pinctrl: rockchip: Fix iterator 'j' not incremented in rk_iomux_set()
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I7f659bdcc491ac3bdde5163231b789cf00c0162a
2024-06-21 14:09:47 +08:00
Weixin Zhou
21dad904b5 input: touchscreen: ft5726: Fix abnormal sleep power
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: If52037a97e141b1f777a93fbab8f0af5f6a09724
2024-06-21 14:08:43 +08:00
Tao Huang
b8e6944e4f drm/rockchip: vop: Fix mixing irqsave and irq in vop_crtc_atomic_flush()
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I4be4ad6728cf77f9f49d6824eed10f7b91d04815
2024-06-21 14:08:23 +08:00
Jianwei Fan
fa4c12dab8 media: i2c: rk628: fix YUV format color range detect
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: Ifac5d10823b7b5a0da875032cb4ff8c8492762c0
2024-06-21 14:05:41 +08:00
Cai YiWei
bc1fe92fa9 media: rockchip: isp: add stats log for isp21 and isp30
Change-Id: I5562b78ce87d4773c08ffbe85f4e0bef351344da
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2024-06-20 19:09:48 +08:00
Zhihuan He
983b142f79 arm64: dts: rockchip: rk3576: add dsmc device
Change-Id: I57fc6826004dc6014f6fa69f12a29cc08ab5d0b1
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2024-06-20 19:09:11 +08:00
Zhihuan He
555d39b979 memory: rockchip: dsmc: modify node get
Change-Id: I2f8951da7fa878c6d34b9c9587fb3b4262799e8c
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2024-06-20 19:09:11 +08:00
Yu Qiaowei
a2a7ce0bf0 video: rockchip: rga3: add fix for hardware issue with RK3576
1. Disable auto_rst to avoid false interrupt generation.
2. Reset core_clk before startup to avoid hardware runaway due to
continuous scaling.
3. Configure auto_clean command count to avoid iommu access exception
after command count from 4095->0.

Update driver version to 1.3.4

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I12f312280429996c182952fbe8c8c4a20155dc4f
2024-06-20 19:06:33 +08:00
Yu Qiaowei
4b6e0305af video: rockchip: rga3: Fix YUV444-SP UV offset error
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ie850179206155fa84023052b248d5d50722553c5
2024-06-20 19:06:33 +08:00
Sugar Zhang
b2335985e1 ASoC: rockchip: sai: Add support for more SoCs
VERSION >= SAI_VER_2311

Support Frame Sync xN (FSXN)
Support Frame Sync Error Detect (FSE)
Support Frame Sync Lost Detect (FSLOST)
Support Force Clear (FCR)
Support SAIn-Chained (e.g. SAI0-CLK-DATA + SAI3-DATA +...)
Support Transmit Auto Gate Mode
Support Timing Shift Left for TX

Optimize SCLK/FSYNC Timing Alignment

VERSION >= SAI_VER_2403

Support Loopback LR Select (e.g. L:MIC R:LP)

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I9c957b5115686df2573a06b9276f26a15e709d4e
2024-06-20 11:11:12 +08:00
Sugar Zhang
a67a9be17e ASoC: rockchip: sai: Add support for clk compensation
This patch introduces a method to handle clk drift and compensation.

e.g:

&sai0 {
	rockchip,mclk-calibrate;
	clocks = <&cru MCLK_SAI0>, <&cru HCLK_SAI0>, <&cru PLL_HPLL>;
	clock-names = "mclk", "hclk", "mclk_root";
};

/# amixer -c 0 controls | grep PPM
numid=1,iface=PCM,name='SAI0 PCM Clk Compensation In PPM'

/# amixer -c 0 cget numid=1
numid=1,iface=PCM,name='SAI0 PCM Clk Compensation In PPM'
; type=INTEGER,access=rw------,values=1,min=-1000,max=1000,step=1
: values=0

/# arecord -D hw:0,0 --period-size=1024 --buffer-size=4096 -r
16000 -c 2 -f s16_le /dev/zero &

/# amixer -- cset numid=1 -10
numid=1,iface=PCM,name='SAI0 PCM Clk Compensation In PPM'
; type=INTEGER,access=rw------,values=1,min=-1000,max=1000,step=1
: values=-10

/# amixer -- cset numid=1 10
numid=1,iface=PCM,name='SAI0 PCM Clk Compensation In PPM'
; type=INTEGER,access=rw------,values=1,min=-1000,max=1000,step=1
: values=10

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Id4b299052651f7fd291f118edce6ac334002e100
2024-06-20 11:11:12 +08:00
Chaoyi Chen
c6b6f4232c drm/rockchip: vop2: Add human readable log output info
This patch converts the original unreadable machine log output into
human readable data.

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Change-Id: Ibec0a11d8f65c58b0ba0c5c5bc3daa5bc5c9ca81
2024-06-20 10:00:34 +08:00
Tao Huang
1e3ea84d4a drm/rockchip: vop2: Fix mixing irqsave and irq in vop2_crtc_atomic_flush()
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ifce3088c85fc65a709d8bdec184eb1d3865c1b6f
2024-06-20 09:57:13 +08:00
Zhihuan He
6f0f656491 ARM: configs: rockchip_linux_defconfig: enable dsmc
Change-Id: I31695bf34380b3a5926976a2d497390f098d6bfe
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2024-06-20 09:37:05 +08:00
Zhihuan He
953385530d arm64: configs: rockchip_linux_defconfig: enable dsmc
Change-Id: Ia7abee9d853e9e27217305056b9d6bef7b8a38ad
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2024-06-20 09:14:53 +08:00
Zhihuan He
7f06ef1c10 memory: rockchip: add dsmc driver
Change-Id: Ie3a7dbe89b34421d476b91a6021c3e81b10b591f
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2024-06-20 09:14:53 +08:00
Zhang Yubing
6ca20ef7dc drm/rockchip: dw-dp: add intelace mode support
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Iea0e6f6843210ef36e9d1781caebdaf18cb3b9c8
2024-06-19 22:06:32 +08:00
Frank Wang
6269118e0a usb: dwc2: notify the usb role to usb2 phy
Notify the usb role to usb2 phy when we received role_switch set from
the TCPM (Type-C Port Manager) to escape BC1.2 charge detection at host
mode in usb2 phy driver.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Id41df3d25b29771d4461cfd1106ca3f3c2572a18
2024-06-19 22:06:05 +08:00
Zhang Yubing
6ddbc89515 phy: rockchip: usbdp: support use 1 lane for DP
Change-Id: I9afcf53d5df4efcaf921afd2330309dcdeb6d467
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
2024-06-19 22:05:46 +08:00
Jon Lin
6933730e58 mfd: rockchip-flexbus: Fix MSB definition
TX_CTL and RX_CTL MSB bit is in different bit filed.

Change-Id: I79ada641acd2034998400e2b2f7310cbe1d5de3c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-06-19 17:44:11 +08:00
Frank Wang
44cdc4f8c3 mailbox: rockchip: add txpoll period in microseconds support
Since the speed requirement, this adds another txpoll-period time
in microseconds support.
The feature depends on CONFIG_MAILBOX_POLL_PERIOD_US is selected.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Iffc098e80c378f1b16d54135e9b930f57d841a6d
2024-06-19 17:23:12 +08:00
Frank Wang
65113bef27 mailbox: support tx done polling in microseconds
Select CONFIG_MAILBOX_POLL_PERIOD_US to use microseconds resolution
for txdone_hrtimer polling to increase TX speed.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Icd76dc79fc8d9cb02b7c12837b8b344e31941050
2024-06-19 17:19:48 +08:00
Caesar Wang
12c0e7dc9a arm64: configs: update rk3562_robot.config
This commit updates the rk3562_robot.config to ensure compatibility with
kernel version 6.1

  Steps performed:
    1. Generate the default configuration:
       make ARCH=arm64 rockchip_linux_defconfig
    2. Backup the old configuration:
       cp .config .config-old
    3. Apply the rk3562_robot.config:
       make ARCH=arm64 rockchip_linux_defconfig rk3562_robot.config
    4. Backup the new configuration:
       cp .config .config-new
    5. Generate the diff and update the rk3562_robot.config:
       ./scripts/diffconfig -m .config-old .config-new > arch/arm64/configs/rk3562_robot.config

Change-Id: Ib02eb95158b02547147c43c533dcb5f22753b149
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2024-06-19 14:38:04 +08:00
Liang Chen
980a9f6834 arm64: dts: rockchip: rk3576: set limit rate and offline cpus for early suspend
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I6601d4abefc95de3c9a4f3e5d555444af0b59509
2024-06-19 11:18:38 +08:00
Liang Chen
40b5dbb463 printk: auto adapt arch_timer_rate for CONFIG_PRINTK_TIME_FROM_ARM_ARCH_TIMER
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I0e9ec4b4872bb3ca7ae066a3c894dd47206040f2
2024-06-19 10:00:59 +08:00
Liang Chen
87b51e9bdb soc: rockchip: system_monitor: Add support limit rate and offline cpus when early suspend
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I02984d0c019b6085e9b4425f829a082e4da2ddef
2024-06-18 15:13:32 +08:00
Liang Chen
4ddca7a9fa PM / devfreq: rockchip_bus: Add devfreq policy
Bus devfreq policy support a group of bus clks drive DVFS together with
a single regulator.

Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I920a7df009638041b6b6cf2b77f914b6efc7862d
2024-06-18 15:12:37 +08:00
Jon Lin
168898e18a arm64: dts: rockchip: rk3576-test1 add flexbus-fspi nor flash node
Change-Id: I44ad9919c84b69cb9a09a6adfbb114f8806ebd93
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-06-18 15:01:03 +08:00
Jon Lin
d4c83a7922 arm64: dts: rockchip: rk3576: Add flexbus-fspi
Change-Id: Iafa01654783ada13203b0f9af723779c871cb5ec
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-06-18 14:59:42 +08:00
Jon Lin
9f672d6ea8 spi: rockchip-flexbus-fspi: Add code
Change-Id: Iad406f70ef4958259f63ef117534ce35fe439b85
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-06-18 14:59:33 +08:00