Commit Graph

1059208 Commits

Author SHA1 Message Date
Zhang aihui
37fd8ed0a9 i2c: Devices which have some i2c addr can work in same i2c bus
If i2c slave devices don't work at the same time, which have
the same i2c addr, this patch can make them working.

Change-Id: I1bfb7783924b08bdc6e12bf47c2de01bdac7c2e2
Signed-off-by: Zhang aihui <zah@rock-chips.com>
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
2021-08-03 14:46:23 +08:00
David Wu
497e7bd6e1 i2c: rk3x: Make sure the i2c transfer to be finished before system reboot
If the system rebooted, there might be i2c transfer at the
same time, it will make something unpredictable, because
the i2c host was reset, but the slave device wasn't, such
as rk808 pmic, so make sure the i2c transfer to be finished
before system shutdown at the reset mode.

This call chain is expected to be executed before kernel_restart
to do something before reset system. such as, i2c restart,
boot mode config.

Change-Id: I3c09f3acbe86595c295edc191aa38351adb7d5dc
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2021-08-03 14:44:16 +08:00
David Wu
72dd938512 iio: adc: rockchip: Don't return fail at probe when the regulator is dummy
If the referenced regulator is a dummy, the voltage is invalid,
but someone doesn't need the voltage, just need the adc value,
so don't return fail at probe when the regulator is dummy. If
he wants the voltage, configures the actual referenced regulator
at dts.

Change-Id: I8eaecc1a8e7e57c3a87aa69b9b852735bf4a025a
Signed-off-by: David Wu <david.wu@rock-chips.com>
2021-08-03 11:40:46 +08:00
David Wu
a220765c61 iio: adc: rockchip_saradc: Just get referenced voltage once at probe
The referenced voltage is not changed after initiation, so just only
get referenced voltage once.

Change-Id: I1eeab03f68855fafe010db328ec7bbcfa7d52310
Signed-off-by: David Wu <david.wu@rock-chips.com>
2021-08-03 11:40:11 +08:00
David Wu
a195f5035c dts: rockchip: Set pwm pin pull down when used for negative pwm regulator
As a second global reset, the GRF is not reset, the iomux and
pull of PWM pin is still keeping, but PWM controller is reset,
PWM pin goes into input mode. However, the pull is still none
changed in kernel, which can cause voltage problems, so should
always keep the PWM pin pull down mode, with 0~50 μA power
increase.

Change-Id: Ibbb9465f7c550d49d416bc3438c5199434df6eba
Signed-off-by: David Wu <david.wu@rock-chips.com>
2021-08-02 17:39:00 +08:00
David Wu
718c02ce18 pwm: rockchip: Make pwm pinctrl setting after pwm enabled
If the PWM pinctrl uses default state, the iomux setting will
be done at probe, the PWM may not be enabled at this moment.
It will make PWM into an intermediate state, destroy the default
hardware state, the PWM is not ready for work yet. So it is better
for doing PWM pinctrl setting after PWM enabled.

Change-Id: Iea34a7baf6a4d7df0c631f7f4fdab5b9d61bbd5f
Signed-off-by: David Wu <david.wu@rock-chips.com>
2021-08-02 17:39:00 +08:00
Tao Huang
69f5bbb436 i2c: rk3x: Call rk3x_i2c_driver_init() early when CONFIG_ROCKCHIP_THUNDER_BOOT=y
Change-Id: Ia723fcbb4bc5cf65843d343645b6ace538a536db
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2021-08-02 16:44:56 +08:00
Shawn Lin
d80d5062b2 mmc: dw_mmc-rockchip: Always fix ID mode clk request into 375KHz for RK356X
RK356X SoCs only support 375KHz for ID mode, otherwise it will be always
failed to set clk if the first attempt to identify cards.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I99ba322b3eeb4c4658869dc88b7a9f303081e12e
2021-08-02 14:34:35 +08:00
Yifeng Zhao
30f84d3755 mmc: sdhci-of-dwcmshc: rk3568: do not enable DLL while the clock rate less than 52mhz
The DLL may not be able to lock while the clock rate less than 52mhz.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ifacc3da516d78f5f242d8b03a60500a7dfe28993
2021-08-02 14:34:35 +08:00
Jon Lin
750cdbce41 drivers: rk_flash: set dma mask to 32bits
The nandc's DMA only supports 32bits. When the DDR capacity exceeds 4GB,
It need to configure DMA mask to 32bits and use API dma_map_single to
get the physical address.

Change-Id: I1510f7bbe2779ea20ff83a93e3a4dabb941263e3
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-07-30 16:06:10 +08:00
Zheng Yang
fed72e8fa9 drm: bridge: dw-hdmi: add debugfs node
Create two debugfs node to debug hdmi controller and phy.

Use following command to debug:
Read hdmi controller register:
	cat /d/dw-hdmi/ctrl
Read hdmi phy register:
	cat /d/dw-hdmi/phy
Write hdmi controller register:
	echo <reg> <val> > /d/dw-hdmi/ctrl
Write hdmi phy register:
	echo <reg> <val> > /d/dw-hdmi/phy

<reg> and <val> is hexadecimal.

Change-Id: I02e40cc94aa651ff0734feddbfa7d816edcf222f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2021-07-29 20:48:43 +08:00
Algea Cao
4035588f0f drm/rockchip: dw-hdmi: Add ycbcr_420_allowed to hdmi plat data
If the platform supports yuv420, set ycbcr_420_allowed to true.

Change-Id: I963b35b1e243f3267a3237c82120e6fe826850d5
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2021-07-29 20:48:43 +08:00
Zheng Yang
0b64f6166d drm/rockchip: hdmi: add color depth and output mode capacity property
Change-Id: I878780df5c1c81094498be2e7b4b3a22da0bfd4e
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2021-07-29 20:48:42 +08:00
Zheng Yang
650ab4a0bb drm/rockchip: hdmi: support modify color format
This patch is based on https://patchwork.kernel.org/patch/9801533,
add the drm property "hdmi_output_format", the possible value
could be:
     - RGB
     - YCBCR 444
     - YCBCR 422

To handle various subsampling of YCBCR output types, this property
allows two special automatic cases:
     - DRM_HDMI_OUTPUT_YCBCR_HQ
       This indicates preferred output should be YCBCR output,
       with highest subsampling rate by the source/sink, which
       can be typically:
	- ycbcr444
	- ycbcr422
	- ycbcr420
     - DRM_HDMI_OUTPUT_YCBCR_LQ
       This indicates preferred output should be YCBCR output, with
       lowest subsampling rate supported by source/sink, which can be:
	- ycbcr420
	- ycbcr422
	- ycbcr444

Default value of the property is set to 0 = RGB, so no changes if you
don't set the property.

Change-Id: Ie4a98ba91c8285a2e8f1ec7832d73183ad57665e
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2021-07-29 20:48:42 +08:00
Zheng Yang
3a9f825189 drm/rockchip: hdmi: support modify color depth
This patch introduce a drm property hdmi_output_depth to
get/set HDMI color depth, the possible value could be
	- Automatic
	  This indicates prefer highest color depth, it is
	  30bit on rockcip platform.
	- 24bit
	- 30bit
The default value of property is 24bit.

The max_tmds_clock is 0 on some display device, we think it's
max_tmds_clock is 340MHz.

If tmdsclock > max_tmds_clock, real output color depth fallback
to 24bit.

Change-Id: I666ac85d1ce5e73af31251eae324d1a6ae00b31e
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2021-07-29 20:48:42 +08:00
Zheng Yang
8a67fdbcfe drm: bridge: dw-hdmi: support attach property
Introduce struct dw_hdmi_property_ops in plat_data to attach
vendor connector property.

Change-Id: I3d23e40e9d342b22ca47f723b3f81057b58010e8
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2021-07-29 20:48:42 +08:00
Algea Cao
540a3c5d7c drm/rockchip: hdmi: Implement get input/output bus format handling
Set HDMI controller input/output bus format according to vop bus format.

Change-Id: Ib669ee6b0ea586410c715518d0bc9c55f5a52a50
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2021-07-29 20:48:42 +08:00
Zheng Yang
a888e70c4d drm: bridge/dw_hdmi: support DRM_MODE_FLAG_DBLCLK
Change-Id: I66d9456d6bde38fcf17d5cd5f6394517e4308a68
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2021-07-29 20:48:42 +08:00
Algea Cao
a07b4b5edd drm/rockchip: hdmi: Add hdmi drv_data features
Hdmi features vary on different platforms:
1.max_tmdsclk:hdmi max tmds clock.
2.unsupported_yuv_input:hdmi only support rgb input.
3.unsupported_deep_color:deep color mode is unsupported.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I77468b21960c49596c45bfef037fc5bfb3545b61
2021-07-29 20:48:42 +08:00
Tao Huang
83e6a415e8 Revert "ARM: rockchip_linux_defconfig: Enable CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND"
This reverts commit 07bf6d1a58.

DEVFREQ_GOV_SIMPLE_ONDEMAND is selected by ARM_ROCKCHIP_DMC_DEVFREQ.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Iee779012ac3d1d81838666965e97153fb8eca15c
2021-07-29 11:13:20 +08:00
Tao Huang
f40ece5f7b Revert "arm64: rockchip_linux_defconfig: Enable CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND"
This reverts commit fcb101fe62.

DEVFREQ_GOV_SIMPLE_ONDEMAND is selected by ARM_ROCKCHIP_DMC_DEVFREQ.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Id71520788e4117345f092bc116ed0f1f00f40eec
2021-07-29 11:13:16 +08:00
Tao Huang
aa21794a81 Revert "ARM: rockchip_defconfig: Enable CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND"
This reverts commit 68d7a58af3.

DEVFREQ_GOV_SIMPLE_ONDEMAND is selected by ARM_ROCKCHIP_DMC_DEVFREQ.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I9f5a1fbbc9e94b8cca98083d0794a862520aeb46
2021-07-29 11:13:08 +08:00
Tao Huang
0be8bfe201 Revert "arm64: rockchip_defconfig: Enable CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND"
This reverts commit 42ed6f90e0.

DEVFREQ_GOV_SIMPLE_ONDEMAND is selected by ARM_ROCKCHIP_DMC_DEVFREQ.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I9801cb9a1ea1b954de7bc4b70141c58a073d554f
2021-07-29 11:02:10 +08:00
Tao Huang
abf96942f9 arm64: rockchip_defconfig: Enable CONFIG_PRINTK_CALLER
Thread ID and CPU ID is useful to distinguish printk
callers from different threads/cpus. Enable config
to prepend the information to printk statements.

Same as gki_defconfig.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I3e0e4a5f29d25e71cf5c01ff3cd4ab42fc977dd2
2021-07-29 10:55:41 +08:00
Tao Huang
2d1051ee97 arm64: rockchip_gki.config: Enable CONFIG_ROCKCHIP_TIMER
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ib9972edb7ef26bee2cad671e04f61c15594f3445
2021-07-28 19:32:05 +08:00
Tao Huang
4f2d80c1bb clocksource/drivers/rockchip: Add module support to rockchip timer
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ieac5aecb5d50851a70e9f932c1340f253d62c7ec
2021-07-28 19:32:05 +08:00
Sandy Huang
949dbda967 drm/rockchip: vop2: make sure layer sel is take effect when it's updated
when vp0 and vp1 indenpendent config layer_sel register, this register take effect
time is prone to error, so we add the following measures to workaround this issue:

1. Add commit_lock to make sure vp0 and vp1 config register is mutually exclusive;
2. Make sure layer sel register is take effect when it's update.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ief832e2bf7e18567f4ea663843c77f0afbd21cf7
2021-07-28 15:16:31 +08:00
Sandy Huang
2563d569fe drm/rockchip: gem: add flag ROCKCHIP_BO_ALLOC_KMAP to assign kmap
RGA need to access CMA buffer at kernel space, so add this flag to keep kernel
line mapping for RGA.

Change-Id: Ia59acee3c904a495792229a80c42f74ae34200e3
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-07-28 15:15:28 +08:00
Mark Yao
51ca868e05 drm/rockchip: gem: support force alloc cma buffer with flags
Change-Id: I4749eac53609f865d0d4230364b1cbaf39ee0955
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-07-28 15:14:17 +08:00
Sandy Huang
e8f625e2c1 drm/rockchip: gem: use drm core drm_gem_dumb_map_offset
use drm_gem_dumb_map_offset() to instead of rockchip_gem_dumb_map_offset()

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I992da13480991cf48206868f77f86c3965661b8f
2021-07-28 15:12:49 +08:00
Jianqun Xu
64097b127c drm/rockchip: gem: add dmabuf sync partial to dma_buf_ops
Change-Id: I6ba192c11a0ff9eeafa4f4f0260addb1e56c4afc
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-07-28 15:11:53 +08:00
Andy Yan
afec60b71d drm/rockchip: gem: Convert sg to page
This make cpu can dump fb data allocated by ION.

Change-Id: I639e7cbbe6957d2bb02e4577805343cdbf5f5bf7
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-07-28 15:09:26 +08:00
Sandy Huang
6aed65b3da drm/rockchip: gem: support cpu cache for drm memory
Change-Id: Ic9ca3d0862eb8c5c4d8a002db8cbbcc93d2dcc02
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-07-28 15:09:01 +08:00
Sandy Huang
d135266e27 drm/rockchip: gem: don't limit to 32bit mapping when not support LPAE
Change-Id: Ia4fab3d63947ba693488fb58e3a104d400bd6e23
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Meiyou Chen <cmy@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-07-28 15:08:42 +08:00
Sandy Huang
f03547f360 drm/rockchip: gem: add dma buffer map to iommu
for some scene we need to alloc continue buffer from dma buffer,
but vop iommu is still enable, so we add iommu map for dma buffer.

Change-Id: I4749eac53609f865d0d4230364b1cbaf39ee095a
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-07-28 15:08:09 +08:00
Mark Yao
4304170a70 drm/rockchip: gem: support secure memory
Change-Id: I91dfbbfbf5d13983edfb79585e9beb980566f784
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Jianqun Xu <xjq@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-07-28 15:07:21 +08:00
Sandy Huang
7730f2ade7 drm/rockchip: fb: add support alloc fb for logo
we need to store some private data for logo display, so we extend the
rockchip_drm_logo_fb from drm_framebuffer.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ic6ba63b33b07b8dca9aa59b9bdb4137f4af0cda0
2021-07-28 15:06:01 +08:00
Sandy Huang
a3e8f0be68 drm/rockchip: fix fbdev crash when not use DRM_FBDEV_EMULATION
[    1.162571] Unable to handle kernel NULL pointer dereference at virtual address 00000200
[    1.165656] Modules linked in:
[    1.165941] CPU: 5 PID: 143 Comm: kworker/5:2 Not tainted 4.4.15 #237
[    1.166506] Hardware name: Rockchip RK3399 Evaluation Board v1 (Android) (DT)
[    1.167153] Workqueue: events output_poll_execute
[    1.168231] PC is at mutex_lock+0x14/0x44
[    1.168586] LR is at drm_fb_helper_hotplug_event+0x28/0xcc
[    1.172192] [<ffffff8008982110>] mutex_lock+0x14/0x44
[    1.172196] [<ffffff80084025a4>] drm_fb_helper_hotplug_event+0x28/0xcc
[    1.172201] [<ffffff8008427ae4>] rockchip_drm_output_poll_changed+0x14/0x1c
[    1.172204] [<ffffff80083f7c4c>] drm_kms_helper_hotplug_event+0x28/0x34
[    1.172207] [<ffffff80083f7ddc>] output_poll_execute+0x150/0x198
[    1.172212] [<ffffff80080b0ea8>] process_one_work+0x218/0x3dc
[    1.172215] [<ffffff80080b1578>] worker_thread+0x24c/0x374
[    1.172217] [<ffffff80080b5bcc>] kthread+0xdc/0xe4
[    1.172222] [<ffffff8008084cd0>] ret_from_fork+0x10/0x40

Change-Id: I681b9260ad7f2e3cae5cd08a109dad89b3575c2c
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-07-28 15:05:43 +08:00
Mark Yao
e75a135522 drm/rockchip: fb: allow big framebuffer
Change-Id: I2893ebbd616b79dfa6a1fcd1b98576097cbe4cb3
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2021-07-28 15:05:21 +08:00
Randy Li
b8a9ec663c drm/rockchip: enable async page flip configure
We support page flip through the drm atomic helper function.
But if we don't enable it the userspace won't know this
driver has such a capability.

Change-Id: If3689a526ea95235d191c0bbeba89745ae70d9c7
Signed-off-by: Randy Li <randy.li@rock-chips.com>
2021-07-28 15:04:58 +08:00
Sandy Huang
870bbda749 drm/rockchip: drv: add support rockchip dmc
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I5f966c0797b8467c66f0bb501d554516f99b2376
2021-07-28 15:03:34 +08:00
Sandy Huang
641da0dc82 drm/rockchip: vop2: get correct plane state for dmc
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I2cdc7394ccddcd0a0a10b2b7fc3d8f5b033fa643
2021-07-28 15:02:55 +08:00
Sandy Huang
4713955fb8 drm/rockchip: fb: implement rockchip_drm_atomic_helper_commit_tail_rpm
implement rockchip_drm_atomic_helper_commit_tail_rpm() to instead of
drm_atomic_helper_commit_tail_rpm(), this is prepare to add some rockchip
private implement, just like calculate bandwidth and make sure commit
planes is mutually-exclusive.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I2ac87f672a3ef06611b5047781f7cf53aa4b3700
2021-07-28 14:59:48 +08:00
Tao Huang
66af96482f arm64: rockchip_gki.config: Enable CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I70d61f5e57371174b1d9f74287c3826d38a99be6
2021-07-28 14:50:03 +08:00
Finley Xiao
990b7b2229 PM / devfreq: rk3399_dmc: rename driver to 'rockchip_dmc'
In future it will be modified to support more rockchip platforms.

Change-Id: I5cd7ce555eefe08b12fbfcda8ef445c4b169e8c6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-07-28 14:38:18 +08:00
YouMin Chen
c50f99f2f3 PM / devfreq: rockchip_dmc: use rockchip_drm_get_sub_dev_type to get lcdc_type
Change-Id: Ic1eb21c6b6b45a2c8c36d3666a987a32f3b50f05
Signed-off-by: YouMin Chen <cym@rock-chips.com>
2021-07-28 14:20:43 +08:00
Liang Chen
14a667d18f arm64: dts: rockchip: rk3568: adjust opp-table
Change-Id: Icbae16ac2c077555326c1d44b0df87161e929ea6
Signed-off-by: Liang Chen <cl@rock-chips.com>
2021-07-28 14:19:37 +08:00
Tao Huang
4a03eb898f arm64: rockchip_gki.config: Enable IEP/MPP/RGA2
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ib03d3a5a52251648fbb3766898e22f8b81b1b611
2021-07-27 19:21:27 +08:00
Tao Huang
6a9e8e123f video: Add rockchip video drivers
Change-Id: Ice3ea34c4ea3862c29f5e9b561d19a390f2965c7
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2021-07-27 19:05:33 +08:00
Tao Huang
eb6f2eff4e video/rockchip: rga: Fix gcc-10 warning
drivers/video/rockchip/rga/rga_drv.c: In function 'rga_get_rotate_mode_str':
drivers/video/rockchip/rga/rga_drv.c:199:11: warning: this statement may fall through [-Wimplicit-fallthrough=]
  199 |   else if (req_rga->sina == -65536 && req_rga->cosa == 0)
      |           ^
drivers/video/rockchip/rga/rga_drv.c:202:2: note: here
  202 |  case 0x2:
      |  ^~~~

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I2416a20f4acb5345ee130e6e93ea923205b4e395
2021-07-27 19:05:33 +08:00