Gadget driver may take an unbounded amount of time to queue requests
after XferNotReady. This is important for isochronous endpoints which
need to be started for a specific (micro-)frame.
If we fail to start a transfer for isochronous endpoint, let's try
queueing to a future interval and see if that helps. We will stop trying
if we fail a start transfer for 5 intervals in the future.
Change-Id: I031b52bc1ec6ff667e95a91d0f85f5ea7ac7a500
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit d53701067f)
Running out of requests on isochronous endpoints is part of normal
operation. We don't really need to know about it every time it
happens.
Change-Id: Icacff1816f541670331c8c59dc6c6a19e7033279
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 3451f6affa)
They are much more useful in hexadecimal than in decimal. Moreover,
generic commands are already logged in hex.
Change-Id: Iafe7eeea8e2b8770a502600a9150a04a693071a7
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 1517265228)
Sometimes, errors happen when kicking transfers from
__dwc3_gadget_start_isoc(). In those cases, we need to pass along the
error so gadget driver can make informed decisions.
Change-Id: Ibbb3ae70c4521c99a9ee465868f8c7a656504ad7
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 25abad6a05)
Now that we have a list of cancelled requests, we can skip over TRBs
when END_TRANSFER command completes.
Change-Id: I1aae9e97cf8c5a84729d222a31f0e33cfe32d9f0
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit fec9095bde)
Whenever we have a request in flight, we can move it to the cancelled
list and later simply iterate over that list and skip over any TRBs we
find.
Change-Id: I4a549b02e23815f31310dad0c263e81a32ae32ce
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit d4f1afe5e8)
This list will host cancelled requests who still have TRBs being
processed.
Change-Id: I6b11c2de0ab5f4e5291a13075e541a8b956d0df1
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit d5443bbf5f)
Extract the logic for skipping over TRBs to its own function. This
makes the code slightly more readable and makes it easier to move this
call to its final resting place as a following patch.
Change-Id: I454003aa91548a28fbe08e3c7a04c844116da290
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 7746a8dfb3)
Now that we track how many TRBs a request uses, it's easier to skip
over them in case of a call to usb_ep_dequeue(). Let's do so and
simplify the code a bit.
Change-Id: I5bdcfcfb4a1b446bd5b77f984bda6b71cfc93096
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit c3acd59014)
This will help us remove the wait_event() from our ->dequeue().
Change-Id: I7c9800f3b25120c3f9712140041b6cc3a943b130
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 09fe1f8d7e)
Both flags are used for the same purpose in dwc3: appending an extra
TRB at the end to deal with controller requirements. By combining both
flags into one, we make it clear that the situation is the same and
that they should be treated equally.
Change-Id: I60d73ba9720f49c8b76a1d9e62dfed0610879fd1
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 1a22ec6435)
In DWC_usb31 version 1.70a-ea06 and prior, for highspeed and fullspeed
isochronous IN, BIT[15:14] of the 16-bit microframe number reported by
the XferNotReady event are invalid. The driver uses this number to
schedule the isochronous transfer and passes it to the START TRANSFER
command. Because this number is invalid, the command may fail. If
BIT[15:14] matches the internal 16-bit microframe, the START TRANSFER
command will pass and the transfer will start at the scheduled time, if
it is off by 1, the command will still pass, but the transfer will start
2 seconds in the future. For all other conditions, the START TRANSFER
command will fail with bus-expiry.
In order to workaround this issue, we can test for the correct
combination of BIT[15:14] by sending START TRANSFER commands with
different values of BIT[15:14]: 'b00, 'b01, 'b10, and 'b11. Each
combination is 2^14 uframe apart (or 2 seconds). 4 seconds into the
future will result in a bus-expiry status. As the result, within the 4
possible combinations for BIT[15:14], there will be 2 successful and 2
failure START COMMAND status. One of the 2 successful command status
will result in a 2-second delay start. The smaller BIT[15:14] value is
the correct combination.
Since there are only 4 outcomes and the results are ordered, we can
simply test 2 START TRANSFER commands with BIT[15:14] combinations 'b00
and 'b01 to deduce the smaller successful combination.
Let test0 = test status for combination 'b00 and test1 = test status for
'b01 of BIT[15:14]. The correct combination is as follow:
if test0 fails and test1 passes, BIT[15:14] is 'b01
if test0 fails and test1 fails, BIT[15:14] is 'b10
if test0 passes and test1 fails, BIT[15:14] is 'b11
if test0 passes and test1 passes, BIT[15:14] is 'b00
Synopsys STAR 9001202023: Wrong microframe number for isochronous IN
endpoints.
Change-Id: I9a7f5ad3e0f4b3f501cb316452f6d1143c593045
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit d92021f660)
DWC_usb31 peripheral v1.70a-ea06 and prior needs a SW workaround for
isoc START TRANSFER command failure. However, some affected versions may
have RTL patches to fix this without a SW workaround. Add this quirk to
disable the SW workaround when it is not needed.
Synopsys STAR 9001202023: Wrong microframe number for isochronous IN
endpoints.
Change-Id: I402c181b00d3f80e39ef066dc665191706e06ef0
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit dd74b96c74)
Add a new field to dwc3 structure to track VERSIONTYPE. The VERSIONTYPE
is represented in ASCII in the 32-bit VERSIONTYPE register. In
DWC_usb31, sub releases for each version are tracked with VERSIONTYPE
such as "ea01" and "ea02".
Change-Id: I43217d0e8b18edcd0ab540efe41de8cb24309057
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 475d8e0197)
DWC_usb31 and DWC_usb3 v3.30a and higher do not support OTG mode. If
the controller supports DRD but the dr_mode is not specified or set to
OTG, then set the mode to peripheral.
Change-Id: I8a72edeb0c6ee8b5061fbf22ce7133c65ed95b14
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 89a9cc4751)
Allow extcon device, found by name, to provide DR status for USB.
This is needed, for example, in case of Intel Merrifield platform,
where the Intel Basin Cove PMIC provides an extcon device to communicate
the detected role.
Note, that the "linux,extcon-name" property name is only for kernel
internal use by X86/ACPI platform code and as such is not documented
in the device tree bindings.
Change-Id: Idfd5fb48b8ef196ba670fb61880fb2a999b538e8
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 268784ba14)
It's not very useful to repeat a bunch of probe deferral errors. And
it's also not very useful to log "failed" without telling the error
code.
Change-Id: Iaad54fc78cc83482937b4a7ad362fff7639a4ddd
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 408d3ba006)
Support the option to disable USB2 LPM. Set xhci "usb2-lpm-disable"
property via "snps,usb2-lpm-disable" property.
Change-Id: Idb7475e4a3cfed25316c5a6889cf454f7cac1fea
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 022a0208c0)
Add an option to disable USB2 LPM from host. There maybe cases where the
user does not want to enable USB2 LPM (e.g. USB2 LPM is broken).
Change-Id: I7b6b075f7017d84e6416f05cdac1fdbca64c248b
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 5455e15607)
GUSB2PHYCFG.ENBLSLPM enables the controller to assert low power signals
to the PHY. Unless disabled via device property, explicitly set
GUSB2PHYCFG.ENBLSLPM as it may not be set by default.
Change-Id: Id31448c50898a8924e3630ca57d710d886ea000b
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit eafeacf119)
Current implementation only prints/sets the link state for peripheral
mode only. Check and prevent printing bogus link state if the current
mode of operation is not peripheral.
Change-Id: I0c7d50836a526a78a87c1698de78746420f61c24
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit d102444cac)
Highspeed device and below has different state names than superspeed and
higher. Add proper checks and printouts of link states for highspeed and
below.
Change-Id: I0b82b5e172e83382dca4ea9ca81b4c6a9b97e179
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 0d36dede45)
To dump internal LSP and endpoint state debug registers, we must write
to GDBGLSPMUX register. This patch correctly dump LSP and endpoint
states from the debug registers.
If the controller is in device mode, all LSP and endpoint state
registers will be dumped via the debugfs attribute "lsp_dump". In host
mode, the user has to write the LSP number to "lsp_dump" to dump a
specific LSP selection.
Change-Id: I0d60a8af46b6dbdd2193ace7608ecddb41316a99
Fixes: 80b776340c ("usb: dwc3: Dump LSP and BMU debug info")
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 62ba09d6bb)
TxFIFO and RxFIFO from GDBGFIFOSPACE are fifo depths in MDWIDTH. Convert
them into bytes for easier read.
Change-Id: I79f6a64dd08bd7bc59a8aecf8897cffb7b8a440e
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 0f874f79dc)
The Tx/RxFIFO types in the GDBGFIFOSPACE.FIFO_QUEUE_SELECT are not
queue. Properly rename them.
Change-Id: I553dfda6b5c24d7db1f81c7b2e093b69fbcf8ea9
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 2c85a1817e)
This adds the necessary data for handling efuse on the rk1808.
Change-Id: I78b66db1fdc22430ab93b07ad3c7cea3355a7f6e
Signed-off-by: Liang Chen <cl@rock-chips.com>
This adds the necessary data for handling efuse on the rk3128.
Change-Id: Ieda973675ff959b3157bb4afe6e1dcdfac65506c
Signed-off-by: Liang Chen <cl@rock-chips.com>
This adds the necessary data for handling secure efuse on the rk3288.
Need to use secure interface to access efuse when kernel is in no-secure
mode.
Change-Id: I1979f23ed8f85c9eb248de276b32adcbb165bd79
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This adds the necessary data for handling efuse on the rk3368.
As efuse of rk3368 is secure, use secure interface to access efuse.
Change-Id: I72c29348b7744b232d75ab51c56dc7de0988c24e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
We will add a avs driver to adjust opp's voltage according to leakage.
As it need register a notifier before cpufreq starts, and make cpufreq
defer probe is probably not really easy, so avs should probe earlier
than cpufreq, efuse should probe earlier than avs.
Change-Id: I817aa44c3b34d2fdf44148e6b9649ceed76d8f1f
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
modify the rk808 max steps for increase voltage of Buck1/2,
equal 25mv.
Change-Id: Ic6c016e99ce67f5773d5f5df0b65fa1de10f557a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
New driver only support DRP mode without swap function.
Swap function will be added in later.
Change-Id: I7e0c2c424def069d4be78c3bc8f704c3f7e5be48
Signed-off-by: Zain Wang <wzz@rock-chips.com>
CACHE_L2X0/TWD/ARM_GLOBAL_TIMER are only available on Cortex-A9.
DW_APB_TIMER_OF only use on rk3066a.
Change-Id: Ied2f49b5d308e961ce5af72eb577aac23e3eb890
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
256KB alignment is not work for (textofs & 0xf0000) > 0x40000.
Change to 1MB.
Change-Id: I9803b22d7d64a244842dcc811e47e214d247fc0c
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Add simple read only driver for the OTP (One Time Programmable)
memory found on Rockchip SoCs.
Change-Id: I01c63dcacaf471ed7d06e0e8263a14e29af7fb0e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The main description for rk3308b is as follows:
- Old iomux multiplexing extension;
- GRF_SOC_CON5 register add some bits;
- Newly added GRF_SOC_CON13/15 register.
Change-Id: I94bfcae5387aceae14895f1cafa0bfea51bf8b63
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
The most pins of rk3308 are 2bits iomux, but the banks's register
width is 0x8.
Change-Id: I3305810b3f75febd6ec7a933b65e3c9d50f003dd
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
According to the dwc2 programmer's guide v3.10a, in '2.1.3.2 Dedicated
FIFO Mode with No Thresholding', it suggested that:
Device RxFIFO =
- Scatter/Gather DMA mode:
(4 * number of control endpoints + 6) + ((largest USB packet used / 4) +
1 for status information) + (2 * number of OUT endpoints) + 1 for Global NAK
on rockchip platforms:
(4 * 1 + 6) + ((1024 / 4) + 1) + (2 * 6) + 1 = 280
- Slave or Buffer DMA mode:
(5 * number of control endpoints + 8) + ((largest USB packet used / 4) +
1 for status information) + (2 * number of OUT endpoints) + 1 for Global NAK
on rockchip platforms:
(5 * 1 + 8) + ((1024 / 4) + 1) + (2 * 6) + 1 = 283
Device IN Endpoint TxFIFO =
The TxFIFO must equal at least one MaxPacketSize (MPS).
In addition to RxFIFO and TxFIFOs, refer to dwc2 databook v3.10a,
'Figure 2-13 Device Mode FIFO Address Mapping and AHB FIFO Access Mapping
(Dedicated FIFO)', it required that when the device is operating in non
Scatter Gather Internal DMA mode, the last locations of the SPRAM are used
to store the DMAADDR values for each Endpoint (1 location per endpoint).
When the device is operating in Scatter Gather mode, then the last locations
of the SPRAM store the Base Descriptor address, Current Descriptor address,
Current Buffer address, and status quadlet information for each endpoint
direction (4 locations per Endpoint). If an Endpoint is bidirectional , then
4 locations will be used for IN, and another 4 for OUT).
Considering that the total FIFO size of dwc2 otg is 0x3cc (972),
and we must reserve (4 * 13) = 52 locations for all Endpoints.
So reconfig dwc2 device fifo size as follows:
Device RxFIFO = 280
Device IN Endpoint TxFIFO
- FIFO #0 = (64 / 4) = 16 (Assuming this is used for EP0)
- FIFO #1 = (1024/4) = 256 (Assuming this is used for Isochronous)
- FIFO #2 = (512/4) = 128
- FIFO #3 = (512/4) = 128
- FIFO #4 = (256/4) = 64
- FIFO #5 = (128/4) = 32
- FIFO #6 = (64/4) = 16
After reconfig the dwc2 device fifo size, test mtp write on rockchip
platform (PC -> rockchip platform) on rk312x/rk3326/px30/rk3288 evb,
when mask the 'vfs_write' in f_mtp.c, the writing data rate can be
increased from 16MBps ~ 20MBps to 30MBps ~ 36MBps on different kinds
of rockchip evbs.
Change-Id: Icdf8a5dd95f96d174233e4ffc765c9a982b9f0b6
Signed-off-by: William Wu <william.wu@rock-chips.com>
Single entry is for target voltage and three entries are for
<target min max> voltages. Change cpu opp-microvolt form one entry to
three entries and set maximum acceptable voltage to a high value so that
regulator device can supply multiple consumers at the same time.
Fixes: 16e9353f89 ("arm: dts: rockchip: Change cpu opp-microvolt form one entry to three")
Change-Id: I96e5f87f2945e63e8f4a073fa0292f001830b13c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
