1.Call register/unregister in pair;
2.Only enable gpio_php when driver built in.
Change-Id: Ib7326a76333a5916842a8e3f15b7fa329b4dde77
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Always use the frame burst even if there is only one mapping.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I3774be5286d618dd61ed11e443ee657ea22cd8d8
In scenarios where U-boot can read EDID but the kernel cannot,
HDMI color of U-boot and the kernel may differ. The current color
switching process causes this scenario where HDMI enters the
kernel but fails to switch to the correct color. Optimize process
of switching colors to solve this problem.
Change-Id: I36c7d7e68e438bd33f9d2804d4a5a34edda9ba4a
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
When the HDMI status changes, there is no need to call
dw_hdmi_qp_setup() function every time. The configuration can be
carried out independently for specific changed parts. This can
reduce delays and avoid mutual interference.
Change-Id: I5999961893d517cba04c58ca0c96fe201d413ee0
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
The default is to clear mpp load info during suspend, but suspend config may be turned off, resulting in load info not being cleared.
Change-Id: Ic930d3f691dc2f1694acfdc7ac1cbe4f022b4e62
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
When conducting FRL training, the video data transmitted from
VOP to HDMI must be disabled. Until the training is successful
or fails, then it will be reopened. When the FRL training fails,
the video transmission from the video to HDMI is not re-enabled.
This will result in the inability to display normally even when
switching to tmds mode after training fails.
Therefore, regardless of the specific scenario, when switching
to the tmds mode, the data transmission from VOP to HDMI must be
enabled.
Change-Id: I1c853c8197fdf7aaef32c80c5cdb73db13d9ec4c
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
The variable 'T' in the calculation formula
'output = T * M1 * N_y2r * M0 * N_r2y' has been omitted.
Change-Id: I347eca9786729de0ce35c35f483b55a7cb62bd7e
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
In analogix_dp_link_start(), &link_train.training_lane[] is used to
set phy PE/VS configurations, and buf[] is initialized with the same
values to set DPCD DP_TRAINING_LANEx_SET.
It makes sense to reuse &link_train.training_lane[] to set DPCD
DP_TRAINING_LANEx_SET, which can remove the redundant assignments
and make codes more consice.
Change-Id: I38869c22f8cc93b18b3b27bc41a0975700b328d1
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
KBASE_PM_RUNTIME was originally defined by ARM.
However, in the modification to upgrade driver to g29p0-00eac0 (r54), ARM removed KBASE_PM_RUNTIME,
and the source code that depended on KBASE_PM_RUNTIME was modified to be enabled by default.
This modification corresponds to
commit fb91362a23 ("MALI: valhall: upgrade DDK to g29p0-00eac0, from g28p0-00eac0").
Some code previously added by finley.xiao@rock-chips.com also depends on KBASE_PM_RUNTIME.
After picking the above commit, the definition of KBASE_PM_RUNTIME was removed,
making the code added by Finley unable to be enabled.
This may lead to anomalies such as "failed to get ack on domain 'gpu'...",
as referenced in https://redmine.rock-chips.com/issues/568204.
This modification fixes the issue above.
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: Ibf57f363f4f779eceb0e7891271e41cae1a560ea
In some scenarios with high timing requirements, frequent calls to
dma_alloc_coherent may trigger memory reclamation with low probability,
thereby increasing the overall time consumption per frame.
Change-Id: I28ffe47c5db40c82a54254b056f117931efbe38e
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
The iommu device needs to be mapped using a unified main device.
Change-Id: I5b5820b590101dde1713889c056edc034d7322ea
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
